mirror of
https://github.com/Next-Flip/Momentum-Firmware.git
synced 2026-04-24 03:29:57 -07:00
[FL-2754, FL-3945] EM4305 support (#4069)
* Initial EM4305 write support * Support for writing EM4100 data to EM4305 blank tags * F18 API version bump * Satisfy pvs * Lib: cleanup em4305 code * Mask size fix * Electra * Fix leftovers from a previous implementation * Viking * Gallagher * LFRFID: cleanup em4305 Co-authored-by: あく <alleteam@gmail.com>
This commit is contained in:
152
lib/lfrfid/tools/em4305.c
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152
lib/lfrfid/tools/em4305.c
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#include "em4305.h"
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#include <furi.h>
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#include <furi_hal_rfid.h>
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#define TAG "EM4305"
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#define EM4305_TIMING_1 (32)
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#define EM4305_TIMING_0_OFF (23)
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#define EM4305_TIMING_0_ON (18)
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#define EM4305_FIELD_STOP_OFF_CYCLES (55)
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#define EM4305_FIELD_STOP_ON_CYCLES (18)
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#define EM4305_TIMING_POWER_CHECK (1480)
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#define EM4305_TIMING_EEPROM_WRITE (9340)
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static bool em4305_line_parity(uint8_t data) {
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uint8_t parity = 0;
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for(uint8_t i = 0; i < 8; i++) {
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parity ^= (data >> i) & 1;
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}
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return parity;
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}
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static uint64_t em4305_prepare_data(uint32_t data) {
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uint8_t i, j;
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uint64_t data_with_parity = 0;
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// 4 lines of 8 bits of data
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// line even parity at bits 8 17 26 35
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// column even parity at bits 36-43
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// bit 44 is always 0
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// final table is 5 lines of 9 bits
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// line parity
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for(i = 0; i < 4; i++) {
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for(j = 0; j < 8; j++) {
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data_with_parity = (data_with_parity << 1) | ((data >> (i * 8 + j)) & 1);
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}
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data_with_parity = (data_with_parity << 1) | (uint64_t)em4305_line_parity(data >> (i * 8));
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}
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// column parity
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for(i = 0; i < 8; i++) {
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uint8_t column_parity = 0;
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for(j = 0; j < 4; j++) {
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column_parity ^= (data >> (j * 8 + i)) & 1;
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}
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data_with_parity = (data_with_parity << 1) | column_parity;
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}
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// bit 44
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data_with_parity = (data_with_parity << 1) | 0;
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return data_with_parity;
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}
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static void em4305_start(void) {
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furi_hal_rfid_tim_read_start(125000, 0.5);
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// do not ground the antenna
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furi_hal_rfid_pin_pull_release();
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}
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static void em4305_stop(void) {
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furi_hal_rfid_tim_read_stop();
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furi_hal_rfid_pins_reset();
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}
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static void em4305_write_bit(bool value) {
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if(value) {
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furi_delay_us(EM4305_TIMING_1 * 8);
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} else {
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furi_hal_rfid_tim_read_pause();
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furi_delay_us(EM4305_TIMING_0_OFF * 8);
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furi_hal_rfid_tim_read_continue();
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furi_delay_us(EM4305_TIMING_0_ON * 8);
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}
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}
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static void em4305_write_opcode(uint8_t value) {
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// 3 bit opcode
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for(uint8_t i = 0; i < 3; i++) {
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em4305_write_bit((value >> i) & 1);
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}
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// parity
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bool parity = 0;
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for(uint8_t i = 0; i < 3; i++) {
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parity ^= (value >> i) & 1;
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}
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em4305_write_bit(parity);
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}
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static void em4305_field_stop() {
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furi_hal_rfid_tim_read_pause();
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furi_delay_us(EM4305_FIELD_STOP_OFF_CYCLES * 8);
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furi_hal_rfid_tim_read_continue();
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furi_delay_us(EM4305_FIELD_STOP_ON_CYCLES * 8);
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}
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static void em4305_write_word(uint8_t address, uint32_t data) {
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// parity
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uint64_t data_with_parity = em4305_prepare_data(data);
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// power up the tag
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furi_delay_us(8000);
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// field stop
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em4305_field_stop();
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// start bit
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em4305_write_bit(0);
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// opcode
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em4305_write_opcode(EM4x05_OPCODE_WRITE);
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// address
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bool address_parity = 0;
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for(uint8_t i = 0; i < 4; i++) {
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em4305_write_bit((address >> (i)) & 1);
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address_parity ^= (address >> (i)) & 1;
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}
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em4305_write_bit(0);
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em4305_write_bit(0);
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em4305_write_bit(address_parity);
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// data
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for(uint8_t i = 0; i < 45; i++) {
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em4305_write_bit((data_with_parity >> (44 - i)) & 1);
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}
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// wait for power check and eeprom write
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furi_delay_us(EM4305_TIMING_POWER_CHECK);
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furi_delay_us(EM4305_TIMING_EEPROM_WRITE);
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}
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void em4305_write(LFRFIDEM4305* data) {
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furi_check(data);
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em4305_start();
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FURI_CRITICAL_ENTER();
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for(uint8_t i = 0; i < EM4x05_WORD_COUNT; i++) {
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if(data->mask & (1 << i)) {
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em4305_write_word(i, data->word[i]);
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}
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}
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FURI_CRITICAL_EXIT();
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em4305_stop();
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}
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61
lib/lfrfid/tools/em4305.h
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61
lib/lfrfid/tools/em4305.h
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#pragma once
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#include <stdint.h>
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#include <stdbool.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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// EM4305/4205 chip config definitions, thanks proxmark3!
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#define EM4x05_GET_BITRATE(x) ((((x) & 0x3F) * 2) + 2)
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// Note: only data rates 8, 16, 32, 40(*) and 64 are supported. (*) only with EM4305 330pF
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#define EM4x05_SET_BITRATE(x) (((x) - 2) / 2)
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#define EM4x05_MODULATION_NRZ (0x00000000)
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#define EM4x05_MODULATION_MANCHESTER (0x00000040)
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#define EM4x05_MODULATION_BIPHASE (0x00000080)
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#define EM4x05_MODULATION_MILLER (0x000000C0) // not supported by all 4x05/4x69 chips
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#define EM4x05_MODULATION_PSK1 (0x00000100) // not supported by all 4x05/4x69 chips
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#define EM4x05_MODULATION_PSK2 (0x00000140) // not supported by all 4x05/4x69 chips
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#define EM4x05_MODULATION_PSK3 (0x00000180) // not supported by all 4x05/4x69 chips
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#define EM4x05_MODULATION_FSK1 (0x00000200) // not supported by all 4x05/4x69 chips
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#define EM4x05_MODULATION_FSK2 (0x00000240) // not supported by all 4x05/4x69 chips
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#define EM4x05_PSK_RF_2 (0)
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#define EM4x05_PSK_RF_4 (0x00000400)
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#define EM4x05_PSK_RF_8 (0x00000800)
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#define EM4x05_MAXBLOCK_SHIFT (14)
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#define EM4x05_FIRST_USER_BLOCK (5)
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#define EM4x05_SET_NUM_BLOCKS(x) \
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(((x) + 4) << 14) // number of blocks sent during default read mode
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#define EM4x05_GET_NUM_BLOCKS(x) ((((x) >> 14) & 0xF) - 4)
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#define EM4x05_READ_LOGIN_REQ (1 << 18)
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#define EM4x05_READ_HK_LOGIN_REQ (1 << 19)
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#define EM4x05_WRITE_LOGIN_REQ (1 << 20)
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#define EM4x05_WRITE_HK_LOGIN_REQ (1 << 21)
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#define EM4x05_READ_AFTER_WRITE (1 << 22)
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#define EM4x05_DISABLE_ALLOWED (1 << 23)
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#define EM4x05_READER_TALK_FIRST (1 << 24)
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#define EM4x05_INVERT (1 << 25)
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#define EM4x05_PIGEON (1 << 26)
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#define EM4x05_WORD_COUNT (16)
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#define EM4x05_OPCODE_LOGIN (0b001)
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#define EM4x05_OPCODE_WRITE (0b010)
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#define EM4x05_OPCODE_READ (0b100)
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#define EM4x05_OPCODE_PROTECT (0b110)
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#define EM4x05_OPCODE_DISABLE (0b101)
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typedef struct {
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uint32_t word[EM4x05_WORD_COUNT]; /**< Word data to write */
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uint16_t mask; /**< Word mask */
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} LFRFIDEM4305;
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/** Write EM4305 tag data to tag
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*
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* @param data The data to write (mask is taken from that data)
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*/
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void em4305_write(LFRFIDEM4305* data);
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#ifdef __cplusplus
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}
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#endif
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