mirror of
https://github.com/Next-Flip/Momentum-Firmware.git
synced 2026-04-24 03:29:57 -07:00
hal: made FuriHalSpiBusHandle static
This commit is contained in:
@@ -85,7 +85,7 @@ typedef struct {
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volatile SubGhzDeviceCC1101ExtState state;
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volatile SubGhzDeviceCC1101ExtRegulation regulation;
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const GpioPin* async_mirror_pin;
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FuriHalSpiBusHandle* spi_bus_handle;
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const FuriHalSpiBusHandle* spi_bus_handle;
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const GpioPin* g0_pin;
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SubGhzDeviceCC1101ExtAsyncTx async_tx;
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SubGhzDeviceCC1101ExtAsyncRx async_rx;
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@@ -3,7 +3,8 @@
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#include <string.h>
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#include <furi_hal_cortex.h>
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static bool cc1101_spi_trx(FuriHalSpiBusHandle* handle, uint8_t* tx, uint8_t* rx, uint8_t size) {
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static bool
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cc1101_spi_trx(const FuriHalSpiBusHandle* handle, uint8_t* tx, uint8_t* rx, uint8_t size) {
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FuriHalCortexTimer timer = furi_hal_cortex_timer_get(CC1101_TIMEOUT * 1000);
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while(furi_hal_gpio_read(handle->miso)) {
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@@ -16,7 +17,7 @@ static bool cc1101_spi_trx(FuriHalSpiBusHandle* handle, uint8_t* tx, uint8_t* rx
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return true;
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}
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CC1101Status cc1101_strobe(FuriHalSpiBusHandle* handle, uint8_t strobe) {
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CC1101Status cc1101_strobe(const FuriHalSpiBusHandle* handle, uint8_t strobe) {
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uint8_t tx[1] = {strobe};
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CC1101Status rx[1] = {0};
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rx[0].CHIP_RDYn = 1;
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@@ -27,7 +28,7 @@ CC1101Status cc1101_strobe(FuriHalSpiBusHandle* handle, uint8_t strobe) {
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return rx[0];
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}
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CC1101Status cc1101_write_reg(FuriHalSpiBusHandle* handle, uint8_t reg, uint8_t data) {
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CC1101Status cc1101_write_reg(const FuriHalSpiBusHandle* handle, uint8_t reg, uint8_t data) {
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uint8_t tx[2] = {reg, data};
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CC1101Status rx[2] = {0};
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rx[0].CHIP_RDYn = 1;
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@@ -39,7 +40,7 @@ CC1101Status cc1101_write_reg(FuriHalSpiBusHandle* handle, uint8_t reg, uint8_t
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return rx[1];
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}
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CC1101Status cc1101_read_reg(FuriHalSpiBusHandle* handle, uint8_t reg, uint8_t* data) {
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CC1101Status cc1101_read_reg(const FuriHalSpiBusHandle* handle, uint8_t reg, uint8_t* data) {
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assert(sizeof(CC1101Status) == 1);
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uint8_t tx[2] = {reg | CC1101_READ, 0};
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CC1101Status rx[2] = {0};
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@@ -52,33 +53,36 @@ CC1101Status cc1101_read_reg(FuriHalSpiBusHandle* handle, uint8_t reg, uint8_t*
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return rx[0];
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}
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uint8_t cc1101_get_partnumber(FuriHalSpiBusHandle* handle) {
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uint8_t cc1101_get_partnumber(const FuriHalSpiBusHandle* handle) {
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uint8_t partnumber = 0;
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cc1101_read_reg(handle, CC1101_STATUS_PARTNUM | CC1101_BURST, &partnumber);
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return partnumber;
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}
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uint8_t cc1101_get_version(FuriHalSpiBusHandle* handle) {
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uint8_t cc1101_get_version(const FuriHalSpiBusHandle* handle) {
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uint8_t version = 0;
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cc1101_read_reg(handle, CC1101_STATUS_VERSION | CC1101_BURST, &version);
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return version;
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}
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uint8_t cc1101_get_rssi(FuriHalSpiBusHandle* handle) {
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uint8_t cc1101_get_rssi(const FuriHalSpiBusHandle* handle) {
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uint8_t rssi = 0;
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cc1101_read_reg(handle, CC1101_STATUS_RSSI | CC1101_BURST, &rssi);
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return rssi;
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}
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CC1101Status cc1101_reset(FuriHalSpiBusHandle* handle) {
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CC1101Status cc1101_reset(const FuriHalSpiBusHandle* handle) {
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return cc1101_strobe(handle, CC1101_STROBE_SRES);
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}
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CC1101Status cc1101_get_status(FuriHalSpiBusHandle* handle) {
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CC1101Status cc1101_get_status(const FuriHalSpiBusHandle* handle) {
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return cc1101_strobe(handle, CC1101_STROBE_SNOP);
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}
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bool cc1101_wait_status_state(FuriHalSpiBusHandle* handle, CC1101State state, uint32_t timeout_us) {
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bool cc1101_wait_status_state(
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const FuriHalSpiBusHandle* handle,
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CC1101State state,
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uint32_t timeout_us) {
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bool result = false;
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CC1101Status status = {0};
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FuriHalCortexTimer timer = furi_hal_cortex_timer_get(timeout_us);
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@@ -92,35 +96,35 @@ bool cc1101_wait_status_state(FuriHalSpiBusHandle* handle, CC1101State state, ui
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return result;
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}
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CC1101Status cc1101_shutdown(FuriHalSpiBusHandle* handle) {
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CC1101Status cc1101_shutdown(const FuriHalSpiBusHandle* handle) {
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return cc1101_strobe(handle, CC1101_STROBE_SPWD);
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}
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CC1101Status cc1101_calibrate(FuriHalSpiBusHandle* handle) {
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CC1101Status cc1101_calibrate(const FuriHalSpiBusHandle* handle) {
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return cc1101_strobe(handle, CC1101_STROBE_SCAL);
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}
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CC1101Status cc1101_switch_to_idle(FuriHalSpiBusHandle* handle) {
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CC1101Status cc1101_switch_to_idle(const FuriHalSpiBusHandle* handle) {
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return cc1101_strobe(handle, CC1101_STROBE_SIDLE);
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}
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CC1101Status cc1101_switch_to_rx(FuriHalSpiBusHandle* handle) {
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CC1101Status cc1101_switch_to_rx(const FuriHalSpiBusHandle* handle) {
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return cc1101_strobe(handle, CC1101_STROBE_SRX);
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}
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CC1101Status cc1101_switch_to_tx(FuriHalSpiBusHandle* handle) {
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CC1101Status cc1101_switch_to_tx(const FuriHalSpiBusHandle* handle) {
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return cc1101_strobe(handle, CC1101_STROBE_STX);
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}
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CC1101Status cc1101_flush_rx(FuriHalSpiBusHandle* handle) {
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CC1101Status cc1101_flush_rx(const FuriHalSpiBusHandle* handle) {
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return cc1101_strobe(handle, CC1101_STROBE_SFRX);
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}
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CC1101Status cc1101_flush_tx(FuriHalSpiBusHandle* handle) {
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CC1101Status cc1101_flush_tx(const FuriHalSpiBusHandle* handle) {
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return cc1101_strobe(handle, CC1101_STROBE_SFTX);
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}
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uint32_t cc1101_set_frequency(FuriHalSpiBusHandle* handle, uint32_t value) {
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uint32_t cc1101_set_frequency(const FuriHalSpiBusHandle* handle, uint32_t value) {
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uint64_t real_value = (uint64_t)value * CC1101_FDIV / CC1101_QUARTZ;
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// Sanity check
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@@ -135,7 +139,7 @@ uint32_t cc1101_set_frequency(FuriHalSpiBusHandle* handle, uint32_t value) {
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return (uint32_t)real_frequency;
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}
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uint32_t cc1101_set_intermediate_frequency(FuriHalSpiBusHandle* handle, uint32_t value) {
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uint32_t cc1101_set_intermediate_frequency(const FuriHalSpiBusHandle* handle, uint32_t value) {
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uint64_t real_value = value * CC1101_IFDIV / CC1101_QUARTZ;
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assert((real_value & 0xFF) == real_value);
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@@ -146,7 +150,7 @@ uint32_t cc1101_set_intermediate_frequency(FuriHalSpiBusHandle* handle, uint32_t
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return (uint32_t)real_frequency;
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}
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void cc1101_set_pa_table(FuriHalSpiBusHandle* handle, const uint8_t value[8]) {
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void cc1101_set_pa_table(const FuriHalSpiBusHandle* handle, const uint8_t value[8]) {
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uint8_t tx[9] = {CC1101_PATABLE | CC1101_BURST}; //-V1009
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CC1101Status rx[9] = {0};
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rx[0].CHIP_RDYn = 1;
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@@ -159,7 +163,7 @@ void cc1101_set_pa_table(FuriHalSpiBusHandle* handle, const uint8_t value[8]) {
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assert((rx[0].CHIP_RDYn | rx[8].CHIP_RDYn) == 0);
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}
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uint8_t cc1101_write_fifo(FuriHalSpiBusHandle* handle, const uint8_t* data, uint8_t size) {
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uint8_t cc1101_write_fifo(const FuriHalSpiBusHandle* handle, const uint8_t* data, uint8_t size) {
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uint8_t buff_tx[64];
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uint8_t buff_rx[64];
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buff_tx[0] = CC1101_FIFO | CC1101_BURST;
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@@ -170,7 +174,7 @@ uint8_t cc1101_write_fifo(FuriHalSpiBusHandle* handle, const uint8_t* data, uint
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return size;
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}
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uint8_t cc1101_read_fifo(FuriHalSpiBusHandle* handle, uint8_t* data, uint8_t* size) {
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uint8_t cc1101_read_fifo(const FuriHalSpiBusHandle* handle, uint8_t* data, uint8_t* size) {
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uint8_t buff_trx[2];
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buff_trx[0] = CC1101_FIFO | CC1101_READ | CC1101_BURST;
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@@ -19,7 +19,7 @@ extern "C" {
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*
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* @return device status
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*/
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CC1101Status cc1101_strobe(FuriHalSpiBusHandle* handle, uint8_t strobe);
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CC1101Status cc1101_strobe(const FuriHalSpiBusHandle* handle, uint8_t strobe);
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/** Write device register
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*
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@@ -29,7 +29,7 @@ CC1101Status cc1101_strobe(FuriHalSpiBusHandle* handle, uint8_t strobe);
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*
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* @return device status
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*/
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CC1101Status cc1101_write_reg(FuriHalSpiBusHandle* handle, uint8_t reg, uint8_t data);
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CC1101Status cc1101_write_reg(const FuriHalSpiBusHandle* handle, uint8_t reg, uint8_t data);
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/** Read device register
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*
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@@ -39,7 +39,7 @@ CC1101Status cc1101_write_reg(FuriHalSpiBusHandle* handle, uint8_t reg, uint8_t
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*
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* @return device status
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*/
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CC1101Status cc1101_read_reg(FuriHalSpiBusHandle* handle, uint8_t reg, uint8_t* data);
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CC1101Status cc1101_read_reg(const FuriHalSpiBusHandle* handle, uint8_t reg, uint8_t* data);
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/* High level API */
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@@ -49,7 +49,7 @@ CC1101Status cc1101_read_reg(FuriHalSpiBusHandle* handle, uint8_t reg, uint8_t*
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*
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* @return CC1101Status structure
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*/
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CC1101Status cc1101_reset(FuriHalSpiBusHandle* handle);
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CC1101Status cc1101_reset(const FuriHalSpiBusHandle* handle);
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/** Get status
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*
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@@ -57,7 +57,7 @@ CC1101Status cc1101_reset(FuriHalSpiBusHandle* handle);
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*
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* @return CC1101Status structure
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*/
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CC1101Status cc1101_get_status(FuriHalSpiBusHandle* handle);
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CC1101Status cc1101_get_status(const FuriHalSpiBusHandle* handle);
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/** Wait specific chip state
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*
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@@ -67,7 +67,10 @@ CC1101Status cc1101_get_status(FuriHalSpiBusHandle* handle);
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*
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* @return true on success, false otherwise
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*/
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bool cc1101_wait_status_state(FuriHalSpiBusHandle* handle, CC1101State state, uint32_t timeout_us);
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bool cc1101_wait_status_state(
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const FuriHalSpiBusHandle* handle,
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CC1101State state,
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uint32_t timeout_us);
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/** Enable shutdown mode
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*
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@@ -75,7 +78,7 @@ bool cc1101_wait_status_state(FuriHalSpiBusHandle* handle, CC1101State state, ui
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*
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* @return CC1101Status structure
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*/
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CC1101Status cc1101_shutdown(FuriHalSpiBusHandle* handle);
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CC1101Status cc1101_shutdown(const FuriHalSpiBusHandle* handle);
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/** Get Partnumber
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*
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@@ -83,7 +86,7 @@ CC1101Status cc1101_shutdown(FuriHalSpiBusHandle* handle);
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*
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* @return part number id
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*/
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uint8_t cc1101_get_partnumber(FuriHalSpiBusHandle* handle);
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uint8_t cc1101_get_partnumber(const FuriHalSpiBusHandle* handle);
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/** Get Version
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*
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@@ -91,7 +94,7 @@ uint8_t cc1101_get_partnumber(FuriHalSpiBusHandle* handle);
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*
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* @return version
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*/
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uint8_t cc1101_get_version(FuriHalSpiBusHandle* handle);
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uint8_t cc1101_get_version(const FuriHalSpiBusHandle* handle);
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/** Get raw RSSI value
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*
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@@ -99,7 +102,7 @@ uint8_t cc1101_get_version(FuriHalSpiBusHandle* handle);
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*
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* @return rssi value
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*/
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uint8_t cc1101_get_rssi(FuriHalSpiBusHandle* handle);
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uint8_t cc1101_get_rssi(const FuriHalSpiBusHandle* handle);
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/** Calibrate oscillator
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*
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@@ -107,13 +110,13 @@ uint8_t cc1101_get_rssi(FuriHalSpiBusHandle* handle);
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*
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* @return CC1101Status structure
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*/
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CC1101Status cc1101_calibrate(FuriHalSpiBusHandle* handle);
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CC1101Status cc1101_calibrate(const FuriHalSpiBusHandle* handle);
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/** Switch to idle
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*
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* @param handle - pointer to FuriHalSpiHandle
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*/
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CC1101Status cc1101_switch_to_idle(FuriHalSpiBusHandle* handle);
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CC1101Status cc1101_switch_to_idle(const FuriHalSpiBusHandle* handle);
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/** Switch to RX
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*
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@@ -121,7 +124,7 @@ CC1101Status cc1101_switch_to_idle(FuriHalSpiBusHandle* handle);
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*
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* @return CC1101Status structure
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*/
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CC1101Status cc1101_switch_to_rx(FuriHalSpiBusHandle* handle);
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CC1101Status cc1101_switch_to_rx(const FuriHalSpiBusHandle* handle);
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/** Switch to TX
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*
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@@ -129,7 +132,7 @@ CC1101Status cc1101_switch_to_rx(FuriHalSpiBusHandle* handle);
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*
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* @return CC1101Status structure
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*/
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CC1101Status cc1101_switch_to_tx(FuriHalSpiBusHandle* handle);
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CC1101Status cc1101_switch_to_tx(const FuriHalSpiBusHandle* handle);
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/** Flush RX FIFO
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*
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@@ -137,13 +140,13 @@ CC1101Status cc1101_switch_to_tx(FuriHalSpiBusHandle* handle);
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*
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* @return CC1101Status structure
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*/
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CC1101Status cc1101_flush_rx(FuriHalSpiBusHandle* handle);
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CC1101Status cc1101_flush_rx(const FuriHalSpiBusHandle* handle);
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/** Flush TX FIFO
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*
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* @param handle - pointer to FuriHalSpiHandle
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*/
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CC1101Status cc1101_flush_tx(FuriHalSpiBusHandle* handle);
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CC1101Status cc1101_flush_tx(const FuriHalSpiBusHandle* handle);
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/** Set Frequency
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*
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@@ -152,7 +155,7 @@ CC1101Status cc1101_flush_tx(FuriHalSpiBusHandle* handle);
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*
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* @return real frequency that were synthesized
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*/
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uint32_t cc1101_set_frequency(FuriHalSpiBusHandle* handle, uint32_t value);
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uint32_t cc1101_set_frequency(const FuriHalSpiBusHandle* handle, uint32_t value);
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/** Set Intermediate Frequency
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*
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@@ -161,14 +164,14 @@ uint32_t cc1101_set_frequency(FuriHalSpiBusHandle* handle, uint32_t value);
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*
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* @return real inermediate frequency that were synthesized
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*/
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uint32_t cc1101_set_intermediate_frequency(FuriHalSpiBusHandle* handle, uint32_t value);
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uint32_t cc1101_set_intermediate_frequency(const FuriHalSpiBusHandle* handle, uint32_t value);
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/** Set Power Amplifier level table, ramp
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*
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* @param handle - pointer to FuriHalSpiHandle
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* @param value - array of power level values
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*/
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void cc1101_set_pa_table(FuriHalSpiBusHandle* handle, const uint8_t value[8]);
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void cc1101_set_pa_table(const FuriHalSpiBusHandle* handle, const uint8_t value[8]);
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/** Write FIFO
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*
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@@ -178,7 +181,7 @@ void cc1101_set_pa_table(FuriHalSpiBusHandle* handle, const uint8_t value[8]);
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*
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* @return size, written bytes count
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*/
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uint8_t cc1101_write_fifo(FuriHalSpiBusHandle* handle, const uint8_t* data, uint8_t size);
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uint8_t cc1101_write_fifo(const FuriHalSpiBusHandle* handle, const uint8_t* data, uint8_t size);
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/** Read FIFO
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*
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@@ -188,7 +191,7 @@ uint8_t cc1101_write_fifo(FuriHalSpiBusHandle* handle, const uint8_t* data, uint
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*
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* @return size, read bytes count
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*/
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uint8_t cc1101_read_fifo(FuriHalSpiBusHandle* handle, uint8_t* data, uint8_t* size);
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uint8_t cc1101_read_fifo(const FuriHalSpiBusHandle* handle, uint8_t* data, uint8_t* size);
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#ifdef __cplusplus
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}
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@@ -2,7 +2,7 @@
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#include <furi.h>
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void st25r3916_mask_irq(FuriHalSpiBusHandle* handle, uint32_t mask) {
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void st25r3916_mask_irq(const FuriHalSpiBusHandle* handle, uint32_t mask) {
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furi_assert(handle);
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uint8_t irq_mask_regs[4] = {
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@@ -14,7 +14,7 @@ void st25r3916_mask_irq(FuriHalSpiBusHandle* handle, uint32_t mask) {
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st25r3916_write_burst_regs(handle, ST25R3916_REG_IRQ_MASK_MAIN, irq_mask_regs, 4);
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}
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uint32_t st25r3916_get_irq(FuriHalSpiBusHandle* handle) {
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uint32_t st25r3916_get_irq(const FuriHalSpiBusHandle* handle) {
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furi_assert(handle);
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uint8_t irq_regs[4] = {};
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@@ -32,7 +32,7 @@ uint32_t st25r3916_get_irq(FuriHalSpiBusHandle* handle) {
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return irq;
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}
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|
||||
void st25r3916_write_fifo(FuriHalSpiBusHandle* handle, const uint8_t* buff, size_t bits) {
|
||||
void st25r3916_write_fifo(const FuriHalSpiBusHandle* handle, const uint8_t* buff, size_t bits) {
|
||||
furi_assert(handle);
|
||||
furi_assert(buff);
|
||||
|
||||
@@ -45,7 +45,7 @@ void st25r3916_write_fifo(FuriHalSpiBusHandle* handle, const uint8_t* buff, size
|
||||
}
|
||||
|
||||
bool st25r3916_read_fifo(
|
||||
FuriHalSpiBusHandle* handle,
|
||||
const FuriHalSpiBusHandle* handle,
|
||||
uint8_t* buff,
|
||||
size_t buff_size,
|
||||
size_t* buff_bits) {
|
||||
|
||||
@@ -75,7 +75,7 @@ extern "C" {
|
||||
* @param handle - pointer to FuriHalSpiBusHandle instance
|
||||
* @param mask - mask of interrupts to be disabled
|
||||
*/
|
||||
void st25r3916_mask_irq(FuriHalSpiBusHandle* handle, uint32_t mask);
|
||||
void st25r3916_mask_irq(const FuriHalSpiBusHandle* handle, uint32_t mask);
|
||||
|
||||
/** Get st25r3916 interrupts
|
||||
*
|
||||
@@ -83,7 +83,7 @@ void st25r3916_mask_irq(FuriHalSpiBusHandle* handle, uint32_t mask);
|
||||
*
|
||||
* @return received interrupts
|
||||
*/
|
||||
uint32_t st25r3916_get_irq(FuriHalSpiBusHandle* handle);
|
||||
uint32_t st25r3916_get_irq(const FuriHalSpiBusHandle* handle);
|
||||
|
||||
/** Write FIFO
|
||||
*
|
||||
@@ -91,7 +91,7 @@ uint32_t st25r3916_get_irq(FuriHalSpiBusHandle* handle);
|
||||
* @param buff - buffer to write to FIFO
|
||||
* @param bits - number of bits to write
|
||||
*/
|
||||
void st25r3916_write_fifo(FuriHalSpiBusHandle* handle, const uint8_t* buff, size_t bits);
|
||||
void st25r3916_write_fifo(const FuriHalSpiBusHandle* handle, const uint8_t* buff, size_t bits);
|
||||
|
||||
/** Read FIFO
|
||||
*
|
||||
@@ -103,7 +103,7 @@ void st25r3916_write_fifo(FuriHalSpiBusHandle* handle, const uint8_t* buff, size
|
||||
* @return true if read success, false otherwise
|
||||
*/
|
||||
bool st25r3916_read_fifo(
|
||||
FuriHalSpiBusHandle* handle,
|
||||
const FuriHalSpiBusHandle* handle,
|
||||
uint8_t* buff,
|
||||
size_t buff_size,
|
||||
size_t* buff_bits);
|
||||
|
||||
@@ -28,18 +28,18 @@
|
||||
(ST25R3916_CMD_LEN + \
|
||||
ST25R3916_FIFO_DEPTH) /*!< ST25R3916 communication buffer: CMD + FIFO length */
|
||||
|
||||
static void st25r3916_reg_tx_byte(FuriHalSpiBusHandle* handle, uint8_t byte) {
|
||||
static void st25r3916_reg_tx_byte(const FuriHalSpiBusHandle* handle, uint8_t byte) {
|
||||
uint8_t val = byte;
|
||||
furi_hal_spi_bus_tx(handle, &val, 1, 5);
|
||||
}
|
||||
|
||||
void st25r3916_read_reg(FuriHalSpiBusHandle* handle, uint8_t reg, uint8_t* val) {
|
||||
void st25r3916_read_reg(const FuriHalSpiBusHandle* handle, uint8_t reg, uint8_t* val) {
|
||||
furi_check(handle);
|
||||
st25r3916_read_burst_regs(handle, reg, val, 1);
|
||||
}
|
||||
|
||||
void st25r3916_read_burst_regs(
|
||||
FuriHalSpiBusHandle* handle,
|
||||
const FuriHalSpiBusHandle* handle,
|
||||
uint8_t reg_start,
|
||||
uint8_t* values,
|
||||
uint8_t length) {
|
||||
@@ -59,14 +59,14 @@ void st25r3916_read_burst_regs(
|
||||
furi_hal_gpio_write(handle->cs, true);
|
||||
}
|
||||
|
||||
void st25r3916_write_reg(FuriHalSpiBusHandle* handle, uint8_t reg, uint8_t val) {
|
||||
void st25r3916_write_reg(const FuriHalSpiBusHandle* handle, uint8_t reg, uint8_t val) {
|
||||
furi_check(handle);
|
||||
uint8_t reg_val = val;
|
||||
st25r3916_write_burst_regs(handle, reg, ®_val, 1);
|
||||
}
|
||||
|
||||
void st25r3916_write_burst_regs(
|
||||
FuriHalSpiBusHandle* handle,
|
||||
const FuriHalSpiBusHandle* handle,
|
||||
uint8_t reg_start,
|
||||
const uint8_t* values,
|
||||
uint8_t length) {
|
||||
@@ -86,7 +86,10 @@ void st25r3916_write_burst_regs(
|
||||
furi_hal_gpio_write(handle->cs, true);
|
||||
}
|
||||
|
||||
void st25r3916_reg_write_fifo(FuriHalSpiBusHandle* handle, const uint8_t* buff, size_t length) {
|
||||
void st25r3916_reg_write_fifo(
|
||||
const FuriHalSpiBusHandle* handle,
|
||||
const uint8_t* buff,
|
||||
size_t length) {
|
||||
furi_check(handle);
|
||||
furi_check(buff);
|
||||
furi_check(length);
|
||||
@@ -98,7 +101,7 @@ void st25r3916_reg_write_fifo(FuriHalSpiBusHandle* handle, const uint8_t* buff,
|
||||
furi_hal_gpio_write(handle->cs, true);
|
||||
}
|
||||
|
||||
void st25r3916_reg_read_fifo(FuriHalSpiBusHandle* handle, uint8_t* buff, size_t length) {
|
||||
void st25r3916_reg_read_fifo(const FuriHalSpiBusHandle* handle, uint8_t* buff, size_t length) {
|
||||
furi_check(handle);
|
||||
furi_check(buff);
|
||||
furi_check(length);
|
||||
@@ -110,7 +113,10 @@ void st25r3916_reg_read_fifo(FuriHalSpiBusHandle* handle, uint8_t* buff, size_t
|
||||
furi_hal_gpio_write(handle->cs, true);
|
||||
}
|
||||
|
||||
void st25r3916_write_pta_mem(FuriHalSpiBusHandle* handle, const uint8_t* values, size_t length) {
|
||||
void st25r3916_write_pta_mem(
|
||||
const FuriHalSpiBusHandle* handle,
|
||||
const uint8_t* values,
|
||||
size_t length) {
|
||||
furi_check(handle);
|
||||
furi_check(values);
|
||||
furi_check(length);
|
||||
@@ -122,7 +128,7 @@ void st25r3916_write_pta_mem(FuriHalSpiBusHandle* handle, const uint8_t* values,
|
||||
furi_hal_gpio_write(handle->cs, true);
|
||||
}
|
||||
|
||||
void st25r3916_read_pta_mem(FuriHalSpiBusHandle* handle, uint8_t* buff, size_t length) {
|
||||
void st25r3916_read_pta_mem(const FuriHalSpiBusHandle* handle, uint8_t* buff, size_t length) {
|
||||
furi_check(handle);
|
||||
furi_check(buff);
|
||||
furi_check(length);
|
||||
@@ -136,7 +142,10 @@ void st25r3916_read_pta_mem(FuriHalSpiBusHandle* handle, uint8_t* buff, size_t l
|
||||
memcpy(buff, tmp_buff + 1, length);
|
||||
}
|
||||
|
||||
void st25r3916_write_ptf_mem(FuriHalSpiBusHandle* handle, const uint8_t* values, size_t length) {
|
||||
void st25r3916_write_ptf_mem(
|
||||
const FuriHalSpiBusHandle* handle,
|
||||
const uint8_t* values,
|
||||
size_t length) {
|
||||
furi_check(handle);
|
||||
furi_check(values);
|
||||
|
||||
@@ -146,7 +155,7 @@ void st25r3916_write_ptf_mem(FuriHalSpiBusHandle* handle, const uint8_t* values,
|
||||
furi_hal_gpio_write(handle->cs, true);
|
||||
}
|
||||
|
||||
void st25r3916_write_pttsn_mem(FuriHalSpiBusHandle* handle, uint8_t* buff, size_t length) {
|
||||
void st25r3916_write_pttsn_mem(const FuriHalSpiBusHandle* handle, uint8_t* buff, size_t length) {
|
||||
furi_check(handle);
|
||||
furi_check(buff);
|
||||
|
||||
@@ -156,7 +165,7 @@ void st25r3916_write_pttsn_mem(FuriHalSpiBusHandle* handle, uint8_t* buff, size_
|
||||
furi_hal_gpio_write(handle->cs, true);
|
||||
}
|
||||
|
||||
void st25r3916_direct_cmd(FuriHalSpiBusHandle* handle, uint8_t cmd) {
|
||||
void st25r3916_direct_cmd(const FuriHalSpiBusHandle* handle, uint8_t cmd) {
|
||||
furi_check(handle);
|
||||
|
||||
furi_hal_gpio_write(handle->cs, false);
|
||||
@@ -164,7 +173,7 @@ void st25r3916_direct_cmd(FuriHalSpiBusHandle* handle, uint8_t cmd) {
|
||||
furi_hal_gpio_write(handle->cs, true);
|
||||
}
|
||||
|
||||
void st25r3916_read_test_reg(FuriHalSpiBusHandle* handle, uint8_t reg, uint8_t* val) {
|
||||
void st25r3916_read_test_reg(const FuriHalSpiBusHandle* handle, uint8_t reg, uint8_t* val) {
|
||||
furi_check(handle);
|
||||
|
||||
furi_hal_gpio_write(handle->cs, false);
|
||||
@@ -174,7 +183,7 @@ void st25r3916_read_test_reg(FuriHalSpiBusHandle* handle, uint8_t reg, uint8_t*
|
||||
furi_hal_gpio_write(handle->cs, true);
|
||||
}
|
||||
|
||||
void st25r3916_write_test_reg(FuriHalSpiBusHandle* handle, uint8_t reg, uint8_t val) {
|
||||
void st25r3916_write_test_reg(const FuriHalSpiBusHandle* handle, uint8_t reg, uint8_t val) {
|
||||
furi_check(handle);
|
||||
|
||||
furi_hal_gpio_write(handle->cs, false);
|
||||
@@ -184,7 +193,7 @@ void st25r3916_write_test_reg(FuriHalSpiBusHandle* handle, uint8_t reg, uint8_t
|
||||
furi_hal_gpio_write(handle->cs, true);
|
||||
}
|
||||
|
||||
void st25r3916_clear_reg_bits(FuriHalSpiBusHandle* handle, uint8_t reg, uint8_t clr_mask) {
|
||||
void st25r3916_clear_reg_bits(const FuriHalSpiBusHandle* handle, uint8_t reg, uint8_t clr_mask) {
|
||||
furi_check(handle);
|
||||
|
||||
uint8_t reg_val = 0;
|
||||
@@ -195,7 +204,7 @@ void st25r3916_clear_reg_bits(FuriHalSpiBusHandle* handle, uint8_t reg, uint8_t
|
||||
}
|
||||
}
|
||||
|
||||
void st25r3916_set_reg_bits(FuriHalSpiBusHandle* handle, uint8_t reg, uint8_t set_mask) {
|
||||
void st25r3916_set_reg_bits(const FuriHalSpiBusHandle* handle, uint8_t reg, uint8_t set_mask) {
|
||||
furi_check(handle);
|
||||
|
||||
uint8_t reg_val = 0;
|
||||
@@ -207,7 +216,7 @@ void st25r3916_set_reg_bits(FuriHalSpiBusHandle* handle, uint8_t reg, uint8_t se
|
||||
}
|
||||
|
||||
void st25r3916_change_reg_bits(
|
||||
FuriHalSpiBusHandle* handle,
|
||||
const FuriHalSpiBusHandle* handle,
|
||||
uint8_t reg,
|
||||
uint8_t mask,
|
||||
uint8_t value) {
|
||||
@@ -217,7 +226,7 @@ void st25r3916_change_reg_bits(
|
||||
}
|
||||
|
||||
void st25r3916_modify_reg(
|
||||
FuriHalSpiBusHandle* handle,
|
||||
const FuriHalSpiBusHandle* handle,
|
||||
uint8_t reg,
|
||||
uint8_t clr_mask,
|
||||
uint8_t set_mask) {
|
||||
@@ -233,7 +242,7 @@ void st25r3916_modify_reg(
|
||||
}
|
||||
|
||||
void st25r3916_change_test_reg_bits(
|
||||
FuriHalSpiBusHandle* handle,
|
||||
const FuriHalSpiBusHandle* handle,
|
||||
uint8_t reg,
|
||||
uint8_t mask,
|
||||
uint8_t value) {
|
||||
@@ -248,7 +257,7 @@ void st25r3916_change_test_reg_bits(
|
||||
}
|
||||
}
|
||||
|
||||
bool st25r3916_check_reg(FuriHalSpiBusHandle* handle, uint8_t reg, uint8_t mask, uint8_t val) {
|
||||
bool st25r3916_check_reg(const FuriHalSpiBusHandle* handle, uint8_t reg, uint8_t mask, uint8_t val) {
|
||||
furi_check(handle);
|
||||
|
||||
uint8_t reg_val = 0;
|
||||
|
||||
@@ -967,7 +967,7 @@ extern "C" {
|
||||
* @param reg - register address
|
||||
* @param val - pointer to the variable to store the read value
|
||||
*/
|
||||
void st25r3916_read_reg(FuriHalSpiBusHandle* handle, uint8_t reg, uint8_t* val);
|
||||
void st25r3916_read_reg(const FuriHalSpiBusHandle* handle, uint8_t reg, uint8_t* val);
|
||||
|
||||
/** Read multiple registers
|
||||
*
|
||||
@@ -977,7 +977,7 @@ void st25r3916_read_reg(FuriHalSpiBusHandle* handle, uint8_t reg, uint8_t* val);
|
||||
* @param length - number of registers to read
|
||||
*/
|
||||
void st25r3916_read_burst_regs(
|
||||
FuriHalSpiBusHandle* handle,
|
||||
const FuriHalSpiBusHandle* handle,
|
||||
uint8_t reg_start,
|
||||
uint8_t* values,
|
||||
uint8_t length);
|
||||
@@ -988,7 +988,7 @@ void st25r3916_read_burst_regs(
|
||||
* @param reg - register address
|
||||
* @param val - value to write
|
||||
*/
|
||||
void st25r3916_write_reg(FuriHalSpiBusHandle* handle, uint8_t reg, uint8_t val);
|
||||
void st25r3916_write_reg(const FuriHalSpiBusHandle* handle, uint8_t reg, uint8_t val);
|
||||
|
||||
/** Write multiple registers
|
||||
*
|
||||
@@ -998,7 +998,7 @@ void st25r3916_write_reg(FuriHalSpiBusHandle* handle, uint8_t reg, uint8_t val);
|
||||
* @param length - number of registers to write
|
||||
*/
|
||||
void st25r3916_write_burst_regs(
|
||||
FuriHalSpiBusHandle* handle,
|
||||
const FuriHalSpiBusHandle* handle,
|
||||
uint8_t reg_start,
|
||||
const uint8_t* values,
|
||||
uint8_t length);
|
||||
@@ -1009,7 +1009,10 @@ void st25r3916_write_burst_regs(
|
||||
* @param buff - buffer to write to FIFO
|
||||
* @param length - number of bytes to write
|
||||
*/
|
||||
void st25r3916_reg_write_fifo(FuriHalSpiBusHandle* handle, const uint8_t* buff, size_t length);
|
||||
void st25r3916_reg_write_fifo(
|
||||
const FuriHalSpiBusHandle* handle,
|
||||
const uint8_t* buff,
|
||||
size_t length);
|
||||
|
||||
/** Read fifo register
|
||||
*
|
||||
@@ -1017,7 +1020,7 @@ void st25r3916_reg_write_fifo(FuriHalSpiBusHandle* handle, const uint8_t* buff,
|
||||
* @param buff - buffer to store the read values
|
||||
* @param length - number of bytes to read
|
||||
*/
|
||||
void st25r3916_reg_read_fifo(FuriHalSpiBusHandle* handle, uint8_t* buff, size_t length);
|
||||
void st25r3916_reg_read_fifo(const FuriHalSpiBusHandle* handle, uint8_t* buff, size_t length);
|
||||
|
||||
/** Write PTA memory register
|
||||
*
|
||||
@@ -1025,7 +1028,10 @@ void st25r3916_reg_read_fifo(FuriHalSpiBusHandle* handle, uint8_t* buff, size_t
|
||||
* @param values - pointer to buffer to write
|
||||
* @param length - number of bytes to write
|
||||
*/
|
||||
void st25r3916_write_pta_mem(FuriHalSpiBusHandle* handle, const uint8_t* values, size_t length);
|
||||
void st25r3916_write_pta_mem(
|
||||
const FuriHalSpiBusHandle* handle,
|
||||
const uint8_t* values,
|
||||
size_t length);
|
||||
|
||||
/** Read PTA memory register
|
||||
*
|
||||
@@ -1033,7 +1039,7 @@ void st25r3916_write_pta_mem(FuriHalSpiBusHandle* handle, const uint8_t* values,
|
||||
* @param values - buffer to store the read values
|
||||
* @param length - number of bytes to read
|
||||
*/
|
||||
void st25r3916_read_pta_mem(FuriHalSpiBusHandle* handle, uint8_t* values, size_t length);
|
||||
void st25r3916_read_pta_mem(const FuriHalSpiBusHandle* handle, uint8_t* values, size_t length);
|
||||
|
||||
/** Write PTF memory register
|
||||
*
|
||||
@@ -1041,7 +1047,10 @@ void st25r3916_read_pta_mem(FuriHalSpiBusHandle* handle, uint8_t* values, size_t
|
||||
* @param values - pointer to buffer to write
|
||||
* @param length - number of bytes to write
|
||||
*/
|
||||
void st25r3916_write_ptf_mem(FuriHalSpiBusHandle* handle, const uint8_t* values, size_t length);
|
||||
void st25r3916_write_ptf_mem(
|
||||
const FuriHalSpiBusHandle* handle,
|
||||
const uint8_t* values,
|
||||
size_t length);
|
||||
|
||||
/** Read PTTSN memory register
|
||||
*
|
||||
@@ -1049,21 +1058,21 @@ void st25r3916_write_ptf_mem(FuriHalSpiBusHandle* handle, const uint8_t* values,
|
||||
* @param values - pointer to buffer to write
|
||||
* @param length - number of bytes to write
|
||||
*/
|
||||
void st25r3916_write_pttsn_mem(FuriHalSpiBusHandle* handle, uint8_t* values, size_t length);
|
||||
void st25r3916_write_pttsn_mem(const FuriHalSpiBusHandle* handle, uint8_t* values, size_t length);
|
||||
|
||||
/** Send Direct command
|
||||
*
|
||||
* @param handle - pointer to FuriHalSpiBusHandle instance
|
||||
* @param cmd - direct command
|
||||
*/
|
||||
void st25r3916_direct_cmd(FuriHalSpiBusHandle* handle, uint8_t cmd);
|
||||
void st25r3916_direct_cmd(const FuriHalSpiBusHandle* handle, uint8_t cmd);
|
||||
|
||||
/** Read test register
|
||||
* @param handle - pointer to FuriHalSpiBusHandle instance
|
||||
* @param reg - register address
|
||||
* @param val - pointer to the variable to store the read value
|
||||
*/
|
||||
void st25r3916_read_test_reg(FuriHalSpiBusHandle* handle, uint8_t reg, uint8_t* val);
|
||||
void st25r3916_read_test_reg(const FuriHalSpiBusHandle* handle, uint8_t reg, uint8_t* val);
|
||||
|
||||
/** Write test register
|
||||
*
|
||||
@@ -1071,7 +1080,7 @@ void st25r3916_read_test_reg(FuriHalSpiBusHandle* handle, uint8_t reg, uint8_t*
|
||||
* @param reg - register address
|
||||
* @param val - value to write
|
||||
*/
|
||||
void st25r3916_write_test_reg(FuriHalSpiBusHandle* handle, uint8_t reg, uint8_t val);
|
||||
void st25r3916_write_test_reg(const FuriHalSpiBusHandle* handle, uint8_t reg, uint8_t val);
|
||||
|
||||
/** Clear register bits
|
||||
*
|
||||
@@ -1079,7 +1088,7 @@ void st25r3916_write_test_reg(FuriHalSpiBusHandle* handle, uint8_t reg, uint8_t
|
||||
* @param reg - register address
|
||||
* @param clr_mask - bit mask to clear
|
||||
*/
|
||||
void st25r3916_clear_reg_bits(FuriHalSpiBusHandle* handle, uint8_t reg, uint8_t clr_mask);
|
||||
void st25r3916_clear_reg_bits(const FuriHalSpiBusHandle* handle, uint8_t reg, uint8_t clr_mask);
|
||||
|
||||
/** Set register bits
|
||||
*
|
||||
@@ -1087,7 +1096,7 @@ void st25r3916_clear_reg_bits(FuriHalSpiBusHandle* handle, uint8_t reg, uint8_t
|
||||
* @param reg - register address
|
||||
* @param set_mask - bit mask to set
|
||||
*/
|
||||
void st25r3916_set_reg_bits(FuriHalSpiBusHandle* handle, uint8_t reg, uint8_t set_mask);
|
||||
void st25r3916_set_reg_bits(const FuriHalSpiBusHandle* handle, uint8_t reg, uint8_t set_mask);
|
||||
|
||||
/** Change register bits
|
||||
*
|
||||
@@ -1097,7 +1106,7 @@ void st25r3916_set_reg_bits(FuriHalSpiBusHandle* handle, uint8_t reg, uint8_t se
|
||||
* @param value - new register value to write
|
||||
*/
|
||||
void st25r3916_change_reg_bits(
|
||||
FuriHalSpiBusHandle* handle,
|
||||
const FuriHalSpiBusHandle* handle,
|
||||
uint8_t reg,
|
||||
uint8_t mask,
|
||||
uint8_t value);
|
||||
@@ -1110,7 +1119,7 @@ void st25r3916_change_reg_bits(
|
||||
* @param set_mask - bit mask to set
|
||||
*/
|
||||
void st25r3916_modify_reg(
|
||||
FuriHalSpiBusHandle* handle,
|
||||
const FuriHalSpiBusHandle* handle,
|
||||
uint8_t reg,
|
||||
uint8_t clr_mask,
|
||||
uint8_t set_mask);
|
||||
@@ -1123,7 +1132,7 @@ void st25r3916_modify_reg(
|
||||
* @param value - new register value to write
|
||||
*/
|
||||
void st25r3916_change_test_reg_bits(
|
||||
FuriHalSpiBusHandle* handle,
|
||||
const FuriHalSpiBusHandle* handle,
|
||||
uint8_t reg,
|
||||
uint8_t mask,
|
||||
uint8_t value);
|
||||
@@ -1137,7 +1146,7 @@ void st25r3916_change_test_reg_bits(
|
||||
*
|
||||
* @return true if register value matches the expected value, false otherwise
|
||||
*/
|
||||
bool st25r3916_check_reg(FuriHalSpiBusHandle* handle, uint8_t reg, uint8_t mask, uint8_t val);
|
||||
bool st25r3916_check_reg(const FuriHalSpiBusHandle* handle, uint8_t reg, uint8_t mask, uint8_t val);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
|
||||
@@ -1469,20 +1469,20 @@ Function,+,furi_hal_speaker_release,void,
|
||||
Function,+,furi_hal_speaker_set_volume,void,float
|
||||
Function,+,furi_hal_speaker_start,void,"float, float"
|
||||
Function,+,furi_hal_speaker_stop,void,
|
||||
Function,+,furi_hal_spi_acquire,void,FuriHalSpiBusHandle*
|
||||
Function,+,furi_hal_spi_acquire,void,const FuriHalSpiBusHandle*
|
||||
Function,+,furi_hal_spi_bus_deinit,void,FuriHalSpiBus*
|
||||
Function,+,furi_hal_spi_bus_handle_deinit,void,FuriHalSpiBusHandle*
|
||||
Function,+,furi_hal_spi_bus_handle_init,void,FuriHalSpiBusHandle*
|
||||
Function,+,furi_hal_spi_bus_handle_deinit,void,const FuriHalSpiBusHandle*
|
||||
Function,+,furi_hal_spi_bus_handle_init,void,const FuriHalSpiBusHandle*
|
||||
Function,+,furi_hal_spi_bus_init,void,FuriHalSpiBus*
|
||||
Function,+,furi_hal_spi_bus_rx,_Bool,"FuriHalSpiBusHandle*, uint8_t*, size_t, uint32_t"
|
||||
Function,+,furi_hal_spi_bus_trx,_Bool,"FuriHalSpiBusHandle*, const uint8_t*, uint8_t*, size_t, uint32_t"
|
||||
Function,+,furi_hal_spi_bus_trx_dma,_Bool,"FuriHalSpiBusHandle*, uint8_t*, uint8_t*, size_t, uint32_t"
|
||||
Function,+,furi_hal_spi_bus_tx,_Bool,"FuriHalSpiBusHandle*, const uint8_t*, size_t, uint32_t"
|
||||
Function,+,furi_hal_spi_bus_rx,_Bool,"const FuriHalSpiBusHandle*, uint8_t*, size_t, uint32_t"
|
||||
Function,+,furi_hal_spi_bus_trx,_Bool,"const FuriHalSpiBusHandle*, const uint8_t*, uint8_t*, size_t, uint32_t"
|
||||
Function,+,furi_hal_spi_bus_trx_dma,_Bool,"const FuriHalSpiBusHandle*, uint8_t*, uint8_t*, size_t, uint32_t"
|
||||
Function,+,furi_hal_spi_bus_tx,_Bool,"const FuriHalSpiBusHandle*, const uint8_t*, size_t, uint32_t"
|
||||
Function,-,furi_hal_spi_config_deinit_early,void,
|
||||
Function,-,furi_hal_spi_config_init,void,
|
||||
Function,-,furi_hal_spi_config_init_early,void,
|
||||
Function,-,furi_hal_spi_dma_init,void,
|
||||
Function,+,furi_hal_spi_release,void,FuriHalSpiBusHandle*
|
||||
Function,+,furi_hal_spi_release,void,const FuriHalSpiBusHandle*
|
||||
Function,+,furi_hal_switch,void,void*
|
||||
Function,+,furi_hal_usb_ccid_insert_smartcard,void,
|
||||
Function,+,furi_hal_usb_ccid_remove_smartcard,void,
|
||||
@@ -2536,29 +2536,29 @@ Function,+,srand,void,unsigned
|
||||
Function,-,srand48,void,long
|
||||
Function,-,srandom,void,unsigned
|
||||
Function,+,sscanf,int,"const char*, const char*, ..."
|
||||
Function,+,st25r3916_change_reg_bits,void,"FuriHalSpiBusHandle*, uint8_t, uint8_t, uint8_t"
|
||||
Function,+,st25r3916_change_test_reg_bits,void,"FuriHalSpiBusHandle*, uint8_t, uint8_t, uint8_t"
|
||||
Function,+,st25r3916_check_reg,_Bool,"FuriHalSpiBusHandle*, uint8_t, uint8_t, uint8_t"
|
||||
Function,+,st25r3916_clear_reg_bits,void,"FuriHalSpiBusHandle*, uint8_t, uint8_t"
|
||||
Function,+,st25r3916_direct_cmd,void,"FuriHalSpiBusHandle*, uint8_t"
|
||||
Function,+,st25r3916_get_irq,uint32_t,FuriHalSpiBusHandle*
|
||||
Function,+,st25r3916_mask_irq,void,"FuriHalSpiBusHandle*, uint32_t"
|
||||
Function,+,st25r3916_modify_reg,void,"FuriHalSpiBusHandle*, uint8_t, uint8_t, uint8_t"
|
||||
Function,+,st25r3916_read_burst_regs,void,"FuriHalSpiBusHandle*, uint8_t, uint8_t*, uint8_t"
|
||||
Function,+,st25r3916_read_fifo,_Bool,"FuriHalSpiBusHandle*, uint8_t*, size_t, size_t*"
|
||||
Function,+,st25r3916_read_pta_mem,void,"FuriHalSpiBusHandle*, uint8_t*, size_t"
|
||||
Function,+,st25r3916_read_reg,void,"FuriHalSpiBusHandle*, uint8_t, uint8_t*"
|
||||
Function,+,st25r3916_read_test_reg,void,"FuriHalSpiBusHandle*, uint8_t, uint8_t*"
|
||||
Function,+,st25r3916_reg_read_fifo,void,"FuriHalSpiBusHandle*, uint8_t*, size_t"
|
||||
Function,+,st25r3916_reg_write_fifo,void,"FuriHalSpiBusHandle*, const uint8_t*, size_t"
|
||||
Function,+,st25r3916_set_reg_bits,void,"FuriHalSpiBusHandle*, uint8_t, uint8_t"
|
||||
Function,+,st25r3916_write_burst_regs,void,"FuriHalSpiBusHandle*, uint8_t, const uint8_t*, uint8_t"
|
||||
Function,+,st25r3916_write_fifo,void,"FuriHalSpiBusHandle*, const uint8_t*, size_t"
|
||||
Function,+,st25r3916_write_pta_mem,void,"FuriHalSpiBusHandle*, const uint8_t*, size_t"
|
||||
Function,+,st25r3916_write_ptf_mem,void,"FuriHalSpiBusHandle*, const uint8_t*, size_t"
|
||||
Function,+,st25r3916_write_pttsn_mem,void,"FuriHalSpiBusHandle*, uint8_t*, size_t"
|
||||
Function,+,st25r3916_write_reg,void,"FuriHalSpiBusHandle*, uint8_t, uint8_t"
|
||||
Function,+,st25r3916_write_test_reg,void,"FuriHalSpiBusHandle*, uint8_t, uint8_t"
|
||||
Function,+,st25r3916_change_reg_bits,void,"const FuriHalSpiBusHandle*, uint8_t, uint8_t, uint8_t"
|
||||
Function,+,st25r3916_change_test_reg_bits,void,"const FuriHalSpiBusHandle*, uint8_t, uint8_t, uint8_t"
|
||||
Function,+,st25r3916_check_reg,_Bool,"const FuriHalSpiBusHandle*, uint8_t, uint8_t, uint8_t"
|
||||
Function,+,st25r3916_clear_reg_bits,void,"const FuriHalSpiBusHandle*, uint8_t, uint8_t"
|
||||
Function,+,st25r3916_direct_cmd,void,"const FuriHalSpiBusHandle*, uint8_t"
|
||||
Function,+,st25r3916_get_irq,uint32_t,const FuriHalSpiBusHandle*
|
||||
Function,+,st25r3916_mask_irq,void,"const FuriHalSpiBusHandle*, uint32_t"
|
||||
Function,+,st25r3916_modify_reg,void,"const FuriHalSpiBusHandle*, uint8_t, uint8_t, uint8_t"
|
||||
Function,+,st25r3916_read_burst_regs,void,"const FuriHalSpiBusHandle*, uint8_t, uint8_t*, uint8_t"
|
||||
Function,+,st25r3916_read_fifo,_Bool,"const FuriHalSpiBusHandle*, uint8_t*, size_t, size_t*"
|
||||
Function,+,st25r3916_read_pta_mem,void,"const FuriHalSpiBusHandle*, uint8_t*, size_t"
|
||||
Function,+,st25r3916_read_reg,void,"const FuriHalSpiBusHandle*, uint8_t, uint8_t*"
|
||||
Function,+,st25r3916_read_test_reg,void,"const FuriHalSpiBusHandle*, uint8_t, uint8_t*"
|
||||
Function,+,st25r3916_reg_read_fifo,void,"const FuriHalSpiBusHandle*, uint8_t*, size_t"
|
||||
Function,+,st25r3916_reg_write_fifo,void,"const FuriHalSpiBusHandle*, const uint8_t*, size_t"
|
||||
Function,+,st25r3916_set_reg_bits,void,"const FuriHalSpiBusHandle*, uint8_t, uint8_t"
|
||||
Function,+,st25r3916_write_burst_regs,void,"const FuriHalSpiBusHandle*, uint8_t, const uint8_t*, uint8_t"
|
||||
Function,+,st25r3916_write_fifo,void,"const FuriHalSpiBusHandle*, const uint8_t*, size_t"
|
||||
Function,+,st25r3916_write_pta_mem,void,"const FuriHalSpiBusHandle*, const uint8_t*, size_t"
|
||||
Function,+,st25r3916_write_ptf_mem,void,"const FuriHalSpiBusHandle*, const uint8_t*, size_t"
|
||||
Function,+,st25r3916_write_pttsn_mem,void,"const FuriHalSpiBusHandle*, uint8_t*, size_t"
|
||||
Function,+,st25r3916_write_reg,void,"const FuriHalSpiBusHandle*, uint8_t, uint8_t"
|
||||
Function,+,st25r3916_write_test_reg,void,"const FuriHalSpiBusHandle*, uint8_t, uint8_t"
|
||||
Function,+,storage_common_copy,FS_Error,"Storage*, const char*, const char*"
|
||||
Function,+,storage_common_equivalent_path,_Bool,"Storage*, const char*, const char*"
|
||||
Function,+,storage_common_exists,_Bool,"Storage*, const char*"
|
||||
@@ -2944,10 +2944,10 @@ Variable,+,furi_hal_i2c_bus_power,FuriHalI2cBus,
|
||||
Variable,+,furi_hal_i2c_handle_external,FuriHalI2cBusHandle,
|
||||
Variable,+,furi_hal_i2c_handle_power,FuriHalI2cBusHandle,
|
||||
Variable,+,furi_hal_spi_bus_d,FuriHalSpiBus,
|
||||
Variable,+,furi_hal_spi_bus_handle_display,FuriHalSpiBusHandle,
|
||||
Variable,+,furi_hal_spi_bus_handle_external,FuriHalSpiBusHandle,
|
||||
Variable,+,furi_hal_spi_bus_handle_sd_fast,FuriHalSpiBusHandle,
|
||||
Variable,+,furi_hal_spi_bus_handle_sd_slow,FuriHalSpiBusHandle,
|
||||
Variable,+,furi_hal_spi_bus_handle_display,const FuriHalSpiBusHandle,
|
||||
Variable,+,furi_hal_spi_bus_handle_external,const FuriHalSpiBusHandle,
|
||||
Variable,+,furi_hal_spi_bus_handle_sd_fast,const FuriHalSpiBusHandle,
|
||||
Variable,+,furi_hal_spi_bus_handle_sd_slow,const FuriHalSpiBusHandle,
|
||||
Variable,+,furi_hal_spi_bus_r,FuriHalSpiBus,
|
||||
Variable,+,furi_hal_spi_preset_1edge_low_16m,const LL_SPI_InitTypeDef,
|
||||
Variable,+,furi_hal_spi_preset_1edge_low_2m,const LL_SPI_InitTypeDef,
|
||||
|
||||
|
@@ -143,7 +143,7 @@ FuriHalSpiBus furi_hal_spi_bus_d = {
|
||||
/* SPI Bus Handles */
|
||||
|
||||
inline static void furi_hal_spi_bus_r_handle_event_callback(
|
||||
FuriHalSpiBusHandle* handle,
|
||||
const FuriHalSpiBusHandle* handle,
|
||||
FuriHalSpiBusHandleEvent event,
|
||||
const LL_SPI_InitTypeDef* preset) {
|
||||
if(event == FuriHalSpiBusHandleEventInit) {
|
||||
@@ -189,7 +189,7 @@ inline static void furi_hal_spi_bus_r_handle_event_callback(
|
||||
}
|
||||
|
||||
inline static void furi_hal_spi_bus_nfc_handle_event_callback(
|
||||
FuriHalSpiBusHandle* handle,
|
||||
const FuriHalSpiBusHandle* handle,
|
||||
FuriHalSpiBusHandleEvent event,
|
||||
const LL_SPI_InitTypeDef* preset) {
|
||||
if(event == FuriHalSpiBusHandleEventInit) {
|
||||
@@ -255,12 +255,12 @@ inline static void furi_hal_spi_bus_nfc_handle_event_callback(
|
||||
}
|
||||
|
||||
static void furi_hal_spi_bus_handle_external_event_callback(
|
||||
FuriHalSpiBusHandle* handle,
|
||||
const FuriHalSpiBusHandle* handle,
|
||||
FuriHalSpiBusHandleEvent event) {
|
||||
furi_hal_spi_bus_r_handle_event_callback(handle, event, &furi_hal_spi_preset_1edge_low_2m);
|
||||
}
|
||||
|
||||
FuriHalSpiBusHandle furi_hal_spi_bus_handle_external = {
|
||||
const FuriHalSpiBusHandle furi_hal_spi_bus_handle_external = {
|
||||
.bus = &furi_hal_spi_bus_r,
|
||||
.callback = furi_hal_spi_bus_handle_external_event_callback,
|
||||
.miso = &gpio_ext_pa6,
|
||||
@@ -270,7 +270,7 @@ FuriHalSpiBusHandle furi_hal_spi_bus_handle_external = {
|
||||
};
|
||||
|
||||
inline static void furi_hal_spi_bus_d_handle_event_callback(
|
||||
FuriHalSpiBusHandle* handle,
|
||||
const FuriHalSpiBusHandle* handle,
|
||||
FuriHalSpiBusHandleEvent event,
|
||||
const LL_SPI_InitTypeDef* preset) {
|
||||
if(event == FuriHalSpiBusHandleEventInit) {
|
||||
@@ -311,12 +311,12 @@ inline static void furi_hal_spi_bus_d_handle_event_callback(
|
||||
}
|
||||
|
||||
static void furi_hal_spi_bus_handle_display_event_callback(
|
||||
FuriHalSpiBusHandle* handle,
|
||||
const FuriHalSpiBusHandle* handle,
|
||||
FuriHalSpiBusHandleEvent event) {
|
||||
furi_hal_spi_bus_d_handle_event_callback(handle, event, &furi_hal_spi_preset_1edge_low_4m);
|
||||
}
|
||||
|
||||
FuriHalSpiBusHandle furi_hal_spi_bus_handle_display = {
|
||||
const FuriHalSpiBusHandle furi_hal_spi_bus_handle_display = {
|
||||
.bus = &furi_hal_spi_bus_d,
|
||||
.callback = furi_hal_spi_bus_handle_display_event_callback,
|
||||
.miso = &gpio_spi_d_miso,
|
||||
@@ -326,12 +326,12 @@ FuriHalSpiBusHandle furi_hal_spi_bus_handle_display = {
|
||||
};
|
||||
|
||||
static void furi_hal_spi_bus_handle_sd_fast_event_callback(
|
||||
FuriHalSpiBusHandle* handle,
|
||||
const FuriHalSpiBusHandle* handle,
|
||||
FuriHalSpiBusHandleEvent event) {
|
||||
furi_hal_spi_bus_d_handle_event_callback(handle, event, &furi_hal_spi_preset_1edge_low_16m);
|
||||
}
|
||||
|
||||
FuriHalSpiBusHandle furi_hal_spi_bus_handle_sd_fast = {
|
||||
const FuriHalSpiBusHandle furi_hal_spi_bus_handle_sd_fast = {
|
||||
.bus = &furi_hal_spi_bus_d,
|
||||
.callback = furi_hal_spi_bus_handle_sd_fast_event_callback,
|
||||
.miso = &gpio_spi_d_miso,
|
||||
@@ -341,12 +341,12 @@ FuriHalSpiBusHandle furi_hal_spi_bus_handle_sd_fast = {
|
||||
};
|
||||
|
||||
static void furi_hal_spi_bus_handle_sd_slow_event_callback(
|
||||
FuriHalSpiBusHandle* handle,
|
||||
const FuriHalSpiBusHandle* handle,
|
||||
FuriHalSpiBusHandleEvent event) {
|
||||
furi_hal_spi_bus_d_handle_event_callback(handle, event, &furi_hal_spi_preset_1edge_low_2m);
|
||||
}
|
||||
|
||||
FuriHalSpiBusHandle furi_hal_spi_bus_handle_sd_slow = {
|
||||
const FuriHalSpiBusHandle furi_hal_spi_bus_handle_sd_slow = {
|
||||
.bus = &furi_hal_spi_bus_d,
|
||||
.callback = furi_hal_spi_bus_handle_sd_slow_event_callback,
|
||||
.miso = &gpio_spi_d_miso,
|
||||
|
||||
@@ -39,16 +39,16 @@ extern FuriHalSpiBus furi_hal_spi_bus_d;
|
||||
* Bus pins are floating on inactive state, CS high after initialization
|
||||
*
|
||||
*/
|
||||
extern FuriHalSpiBusHandle furi_hal_spi_bus_handle_external;
|
||||
extern const FuriHalSpiBusHandle furi_hal_spi_bus_handle_external;
|
||||
|
||||
/** ST7567(Display) on `furi_hal_spi_bus_d` */
|
||||
extern FuriHalSpiBusHandle furi_hal_spi_bus_handle_display;
|
||||
extern const FuriHalSpiBusHandle furi_hal_spi_bus_handle_display;
|
||||
|
||||
/** SdCard in fast mode on `furi_hal_spi_bus_d` */
|
||||
extern FuriHalSpiBusHandle furi_hal_spi_bus_handle_sd_fast;
|
||||
extern const FuriHalSpiBusHandle furi_hal_spi_bus_handle_sd_fast;
|
||||
|
||||
/** SdCard in slow mode on `furi_hal_spi_bus_d` */
|
||||
extern FuriHalSpiBusHandle furi_hal_spi_bus_handle_sd_slow;
|
||||
extern const FuriHalSpiBusHandle furi_hal_spi_bus_handle_sd_slow;
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
|
||||
@@ -1659,20 +1659,20 @@ Function,+,furi_hal_speaker_release,void,
|
||||
Function,+,furi_hal_speaker_set_volume,void,float
|
||||
Function,+,furi_hal_speaker_start,void,"float, float"
|
||||
Function,+,furi_hal_speaker_stop,void,
|
||||
Function,+,furi_hal_spi_acquire,void,FuriHalSpiBusHandle*
|
||||
Function,+,furi_hal_spi_acquire,void,const FuriHalSpiBusHandle*
|
||||
Function,+,furi_hal_spi_bus_deinit,void,FuriHalSpiBus*
|
||||
Function,+,furi_hal_spi_bus_handle_deinit,void,FuriHalSpiBusHandle*
|
||||
Function,+,furi_hal_spi_bus_handle_init,void,FuriHalSpiBusHandle*
|
||||
Function,+,furi_hal_spi_bus_handle_deinit,void,const FuriHalSpiBusHandle*
|
||||
Function,+,furi_hal_spi_bus_handle_init,void,const FuriHalSpiBusHandle*
|
||||
Function,+,furi_hal_spi_bus_init,void,FuriHalSpiBus*
|
||||
Function,+,furi_hal_spi_bus_rx,_Bool,"FuriHalSpiBusHandle*, uint8_t*, size_t, uint32_t"
|
||||
Function,+,furi_hal_spi_bus_trx,_Bool,"FuriHalSpiBusHandle*, const uint8_t*, uint8_t*, size_t, uint32_t"
|
||||
Function,+,furi_hal_spi_bus_trx_dma,_Bool,"FuriHalSpiBusHandle*, uint8_t*, uint8_t*, size_t, uint32_t"
|
||||
Function,+,furi_hal_spi_bus_tx,_Bool,"FuriHalSpiBusHandle*, const uint8_t*, size_t, uint32_t"
|
||||
Function,+,furi_hal_spi_bus_rx,_Bool,"const FuriHalSpiBusHandle*, uint8_t*, size_t, uint32_t"
|
||||
Function,+,furi_hal_spi_bus_trx,_Bool,"const FuriHalSpiBusHandle*, const uint8_t*, uint8_t*, size_t, uint32_t"
|
||||
Function,+,furi_hal_spi_bus_trx_dma,_Bool,"const FuriHalSpiBusHandle*, uint8_t*, uint8_t*, size_t, uint32_t"
|
||||
Function,+,furi_hal_spi_bus_tx,_Bool,"const FuriHalSpiBusHandle*, const uint8_t*, size_t, uint32_t"
|
||||
Function,-,furi_hal_spi_config_deinit_early,void,
|
||||
Function,-,furi_hal_spi_config_init,void,
|
||||
Function,-,furi_hal_spi_config_init_early,void,
|
||||
Function,-,furi_hal_spi_dma_init,void,
|
||||
Function,+,furi_hal_spi_release,void,FuriHalSpiBusHandle*
|
||||
Function,+,furi_hal_spi_release,void,const FuriHalSpiBusHandle*
|
||||
Function,-,furi_hal_subghz_dump_state,void,
|
||||
Function,+,furi_hal_subghz_flush_rx,void,
|
||||
Function,+,furi_hal_subghz_flush_tx,void,
|
||||
@@ -3198,29 +3198,29 @@ Function,+,srand,void,unsigned
|
||||
Function,-,srand48,void,long
|
||||
Function,-,srandom,void,unsigned
|
||||
Function,+,sscanf,int,"const char*, const char*, ..."
|
||||
Function,+,st25r3916_change_reg_bits,void,"FuriHalSpiBusHandle*, uint8_t, uint8_t, uint8_t"
|
||||
Function,+,st25r3916_change_test_reg_bits,void,"FuriHalSpiBusHandle*, uint8_t, uint8_t, uint8_t"
|
||||
Function,+,st25r3916_check_reg,_Bool,"FuriHalSpiBusHandle*, uint8_t, uint8_t, uint8_t"
|
||||
Function,+,st25r3916_clear_reg_bits,void,"FuriHalSpiBusHandle*, uint8_t, uint8_t"
|
||||
Function,+,st25r3916_direct_cmd,void,"FuriHalSpiBusHandle*, uint8_t"
|
||||
Function,+,st25r3916_get_irq,uint32_t,FuriHalSpiBusHandle*
|
||||
Function,+,st25r3916_mask_irq,void,"FuriHalSpiBusHandle*, uint32_t"
|
||||
Function,+,st25r3916_modify_reg,void,"FuriHalSpiBusHandle*, uint8_t, uint8_t, uint8_t"
|
||||
Function,+,st25r3916_read_burst_regs,void,"FuriHalSpiBusHandle*, uint8_t, uint8_t*, uint8_t"
|
||||
Function,+,st25r3916_read_fifo,_Bool,"FuriHalSpiBusHandle*, uint8_t*, size_t, size_t*"
|
||||
Function,+,st25r3916_read_pta_mem,void,"FuriHalSpiBusHandle*, uint8_t*, size_t"
|
||||
Function,+,st25r3916_read_reg,void,"FuriHalSpiBusHandle*, uint8_t, uint8_t*"
|
||||
Function,+,st25r3916_read_test_reg,void,"FuriHalSpiBusHandle*, uint8_t, uint8_t*"
|
||||
Function,+,st25r3916_reg_read_fifo,void,"FuriHalSpiBusHandle*, uint8_t*, size_t"
|
||||
Function,+,st25r3916_reg_write_fifo,void,"FuriHalSpiBusHandle*, const uint8_t*, size_t"
|
||||
Function,+,st25r3916_set_reg_bits,void,"FuriHalSpiBusHandle*, uint8_t, uint8_t"
|
||||
Function,+,st25r3916_write_burst_regs,void,"FuriHalSpiBusHandle*, uint8_t, const uint8_t*, uint8_t"
|
||||
Function,+,st25r3916_write_fifo,void,"FuriHalSpiBusHandle*, const uint8_t*, size_t"
|
||||
Function,+,st25r3916_write_pta_mem,void,"FuriHalSpiBusHandle*, const uint8_t*, size_t"
|
||||
Function,+,st25r3916_write_ptf_mem,void,"FuriHalSpiBusHandle*, const uint8_t*, size_t"
|
||||
Function,+,st25r3916_write_pttsn_mem,void,"FuriHalSpiBusHandle*, uint8_t*, size_t"
|
||||
Function,+,st25r3916_write_reg,void,"FuriHalSpiBusHandle*, uint8_t, uint8_t"
|
||||
Function,+,st25r3916_write_test_reg,void,"FuriHalSpiBusHandle*, uint8_t, uint8_t"
|
||||
Function,+,st25r3916_change_reg_bits,void,"const FuriHalSpiBusHandle*, uint8_t, uint8_t, uint8_t"
|
||||
Function,+,st25r3916_change_test_reg_bits,void,"const FuriHalSpiBusHandle*, uint8_t, uint8_t, uint8_t"
|
||||
Function,+,st25r3916_check_reg,_Bool,"const FuriHalSpiBusHandle*, uint8_t, uint8_t, uint8_t"
|
||||
Function,+,st25r3916_clear_reg_bits,void,"const FuriHalSpiBusHandle*, uint8_t, uint8_t"
|
||||
Function,+,st25r3916_direct_cmd,void,"const FuriHalSpiBusHandle*, uint8_t"
|
||||
Function,+,st25r3916_get_irq,uint32_t,const FuriHalSpiBusHandle*
|
||||
Function,+,st25r3916_mask_irq,void,"const FuriHalSpiBusHandle*, uint32_t"
|
||||
Function,+,st25r3916_modify_reg,void,"const FuriHalSpiBusHandle*, uint8_t, uint8_t, uint8_t"
|
||||
Function,+,st25r3916_read_burst_regs,void,"const FuriHalSpiBusHandle*, uint8_t, uint8_t*, uint8_t"
|
||||
Function,+,st25r3916_read_fifo,_Bool,"const FuriHalSpiBusHandle*, uint8_t*, size_t, size_t*"
|
||||
Function,+,st25r3916_read_pta_mem,void,"const FuriHalSpiBusHandle*, uint8_t*, size_t"
|
||||
Function,+,st25r3916_read_reg,void,"const FuriHalSpiBusHandle*, uint8_t, uint8_t*"
|
||||
Function,+,st25r3916_read_test_reg,void,"const FuriHalSpiBusHandle*, uint8_t, uint8_t*"
|
||||
Function,+,st25r3916_reg_read_fifo,void,"const FuriHalSpiBusHandle*, uint8_t*, size_t"
|
||||
Function,+,st25r3916_reg_write_fifo,void,"const FuriHalSpiBusHandle*, const uint8_t*, size_t"
|
||||
Function,+,st25r3916_set_reg_bits,void,"const FuriHalSpiBusHandle*, uint8_t, uint8_t"
|
||||
Function,+,st25r3916_write_burst_regs,void,"const FuriHalSpiBusHandle*, uint8_t, const uint8_t*, uint8_t"
|
||||
Function,+,st25r3916_write_fifo,void,"const FuriHalSpiBusHandle*, const uint8_t*, size_t"
|
||||
Function,+,st25r3916_write_pta_mem,void,"const FuriHalSpiBusHandle*, const uint8_t*, size_t"
|
||||
Function,+,st25r3916_write_ptf_mem,void,"const FuriHalSpiBusHandle*, const uint8_t*, size_t"
|
||||
Function,+,st25r3916_write_pttsn_mem,void,"const FuriHalSpiBusHandle*, uint8_t*, size_t"
|
||||
Function,+,st25r3916_write_reg,void,"const FuriHalSpiBusHandle*, uint8_t, uint8_t"
|
||||
Function,+,st25r3916_write_test_reg,void,"const FuriHalSpiBusHandle*, uint8_t, uint8_t"
|
||||
Function,+,st25tb_alloc,St25tbData*,
|
||||
Function,+,st25tb_copy,void,"St25tbData*, const St25tbData*"
|
||||
Function,+,st25tb_free,void,St25tbData*
|
||||
@@ -3795,12 +3795,12 @@ Variable,+,furi_hal_i2c_bus_power,FuriHalI2cBus,
|
||||
Variable,+,furi_hal_i2c_handle_external,FuriHalI2cBusHandle,
|
||||
Variable,+,furi_hal_i2c_handle_power,FuriHalI2cBusHandle,
|
||||
Variable,+,furi_hal_spi_bus_d,FuriHalSpiBus,
|
||||
Variable,+,furi_hal_spi_bus_handle_display,FuriHalSpiBusHandle,
|
||||
Variable,+,furi_hal_spi_bus_handle_external,FuriHalSpiBusHandle,
|
||||
Variable,+,furi_hal_spi_bus_handle_nfc,FuriHalSpiBusHandle,
|
||||
Variable,+,furi_hal_spi_bus_handle_sd_fast,FuriHalSpiBusHandle,
|
||||
Variable,+,furi_hal_spi_bus_handle_sd_slow,FuriHalSpiBusHandle,
|
||||
Variable,+,furi_hal_spi_bus_handle_subghz,FuriHalSpiBusHandle,
|
||||
Variable,+,furi_hal_spi_bus_handle_display,const FuriHalSpiBusHandle,
|
||||
Variable,+,furi_hal_spi_bus_handle_external,const FuriHalSpiBusHandle,
|
||||
Variable,+,furi_hal_spi_bus_handle_nfc,const FuriHalSpiBusHandle,
|
||||
Variable,+,furi_hal_spi_bus_handle_sd_fast,const FuriHalSpiBusHandle,
|
||||
Variable,+,furi_hal_spi_bus_handle_sd_slow,const FuriHalSpiBusHandle,
|
||||
Variable,+,furi_hal_spi_bus_handle_subghz,const FuriHalSpiBusHandle,
|
||||
Variable,+,furi_hal_spi_bus_r,FuriHalSpiBus,
|
||||
Variable,+,furi_hal_spi_preset_1edge_low_16m,const LL_SPI_InitTypeDef,
|
||||
Variable,+,furi_hal_spi_preset_1edge_low_2m,const LL_SPI_InitTypeDef,
|
||||
|
||||
|
@@ -18,7 +18,7 @@ const FuriHalNfcTechBase* const furi_hal_nfc_tech[FuriHalNfcTechNum] = {
|
||||
|
||||
FuriHalNfc furi_hal_nfc;
|
||||
|
||||
static FuriHalNfcError furi_hal_nfc_turn_on_osc(FuriHalSpiBusHandle* handle) {
|
||||
static FuriHalNfcError furi_hal_nfc_turn_on_osc(const FuriHalSpiBusHandle* handle) {
|
||||
FuriHalNfcError error = FuriHalNfcErrorNone;
|
||||
furi_hal_nfc_event_start();
|
||||
|
||||
@@ -53,7 +53,7 @@ FuriHalNfcError furi_hal_nfc_is_hal_ready(void) {
|
||||
error = furi_hal_nfc_acquire();
|
||||
if(error != FuriHalNfcErrorNone) break;
|
||||
|
||||
FuriHalSpiBusHandle* handle = &furi_hal_spi_bus_handle_nfc;
|
||||
const FuriHalSpiBusHandle* handle = &furi_hal_spi_bus_handle_nfc;
|
||||
uint8_t chip_id = 0;
|
||||
st25r3916_read_reg(handle, ST25R3916_REG_IC_IDENTITY, &chip_id);
|
||||
if((chip_id & ST25R3916_REG_IC_IDENTITY_ic_type_mask) !=
|
||||
@@ -83,7 +83,7 @@ FuriHalNfcError furi_hal_nfc_init(void) {
|
||||
furi_hal_nfc_low_power_mode_start();
|
||||
}
|
||||
|
||||
FuriHalSpiBusHandle* handle = &furi_hal_spi_bus_handle_nfc;
|
||||
const FuriHalSpiBusHandle* handle = &furi_hal_spi_bus_handle_nfc;
|
||||
// Set default state
|
||||
st25r3916_direct_cmd(handle, ST25R3916_CMD_SET_DEFAULT);
|
||||
// Increase IO driver strength of MISO and IRQ
|
||||
@@ -282,7 +282,7 @@ FuriHalNfcError furi_hal_nfc_release(void) {
|
||||
|
||||
FuriHalNfcError furi_hal_nfc_low_power_mode_start(void) {
|
||||
FuriHalNfcError error = FuriHalNfcErrorNone;
|
||||
FuriHalSpiBusHandle* handle = &furi_hal_spi_bus_handle_nfc;
|
||||
const FuriHalSpiBusHandle* handle = &furi_hal_spi_bus_handle_nfc;
|
||||
|
||||
st25r3916_direct_cmd(handle, ST25R3916_CMD_STOP);
|
||||
st25r3916_clear_reg_bits(
|
||||
@@ -300,7 +300,7 @@ FuriHalNfcError furi_hal_nfc_low_power_mode_start(void) {
|
||||
|
||||
FuriHalNfcError furi_hal_nfc_low_power_mode_stop(void) {
|
||||
FuriHalNfcError error = FuriHalNfcErrorNone;
|
||||
FuriHalSpiBusHandle* handle = &furi_hal_spi_bus_handle_nfc;
|
||||
const FuriHalSpiBusHandle* handle = &furi_hal_spi_bus_handle_nfc;
|
||||
|
||||
do {
|
||||
furi_hal_nfc_init_gpio_isr();
|
||||
@@ -318,7 +318,7 @@ FuriHalNfcError furi_hal_nfc_low_power_mode_stop(void) {
|
||||
return error;
|
||||
}
|
||||
|
||||
static FuriHalNfcError furi_hal_nfc_poller_init_common(FuriHalSpiBusHandle* handle) {
|
||||
static FuriHalNfcError furi_hal_nfc_poller_init_common(const FuriHalSpiBusHandle* handle) {
|
||||
// Disable wake up
|
||||
st25r3916_clear_reg_bits(handle, ST25R3916_REG_OP_CONTROL, ST25R3916_REG_OP_CONTROL_wu);
|
||||
// Enable correlator
|
||||
@@ -339,7 +339,7 @@ static FuriHalNfcError furi_hal_nfc_poller_init_common(FuriHalSpiBusHandle* hand
|
||||
return FuriHalNfcErrorNone;
|
||||
}
|
||||
|
||||
static FuriHalNfcError furi_hal_nfc_listener_init_common(FuriHalSpiBusHandle* handle) {
|
||||
static FuriHalNfcError furi_hal_nfc_listener_init_common(const FuriHalSpiBusHandle* handle) {
|
||||
UNUSED(handle);
|
||||
// No common listener configuration
|
||||
return FuriHalNfcErrorNone;
|
||||
@@ -349,7 +349,7 @@ FuriHalNfcError furi_hal_nfc_set_mode(FuriHalNfcMode mode, FuriHalNfcTech tech)
|
||||
furi_check(mode < FuriHalNfcModeNum);
|
||||
furi_check(tech < FuriHalNfcTechNum);
|
||||
|
||||
FuriHalSpiBusHandle* handle = &furi_hal_spi_bus_handle_nfc;
|
||||
const FuriHalSpiBusHandle* handle = &furi_hal_spi_bus_handle_nfc;
|
||||
|
||||
FuriHalNfcError error = FuriHalNfcErrorNone;
|
||||
|
||||
@@ -375,7 +375,7 @@ FuriHalNfcError furi_hal_nfc_set_mode(FuriHalNfcMode mode, FuriHalNfcTech tech)
|
||||
|
||||
FuriHalNfcError furi_hal_nfc_reset_mode(void) {
|
||||
FuriHalNfcError error = FuriHalNfcErrorNone;
|
||||
FuriHalSpiBusHandle* handle = &furi_hal_spi_bus_handle_nfc;
|
||||
const FuriHalSpiBusHandle* handle = &furi_hal_spi_bus_handle_nfc;
|
||||
|
||||
st25r3916_direct_cmd(handle, ST25R3916_CMD_STOP);
|
||||
|
||||
@@ -415,7 +415,7 @@ FuriHalNfcError furi_hal_nfc_reset_mode(void) {
|
||||
|
||||
FuriHalNfcError furi_hal_nfc_field_detect_start(void) {
|
||||
FuriHalNfcError error = FuriHalNfcErrorNone;
|
||||
FuriHalSpiBusHandle* handle = &furi_hal_spi_bus_handle_nfc;
|
||||
const FuriHalSpiBusHandle* handle = &furi_hal_spi_bus_handle_nfc;
|
||||
|
||||
st25r3916_write_reg(
|
||||
handle,
|
||||
@@ -429,7 +429,7 @@ FuriHalNfcError furi_hal_nfc_field_detect_start(void) {
|
||||
|
||||
FuriHalNfcError furi_hal_nfc_field_detect_stop(void) {
|
||||
FuriHalNfcError error = FuriHalNfcErrorNone;
|
||||
FuriHalSpiBusHandle* handle = &furi_hal_spi_bus_handle_nfc;
|
||||
const FuriHalSpiBusHandle* handle = &furi_hal_spi_bus_handle_nfc;
|
||||
|
||||
st25r3916_clear_reg_bits(
|
||||
handle,
|
||||
@@ -441,7 +441,7 @@ FuriHalNfcError furi_hal_nfc_field_detect_stop(void) {
|
||||
|
||||
bool furi_hal_nfc_field_is_present(void) {
|
||||
bool is_present = false;
|
||||
FuriHalSpiBusHandle* handle = &furi_hal_spi_bus_handle_nfc;
|
||||
const FuriHalSpiBusHandle* handle = &furi_hal_spi_bus_handle_nfc;
|
||||
|
||||
if(st25r3916_check_reg(
|
||||
handle,
|
||||
@@ -456,7 +456,7 @@ bool furi_hal_nfc_field_is_present(void) {
|
||||
|
||||
FuriHalNfcError furi_hal_nfc_poller_field_on(void) {
|
||||
FuriHalNfcError error = FuriHalNfcErrorNone;
|
||||
FuriHalSpiBusHandle* handle = &furi_hal_spi_bus_handle_nfc;
|
||||
const FuriHalSpiBusHandle* handle = &furi_hal_spi_bus_handle_nfc;
|
||||
|
||||
if(!st25r3916_check_reg(
|
||||
handle,
|
||||
@@ -476,7 +476,7 @@ FuriHalNfcError furi_hal_nfc_poller_field_on(void) {
|
||||
}
|
||||
|
||||
FuriHalNfcError furi_hal_nfc_poller_tx_common(
|
||||
FuriHalSpiBusHandle* handle,
|
||||
const FuriHalSpiBusHandle* handle,
|
||||
const uint8_t* tx_data,
|
||||
size_t tx_bits) {
|
||||
furi_check(tx_data);
|
||||
@@ -508,7 +508,7 @@ FuriHalNfcError furi_hal_nfc_poller_tx_common(
|
||||
}
|
||||
|
||||
FuriHalNfcError furi_hal_nfc_common_fifo_tx(
|
||||
FuriHalSpiBusHandle* handle,
|
||||
const FuriHalSpiBusHandle* handle,
|
||||
const uint8_t* tx_data,
|
||||
size_t tx_bits) {
|
||||
FuriHalNfcError err = FuriHalNfcErrorNone;
|
||||
@@ -523,7 +523,7 @@ FuriHalNfcError furi_hal_nfc_common_fifo_tx(
|
||||
FuriHalNfcError furi_hal_nfc_poller_tx(const uint8_t* tx_data, size_t tx_bits) {
|
||||
furi_check(furi_hal_nfc.mode == FuriHalNfcModePoller);
|
||||
furi_check(furi_hal_nfc.tech < FuriHalNfcTechNum);
|
||||
FuriHalSpiBusHandle* handle = &furi_hal_spi_bus_handle_nfc;
|
||||
const FuriHalSpiBusHandle* handle = &furi_hal_spi_bus_handle_nfc;
|
||||
|
||||
return furi_hal_nfc_tech[furi_hal_nfc.tech]->poller.tx(handle, tx_data, tx_bits);
|
||||
}
|
||||
@@ -531,7 +531,7 @@ FuriHalNfcError furi_hal_nfc_poller_tx(const uint8_t* tx_data, size_t tx_bits) {
|
||||
FuriHalNfcError furi_hal_nfc_poller_rx(uint8_t* rx_data, size_t rx_data_size, size_t* rx_bits) {
|
||||
furi_check(furi_hal_nfc.mode == FuriHalNfcModePoller);
|
||||
furi_check(furi_hal_nfc.tech < FuriHalNfcTechNum);
|
||||
FuriHalSpiBusHandle* handle = &furi_hal_spi_bus_handle_nfc;
|
||||
const FuriHalSpiBusHandle* handle = &furi_hal_spi_bus_handle_nfc;
|
||||
|
||||
return furi_hal_nfc_tech[furi_hal_nfc.tech]->poller.rx(handle, rx_data, rx_data_size, rx_bits);
|
||||
}
|
||||
@@ -556,12 +556,12 @@ FuriHalNfcError furi_hal_nfc_listener_tx(const uint8_t* tx_data, size_t tx_bits)
|
||||
furi_check(furi_hal_nfc.mode == FuriHalNfcModeListener);
|
||||
furi_check(furi_hal_nfc.tech < FuriHalNfcTechNum);
|
||||
|
||||
FuriHalSpiBusHandle* handle = &furi_hal_spi_bus_handle_nfc;
|
||||
const FuriHalSpiBusHandle* handle = &furi_hal_spi_bus_handle_nfc;
|
||||
return furi_hal_nfc_tech[furi_hal_nfc.tech]->listener.tx(handle, tx_data, tx_bits);
|
||||
}
|
||||
|
||||
FuriHalNfcError furi_hal_nfc_common_fifo_rx(
|
||||
FuriHalSpiBusHandle* handle,
|
||||
const FuriHalSpiBusHandle* handle,
|
||||
uint8_t* rx_data,
|
||||
size_t rx_data_size,
|
||||
size_t* rx_bits) {
|
||||
@@ -581,13 +581,13 @@ FuriHalNfcError furi_hal_nfc_listener_rx(uint8_t* rx_data, size_t rx_data_size,
|
||||
furi_check(furi_hal_nfc.mode == FuriHalNfcModeListener);
|
||||
furi_check(furi_hal_nfc.tech < FuriHalNfcTechNum);
|
||||
|
||||
FuriHalSpiBusHandle* handle = &furi_hal_spi_bus_handle_nfc;
|
||||
const FuriHalSpiBusHandle* handle = &furi_hal_spi_bus_handle_nfc;
|
||||
return furi_hal_nfc_tech[furi_hal_nfc.tech]->listener.rx(
|
||||
handle, rx_data, rx_data_size, rx_bits);
|
||||
}
|
||||
|
||||
FuriHalNfcError furi_hal_nfc_trx_reset(void) {
|
||||
FuriHalSpiBusHandle* handle = &furi_hal_spi_bus_handle_nfc;
|
||||
const FuriHalSpiBusHandle* handle = &furi_hal_spi_bus_handle_nfc;
|
||||
|
||||
st25r3916_direct_cmd(handle, ST25R3916_CMD_STOP);
|
||||
|
||||
@@ -598,7 +598,7 @@ FuriHalNfcError furi_hal_nfc_listener_sleep(void) {
|
||||
furi_check(furi_hal_nfc.mode == FuriHalNfcModeListener);
|
||||
furi_check(furi_hal_nfc.tech < FuriHalNfcTechNum);
|
||||
|
||||
FuriHalSpiBusHandle* handle = &furi_hal_spi_bus_handle_nfc;
|
||||
const FuriHalSpiBusHandle* handle = &furi_hal_spi_bus_handle_nfc;
|
||||
|
||||
return furi_hal_nfc_tech[furi_hal_nfc.tech]->listener.sleep(handle);
|
||||
}
|
||||
@@ -607,13 +607,13 @@ FuriHalNfcError furi_hal_nfc_listener_idle(void) {
|
||||
furi_check(furi_hal_nfc.mode == FuriHalNfcModeListener);
|
||||
furi_check(furi_hal_nfc.tech < FuriHalNfcTechNum);
|
||||
|
||||
FuriHalSpiBusHandle* handle = &furi_hal_spi_bus_handle_nfc;
|
||||
const FuriHalSpiBusHandle* handle = &furi_hal_spi_bus_handle_nfc;
|
||||
|
||||
return furi_hal_nfc_tech[furi_hal_nfc.tech]->listener.idle(handle);
|
||||
}
|
||||
|
||||
FuriHalNfcError furi_hal_nfc_listener_enable_rx(void) {
|
||||
FuriHalSpiBusHandle* handle = &furi_hal_spi_bus_handle_nfc;
|
||||
const FuriHalSpiBusHandle* handle = &furi_hal_spi_bus_handle_nfc;
|
||||
|
||||
st25r3916_direct_cmd(handle, ST25R3916_CMD_UNMASK_RECEIVE_DATA);
|
||||
|
||||
|
||||
@@ -48,7 +48,7 @@ FuriHalNfcEvent furi_hal_nfc_wait_event_common(uint32_t timeout_ms) {
|
||||
if(event_flag != (unsigned)FuriFlagErrorTimeout) {
|
||||
if(event_flag & FuriHalNfcEventInternalTypeIrq) {
|
||||
furi_thread_flags_clear(FuriHalNfcEventInternalTypeIrq);
|
||||
FuriHalSpiBusHandle* handle = &furi_hal_spi_bus_handle_nfc;
|
||||
const FuriHalSpiBusHandle* handle = &furi_hal_spi_bus_handle_nfc;
|
||||
uint32_t irq = furi_hal_nfc_get_irq(handle);
|
||||
if(irq & ST25R3916_IRQ_MASK_OSC) {
|
||||
event |= FuriHalNfcEventOscOn;
|
||||
@@ -101,7 +101,7 @@ FuriHalNfcEvent furi_hal_nfc_wait_event_common(uint32_t timeout_ms) {
|
||||
}
|
||||
|
||||
bool furi_hal_nfc_event_wait_for_specific_irq(
|
||||
FuriHalSpiBusHandle* handle,
|
||||
const FuriHalSpiBusHandle* handle,
|
||||
uint32_t mask,
|
||||
uint32_t timeout_ms) {
|
||||
furi_check(furi_hal_nfc_event);
|
||||
|
||||
@@ -18,7 +18,7 @@ typedef struct {
|
||||
} FuriHalFelicaPtMemory;
|
||||
#pragma pack(pop)
|
||||
|
||||
static FuriHalNfcError furi_hal_nfc_felica_poller_init(FuriHalSpiBusHandle* handle) {
|
||||
static FuriHalNfcError furi_hal_nfc_felica_poller_init(const FuriHalSpiBusHandle* handle) {
|
||||
// Enable Felica mode, AM modulation
|
||||
st25r3916_change_reg_bits(
|
||||
handle,
|
||||
@@ -61,13 +61,13 @@ static FuriHalNfcError furi_hal_nfc_felica_poller_init(FuriHalSpiBusHandle* hand
|
||||
return FuriHalNfcErrorNone;
|
||||
}
|
||||
|
||||
static FuriHalNfcError furi_hal_nfc_felica_poller_deinit(FuriHalSpiBusHandle* handle) {
|
||||
static FuriHalNfcError furi_hal_nfc_felica_poller_deinit(const FuriHalSpiBusHandle* handle) {
|
||||
UNUSED(handle);
|
||||
|
||||
return FuriHalNfcErrorNone;
|
||||
}
|
||||
|
||||
static FuriHalNfcError furi_hal_nfc_felica_listener_init(FuriHalSpiBusHandle* handle) {
|
||||
static FuriHalNfcError furi_hal_nfc_felica_listener_init(const FuriHalSpiBusHandle* handle) {
|
||||
furi_assert(handle);
|
||||
st25r3916_direct_cmd(handle, ST25R3916_CMD_SET_DEFAULT);
|
||||
st25r3916_write_reg(
|
||||
@@ -141,7 +141,7 @@ static FuriHalNfcError furi_hal_nfc_felica_listener_init(FuriHalSpiBusHandle* ha
|
||||
return FuriHalNfcErrorNone;
|
||||
}
|
||||
|
||||
static FuriHalNfcError furi_hal_nfc_felica_listener_deinit(FuriHalSpiBusHandle* handle) {
|
||||
static FuriHalNfcError furi_hal_nfc_felica_listener_deinit(const FuriHalSpiBusHandle* handle) {
|
||||
UNUSED(handle);
|
||||
return FuriHalNfcErrorNone;
|
||||
}
|
||||
@@ -154,19 +154,19 @@ static FuriHalNfcEvent furi_hal_nfc_felica_listener_wait_event(uint32_t timeout_
|
||||
}
|
||||
|
||||
FuriHalNfcError furi_hal_nfc_felica_listener_tx(
|
||||
FuriHalSpiBusHandle* handle,
|
||||
const FuriHalSpiBusHandle* handle,
|
||||
const uint8_t* tx_data,
|
||||
size_t tx_bits) {
|
||||
furi_hal_nfc_common_fifo_tx(handle, tx_data, tx_bits);
|
||||
return FuriHalNfcErrorNone;
|
||||
}
|
||||
|
||||
FuriHalNfcError furi_hal_nfc_felica_listener_sleep(FuriHalSpiBusHandle* handle) {
|
||||
FuriHalNfcError furi_hal_nfc_felica_listener_sleep(const FuriHalSpiBusHandle* handle) {
|
||||
UNUSED(handle);
|
||||
return FuriHalNfcErrorNone;
|
||||
}
|
||||
|
||||
FuriHalNfcError furi_hal_nfc_felica_listener_idle(FuriHalSpiBusHandle* handle) {
|
||||
FuriHalNfcError furi_hal_nfc_felica_listener_idle(const FuriHalSpiBusHandle* handle) {
|
||||
UNUSED(handle);
|
||||
return FuriHalNfcErrorNone;
|
||||
}
|
||||
@@ -182,7 +182,7 @@ FuriHalNfcError furi_hal_nfc_felica_listener_set_sensf_res_data(
|
||||
furi_check(idm_len == FURI_HAL_FELICA_IDM_PMM_LENGTH);
|
||||
furi_check(pmm_len == FURI_HAL_FELICA_IDM_PMM_LENGTH);
|
||||
|
||||
FuriHalSpiBusHandle* handle = &furi_hal_spi_bus_handle_nfc;
|
||||
const FuriHalSpiBusHandle* handle = &furi_hal_spi_bus_handle_nfc;
|
||||
// Write PT Memory
|
||||
FuriHalFelicaPtMemory pt;
|
||||
pt.system_code = sys_code;
|
||||
|
||||
@@ -104,7 +104,7 @@ void furi_hal_nfc_timers_deinit(void);
|
||||
* @param[in,out] handle pointer to the SPI handle associated with the NFC chip.
|
||||
* @returns bitmask of zero or more occurred interrupts.
|
||||
*/
|
||||
uint32_t furi_hal_nfc_get_irq(FuriHalSpiBusHandle* handle);
|
||||
uint32_t furi_hal_nfc_get_irq(const FuriHalSpiBusHandle* handle);
|
||||
|
||||
/**
|
||||
* @brief Wait until a specified type of interrupt occurs.
|
||||
@@ -115,7 +115,7 @@ uint32_t furi_hal_nfc_get_irq(FuriHalSpiBusHandle* handle);
|
||||
* @returns true if specified interrupt(s) have occured within timeout, false otherwise.
|
||||
*/
|
||||
bool furi_hal_nfc_event_wait_for_specific_irq(
|
||||
FuriHalSpiBusHandle* handle,
|
||||
const FuriHalSpiBusHandle* handle,
|
||||
uint32_t mask,
|
||||
uint32_t timeout_ms);
|
||||
|
||||
@@ -137,7 +137,7 @@ FuriHalNfcEvent furi_hal_nfc_wait_event_common(uint32_t timeout_ms);
|
||||
* @param[in,out] handle pointer to the SPI handle associated with the NFC chip.
|
||||
* @returns FuriHalNfcErrorNone on success, any other error code on failure.
|
||||
*/
|
||||
FuriHalNfcError furi_hal_nfc_common_listener_rx_start(FuriHalSpiBusHandle* handle);
|
||||
FuriHalNfcError furi_hal_nfc_common_listener_rx_start(const FuriHalSpiBusHandle* handle);
|
||||
|
||||
/**
|
||||
* @brief Transmit data using on-chip FIFO.
|
||||
@@ -150,7 +150,7 @@ FuriHalNfcError furi_hal_nfc_common_listener_rx_start(FuriHalSpiBusHandle* handl
|
||||
* @returns FuriHalNfcErrorNone on success, any other error code on failure.
|
||||
*/
|
||||
FuriHalNfcError furi_hal_nfc_common_fifo_tx(
|
||||
FuriHalSpiBusHandle* handle,
|
||||
const FuriHalSpiBusHandle* handle,
|
||||
const uint8_t* tx_data,
|
||||
size_t tx_bits);
|
||||
|
||||
@@ -166,7 +166,7 @@ FuriHalNfcError furi_hal_nfc_common_fifo_tx(
|
||||
* @returns FuriHalNfcErrorNone on success, any other error code on failure.
|
||||
*/
|
||||
FuriHalNfcError furi_hal_nfc_common_fifo_rx(
|
||||
FuriHalSpiBusHandle* handle,
|
||||
const FuriHalSpiBusHandle* handle,
|
||||
uint8_t* rx_data,
|
||||
size_t rx_data_size,
|
||||
size_t* rx_bits);
|
||||
@@ -182,7 +182,7 @@ FuriHalNfcError furi_hal_nfc_common_fifo_rx(
|
||||
* @returns FuriHalNfcErrorNone on success, any other error code on failure.
|
||||
*/
|
||||
FuriHalNfcError furi_hal_nfc_poller_tx_common(
|
||||
FuriHalSpiBusHandle* handle,
|
||||
const FuriHalSpiBusHandle* handle,
|
||||
const uint8_t* tx_data,
|
||||
size_t tx_bits);
|
||||
|
||||
|
||||
@@ -8,7 +8,7 @@ static void furi_hal_nfc_int_callback(void* context) {
|
||||
furi_hal_nfc_event_set(FuriHalNfcEventInternalTypeIrq);
|
||||
}
|
||||
|
||||
uint32_t furi_hal_nfc_get_irq(FuriHalSpiBusHandle* handle) {
|
||||
uint32_t furi_hal_nfc_get_irq(const FuriHalSpiBusHandle* handle) {
|
||||
uint32_t irq = 0;
|
||||
while(furi_hal_gpio_read_port_pin(gpio_nfc_irq_rfid_pull.port, gpio_nfc_irq_rfid_pull.pin)) {
|
||||
irq |= st25r3916_get_irq(handle);
|
||||
|
||||
@@ -13,7 +13,7 @@
|
||||
|
||||
static Iso14443_3aSignal* iso14443_3a_signal = NULL;
|
||||
|
||||
static FuriHalNfcError furi_hal_nfc_iso14443a_common_init(FuriHalSpiBusHandle* handle) {
|
||||
static FuriHalNfcError furi_hal_nfc_iso14443a_common_init(const FuriHalSpiBusHandle* handle) {
|
||||
// Common NFC-A settings, 106 kbps
|
||||
|
||||
// 1st stage zero = 600kHz, 3rd stage zero = 200 kHz
|
||||
@@ -40,7 +40,7 @@ static FuriHalNfcError furi_hal_nfc_iso14443a_common_init(FuriHalSpiBusHandle* h
|
||||
return FuriHalNfcErrorNone;
|
||||
}
|
||||
|
||||
static FuriHalNfcError furi_hal_nfc_iso14443a_poller_init(FuriHalSpiBusHandle* handle) {
|
||||
static FuriHalNfcError furi_hal_nfc_iso14443a_poller_init(const FuriHalSpiBusHandle* handle) {
|
||||
// Enable ISO14443A mode, OOK modulation
|
||||
st25r3916_change_reg_bits(
|
||||
handle,
|
||||
@@ -57,7 +57,7 @@ static FuriHalNfcError furi_hal_nfc_iso14443a_poller_init(FuriHalSpiBusHandle* h
|
||||
return furi_hal_nfc_iso14443a_common_init(handle);
|
||||
}
|
||||
|
||||
static FuriHalNfcError furi_hal_nfc_iso14443a_poller_deinit(FuriHalSpiBusHandle* handle) {
|
||||
static FuriHalNfcError furi_hal_nfc_iso14443a_poller_deinit(const FuriHalSpiBusHandle* handle) {
|
||||
st25r3916_change_reg_bits(
|
||||
handle,
|
||||
ST25R3916_REG_ISO14443A_NFC,
|
||||
@@ -67,7 +67,7 @@ static FuriHalNfcError furi_hal_nfc_iso14443a_poller_deinit(FuriHalSpiBusHandle*
|
||||
return FuriHalNfcErrorNone;
|
||||
}
|
||||
|
||||
static FuriHalNfcError furi_hal_nfc_iso14443a_listener_init(FuriHalSpiBusHandle* handle) {
|
||||
static FuriHalNfcError furi_hal_nfc_iso14443a_listener_init(const FuriHalSpiBusHandle* handle) {
|
||||
furi_check(iso14443_3a_signal == NULL);
|
||||
iso14443_3a_signal = iso14443_3a_signal_alloc(&gpio_spi_r_mosi);
|
||||
|
||||
@@ -105,7 +105,7 @@ static FuriHalNfcError furi_hal_nfc_iso14443a_listener_init(FuriHalSpiBusHandle*
|
||||
return furi_hal_nfc_iso14443a_common_init(handle);
|
||||
}
|
||||
|
||||
static FuriHalNfcError furi_hal_nfc_iso14443a_listener_deinit(FuriHalSpiBusHandle* handle) {
|
||||
static FuriHalNfcError furi_hal_nfc_iso14443a_listener_deinit(const FuriHalSpiBusHandle* handle) {
|
||||
UNUSED(handle);
|
||||
|
||||
if(iso14443_3a_signal) {
|
||||
@@ -118,7 +118,7 @@ static FuriHalNfcError furi_hal_nfc_iso14443a_listener_deinit(FuriHalSpiBusHandl
|
||||
|
||||
static FuriHalNfcEvent furi_hal_nfc_iso14443_3a_listener_wait_event(uint32_t timeout_ms) {
|
||||
FuriHalNfcEvent event = furi_hal_nfc_wait_event_common(timeout_ms);
|
||||
FuriHalSpiBusHandle* handle = &furi_hal_spi_bus_handle_nfc;
|
||||
const FuriHalSpiBusHandle* handle = &furi_hal_spi_bus_handle_nfc;
|
||||
|
||||
if(event & FuriHalNfcEventListenerActive) {
|
||||
st25r3916_set_reg_bits(
|
||||
@@ -131,7 +131,7 @@ static FuriHalNfcEvent furi_hal_nfc_iso14443_3a_listener_wait_event(uint32_t tim
|
||||
FuriHalNfcError furi_hal_nfc_iso14443a_poller_trx_short_frame(FuriHalNfcaShortFrame frame) {
|
||||
FuriHalNfcError error = FuriHalNfcErrorNone;
|
||||
|
||||
FuriHalSpiBusHandle* handle = &furi_hal_spi_bus_handle_nfc;
|
||||
const FuriHalSpiBusHandle* handle = &furi_hal_spi_bus_handle_nfc;
|
||||
|
||||
// Disable crc check
|
||||
st25r3916_set_reg_bits(handle, ST25R3916_REG_AUX, ST25R3916_REG_AUX_no_crc_rx);
|
||||
@@ -185,7 +185,7 @@ FuriHalNfcError
|
||||
furi_check(tx_data);
|
||||
|
||||
FuriHalNfcError err = FuriHalNfcErrorNone;
|
||||
FuriHalSpiBusHandle* handle = &furi_hal_spi_bus_handle_nfc;
|
||||
const FuriHalSpiBusHandle* handle = &furi_hal_spi_bus_handle_nfc;
|
||||
|
||||
// Prepare tx
|
||||
st25r3916_direct_cmd(handle, ST25R3916_CMD_CLEAR_FIFO);
|
||||
@@ -220,7 +220,7 @@ FuriHalNfcError furi_hal_nfc_iso14443a_listener_set_col_res_data(
|
||||
|
||||
FuriHalNfcError error = FuriHalNfcErrorNone;
|
||||
|
||||
FuriHalSpiBusHandle* handle = &furi_hal_spi_bus_handle_nfc;
|
||||
const FuriHalSpiBusHandle* handle = &furi_hal_spi_bus_handle_nfc;
|
||||
|
||||
// Set 4 or 7 bytes UID
|
||||
if(uid_len == 4) {
|
||||
@@ -255,7 +255,7 @@ FuriHalNfcError furi_hal_nfc_iso14443a_listener_set_col_res_data(
|
||||
}
|
||||
|
||||
FuriHalNfcError furi_hal_nfc_iso4443a_listener_tx(
|
||||
FuriHalSpiBusHandle* handle,
|
||||
const FuriHalSpiBusHandle* handle,
|
||||
const uint8_t* tx_data,
|
||||
size_t tx_bits) {
|
||||
FuriHalNfcError error = FuriHalNfcErrorNone;
|
||||
@@ -284,7 +284,7 @@ FuriHalNfcError furi_hal_nfc_iso14443a_listener_tx_custom_parity(
|
||||
|
||||
furi_check(iso14443_3a_signal);
|
||||
|
||||
FuriHalSpiBusHandle* handle = &furi_hal_spi_bus_handle_nfc;
|
||||
const FuriHalSpiBusHandle* handle = &furi_hal_spi_bus_handle_nfc;
|
||||
|
||||
st25r3916_direct_cmd(handle, ST25R3916_CMD_TRANSPARENT_MODE);
|
||||
// Reconfigure gpio for Transparent mode
|
||||
@@ -303,7 +303,7 @@ FuriHalNfcError furi_hal_nfc_iso14443a_listener_tx_custom_parity(
|
||||
return FuriHalNfcErrorNone;
|
||||
}
|
||||
|
||||
FuriHalNfcError furi_hal_nfc_iso14443_3a_listener_sleep(FuriHalSpiBusHandle* handle) {
|
||||
FuriHalNfcError furi_hal_nfc_iso14443_3a_listener_sleep(const FuriHalSpiBusHandle* handle) {
|
||||
// Enable auto collision resolution
|
||||
st25r3916_clear_reg_bits(
|
||||
handle, ST25R3916_REG_PASSIVE_TARGET, ST25R3916_REG_PASSIVE_TARGET_d_106_ac_a);
|
||||
@@ -313,7 +313,7 @@ FuriHalNfcError furi_hal_nfc_iso14443_3a_listener_sleep(FuriHalSpiBusHandle* han
|
||||
return FuriHalNfcErrorNone;
|
||||
}
|
||||
|
||||
FuriHalNfcError furi_hal_nfc_iso14443_3a_listener_idle(FuriHalSpiBusHandle* handle) {
|
||||
FuriHalNfcError furi_hal_nfc_iso14443_3a_listener_idle(const FuriHalSpiBusHandle* handle) {
|
||||
// Enable auto collision resolution
|
||||
st25r3916_clear_reg_bits(
|
||||
handle, ST25R3916_REG_PASSIVE_TARGET, ST25R3916_REG_PASSIVE_TARGET_d_106_ac_a);
|
||||
|
||||
@@ -1,7 +1,7 @@
|
||||
#include "furi_hal_nfc_i.h"
|
||||
#include "furi_hal_nfc_tech_i.h"
|
||||
|
||||
static FuriHalNfcError furi_hal_nfc_iso14443b_common_init(FuriHalSpiBusHandle* handle) {
|
||||
static FuriHalNfcError furi_hal_nfc_iso14443b_common_init(const FuriHalSpiBusHandle* handle) {
|
||||
// Common NFC-B settings, 106kbps
|
||||
|
||||
// 1st stage zero = 60kHz, 3rd stage zero = 200 kHz
|
||||
@@ -40,7 +40,7 @@ static FuriHalNfcError furi_hal_nfc_iso14443b_common_init(FuriHalSpiBusHandle* h
|
||||
return FuriHalNfcErrorNone;
|
||||
}
|
||||
|
||||
static FuriHalNfcError furi_hal_nfc_iso14443b_poller_init(FuriHalSpiBusHandle* handle) {
|
||||
static FuriHalNfcError furi_hal_nfc_iso14443b_poller_init(const FuriHalSpiBusHandle* handle) {
|
||||
// Enable ISO14443B mode, AM modulation
|
||||
st25r3916_change_reg_bits(
|
||||
handle,
|
||||
@@ -84,7 +84,7 @@ static FuriHalNfcError furi_hal_nfc_iso14443b_poller_init(FuriHalSpiBusHandle* h
|
||||
return furi_hal_nfc_iso14443b_common_init(handle);
|
||||
}
|
||||
|
||||
static FuriHalNfcError furi_hal_nfc_iso14443b_poller_deinit(FuriHalSpiBusHandle* handle) {
|
||||
static FuriHalNfcError furi_hal_nfc_iso14443b_poller_deinit(const FuriHalSpiBusHandle* handle) {
|
||||
UNUSED(handle);
|
||||
return FuriHalNfcErrorNone;
|
||||
}
|
||||
|
||||
@@ -74,7 +74,7 @@ static void furi_hal_nfc_iso15693_poller_free(FuriHalNfcIso15693Poller* instance
|
||||
free(instance);
|
||||
}
|
||||
|
||||
static FuriHalNfcError furi_hal_nfc_iso15693_common_init(FuriHalSpiBusHandle* handle) {
|
||||
static FuriHalNfcError furi_hal_nfc_iso15693_common_init(const FuriHalSpiBusHandle* handle) {
|
||||
// Common NFC-V settings, 26.48 kbps
|
||||
|
||||
// 1st stage zero = 12 kHz, 3rd stage zero = 80 kHz, low-pass = 600 kHz
|
||||
@@ -112,7 +112,7 @@ static FuriHalNfcError furi_hal_nfc_iso15693_common_init(FuriHalSpiBusHandle* ha
|
||||
return FuriHalNfcErrorNone;
|
||||
}
|
||||
|
||||
static FuriHalNfcError furi_hal_nfc_iso15693_poller_init(FuriHalSpiBusHandle* handle) {
|
||||
static FuriHalNfcError furi_hal_nfc_iso15693_poller_init(const FuriHalSpiBusHandle* handle) {
|
||||
furi_check(furi_hal_nfc_iso15693_poller == NULL);
|
||||
|
||||
furi_hal_nfc_iso15693_poller = furi_hal_nfc_iso15693_poller_alloc();
|
||||
@@ -141,7 +141,7 @@ static FuriHalNfcError furi_hal_nfc_iso15693_poller_init(FuriHalSpiBusHandle* ha
|
||||
return furi_hal_nfc_iso15693_common_init(handle);
|
||||
}
|
||||
|
||||
static FuriHalNfcError furi_hal_nfc_iso15693_poller_deinit(FuriHalSpiBusHandle* handle) {
|
||||
static FuriHalNfcError furi_hal_nfc_iso15693_poller_deinit(const FuriHalSpiBusHandle* handle) {
|
||||
UNUSED(handle);
|
||||
furi_check(furi_hal_nfc_iso15693_poller);
|
||||
|
||||
@@ -238,7 +238,7 @@ static FuriHalNfcError iso15693_3_poller_decode_frame(
|
||||
}
|
||||
|
||||
static FuriHalNfcError furi_hal_nfc_iso15693_poller_tx(
|
||||
FuriHalSpiBusHandle* handle,
|
||||
const FuriHalSpiBusHandle* handle,
|
||||
const uint8_t* tx_data,
|
||||
size_t tx_bits) {
|
||||
FuriHalNfcIso15693Poller* instance = furi_hal_nfc_iso15693_poller;
|
||||
@@ -252,7 +252,7 @@ static FuriHalNfcError furi_hal_nfc_iso15693_poller_tx(
|
||||
}
|
||||
|
||||
static FuriHalNfcError furi_hal_nfc_iso15693_poller_rx(
|
||||
FuriHalSpiBusHandle* handle,
|
||||
const FuriHalSpiBusHandle* handle,
|
||||
uint8_t* rx_data,
|
||||
size_t rx_data_size,
|
||||
size_t* rx_bits) {
|
||||
@@ -284,14 +284,16 @@ static FuriHalNfcError furi_hal_nfc_iso15693_poller_rx(
|
||||
return error;
|
||||
}
|
||||
|
||||
static void furi_hal_nfc_iso15693_listener_transparent_mode_enter(FuriHalSpiBusHandle* handle) {
|
||||
static void
|
||||
furi_hal_nfc_iso15693_listener_transparent_mode_enter(const FuriHalSpiBusHandle* handle) {
|
||||
st25r3916_direct_cmd(handle, ST25R3916_CMD_TRANSPARENT_MODE);
|
||||
|
||||
furi_hal_spi_bus_handle_deinit(handle);
|
||||
furi_hal_nfc_deinit_gpio_isr();
|
||||
}
|
||||
|
||||
static void furi_hal_nfc_iso15693_listener_transparent_mode_exit(FuriHalSpiBusHandle* handle) {
|
||||
static void
|
||||
furi_hal_nfc_iso15693_listener_transparent_mode_exit(const FuriHalSpiBusHandle* handle) {
|
||||
// Configure gpio back to SPI and exit transparent mode
|
||||
furi_hal_nfc_init_gpio_isr();
|
||||
furi_hal_spi_bus_handle_init(handle);
|
||||
@@ -299,7 +301,7 @@ static void furi_hal_nfc_iso15693_listener_transparent_mode_exit(FuriHalSpiBusHa
|
||||
st25r3916_direct_cmd(handle, ST25R3916_CMD_UNMASK_RECEIVE_DATA);
|
||||
}
|
||||
|
||||
static FuriHalNfcError furi_hal_nfc_iso15693_listener_init(FuriHalSpiBusHandle* handle) {
|
||||
static FuriHalNfcError furi_hal_nfc_iso15693_listener_init(const FuriHalSpiBusHandle* handle) {
|
||||
furi_check(furi_hal_nfc_iso15693_listener == NULL);
|
||||
|
||||
furi_hal_nfc_iso15693_listener = furi_hal_nfc_iso15693_listener_alloc();
|
||||
@@ -328,7 +330,7 @@ static FuriHalNfcError furi_hal_nfc_iso15693_listener_init(FuriHalSpiBusHandle*
|
||||
return error;
|
||||
}
|
||||
|
||||
static FuriHalNfcError furi_hal_nfc_iso15693_listener_deinit(FuriHalSpiBusHandle* handle) {
|
||||
static FuriHalNfcError furi_hal_nfc_iso15693_listener_deinit(const FuriHalSpiBusHandle* handle) {
|
||||
furi_check(furi_hal_nfc_iso15693_listener);
|
||||
|
||||
furi_hal_nfc_iso15693_listener_transparent_mode_exit(handle);
|
||||
@@ -387,7 +389,7 @@ static FuriHalNfcEvent furi_hal_nfc_iso15693_wait_event(uint32_t timeout_ms) {
|
||||
}
|
||||
|
||||
static FuriHalNfcError furi_hal_nfc_iso15693_listener_tx(
|
||||
FuriHalSpiBusHandle* handle,
|
||||
const FuriHalSpiBusHandle* handle,
|
||||
const uint8_t* tx_data,
|
||||
size_t tx_bits) {
|
||||
UNUSED(handle);
|
||||
@@ -407,7 +409,7 @@ FuriHalNfcError furi_hal_nfc_iso15693_listener_tx_sof(void) {
|
||||
}
|
||||
|
||||
static FuriHalNfcError furi_hal_nfc_iso15693_listener_rx(
|
||||
FuriHalSpiBusHandle* handle,
|
||||
const FuriHalSpiBusHandle* handle,
|
||||
uint8_t* rx_data,
|
||||
size_t rx_data_size,
|
||||
size_t* rx_bits) {
|
||||
@@ -425,7 +427,7 @@ static FuriHalNfcError furi_hal_nfc_iso15693_listener_rx(
|
||||
return FuriHalNfcErrorNone;
|
||||
}
|
||||
|
||||
FuriHalNfcError furi_hal_nfc_iso15693_listener_sleep(FuriHalSpiBusHandle* handle) {
|
||||
FuriHalNfcError furi_hal_nfc_iso15693_listener_sleep(const FuriHalSpiBusHandle* handle) {
|
||||
UNUSED(handle);
|
||||
|
||||
return FuriHalNfcErrorNone;
|
||||
|
||||
@@ -25,7 +25,7 @@ extern "C" {
|
||||
* @param[in,out] handle pointer to the NFC chip SPI handle.
|
||||
* @returns FuriHalNfcErrorNone on success, any other error code on failure.
|
||||
*/
|
||||
typedef FuriHalNfcError (*FuriHalNfcChipConfig)(FuriHalSpiBusHandle* handle);
|
||||
typedef FuriHalNfcError (*FuriHalNfcChipConfig)(const FuriHalSpiBusHandle* handle);
|
||||
|
||||
/**
|
||||
* @brief Transmit data using technology-specific framing and timings.
|
||||
@@ -36,7 +36,7 @@ typedef FuriHalNfcError (*FuriHalNfcChipConfig)(FuriHalSpiBusHandle* handle);
|
||||
* @returns FuriHalNfcErrorNone on success, any other error code on failure.
|
||||
*/
|
||||
typedef FuriHalNfcError (
|
||||
*FuriHalNfcTx)(FuriHalSpiBusHandle* handle, const uint8_t* tx_data, size_t tx_bits);
|
||||
*FuriHalNfcTx)(const FuriHalSpiBusHandle* handle, const uint8_t* tx_data, size_t tx_bits);
|
||||
|
||||
/**
|
||||
* @brief Receive data using technology-specific framing and timings.
|
||||
@@ -48,7 +48,7 @@ typedef FuriHalNfcError (
|
||||
* @returns FuriHalNfcErrorNone on success, any other error code on failure.
|
||||
*/
|
||||
typedef FuriHalNfcError (*FuriHalNfcRx)(
|
||||
FuriHalSpiBusHandle* handle,
|
||||
const FuriHalSpiBusHandle* handle,
|
||||
uint8_t* rx_data,
|
||||
size_t rx_data_size,
|
||||
size_t* rx_bits);
|
||||
@@ -69,7 +69,7 @@ typedef FuriHalNfcEvent (*FuriHalNfcWaitEvent)(uint32_t timeout_ms);
|
||||
* @param[in,out] handle pointer to the NFC chip SPI handle.
|
||||
* @returns FuriHalNfcErrorNone on success, any other error code on failure.
|
||||
*/
|
||||
typedef FuriHalNfcError (*FuriHalNfcSleep)(FuriHalSpiBusHandle* handle);
|
||||
typedef FuriHalNfcError (*FuriHalNfcSleep)(const FuriHalSpiBusHandle* handle);
|
||||
|
||||
/**
|
||||
* @brief Go to idle in listener mode.
|
||||
@@ -79,7 +79,7 @@ typedef FuriHalNfcError (*FuriHalNfcSleep)(FuriHalSpiBusHandle* handle);
|
||||
* @param[in,out] handle pointer to the NFC chip SPI handle.
|
||||
* @returns FuriHalNfcErrorNone on success, any other error code on failure.
|
||||
*/
|
||||
typedef FuriHalNfcError (*FuriHalNfcIdle)(FuriHalSpiBusHandle* handle);
|
||||
typedef FuriHalNfcError (*FuriHalNfcIdle)(const FuriHalSpiBusHandle* handle);
|
||||
|
||||
/**
|
||||
* @brief Technology-specific compenstaion values for pollers.
|
||||
|
||||
@@ -204,7 +204,7 @@ typedef struct {
|
||||
} SD_CardInfo;
|
||||
|
||||
/** Pointer to currently used SPI Handle */
|
||||
FuriHalSpiBusHandle* furi_hal_sd_spi_handle = NULL;
|
||||
const FuriHalSpiBusHandle* furi_hal_sd_spi_handle = NULL;
|
||||
|
||||
static inline void sd_spi_select_card(void) {
|
||||
furi_hal_gpio_write(furi_hal_sd_spi_handle->cs, false);
|
||||
|
||||
@@ -38,17 +38,17 @@ void furi_hal_spi_bus_deinit(FuriHalSpiBus* bus) {
|
||||
bus->callback(bus, FuriHalSpiBusEventDeinit);
|
||||
}
|
||||
|
||||
void furi_hal_spi_bus_handle_init(FuriHalSpiBusHandle* handle) {
|
||||
void furi_hal_spi_bus_handle_init(const FuriHalSpiBusHandle* handle) {
|
||||
furi_check(handle);
|
||||
handle->callback(handle, FuriHalSpiBusHandleEventInit);
|
||||
}
|
||||
|
||||
void furi_hal_spi_bus_handle_deinit(FuriHalSpiBusHandle* handle) {
|
||||
void furi_hal_spi_bus_handle_deinit(const FuriHalSpiBusHandle* handle) {
|
||||
furi_check(handle);
|
||||
handle->callback(handle, FuriHalSpiBusHandleEventDeinit);
|
||||
}
|
||||
|
||||
void furi_hal_spi_acquire(FuriHalSpiBusHandle* handle) {
|
||||
void furi_hal_spi_acquire(const FuriHalSpiBusHandle* handle) {
|
||||
furi_check(handle);
|
||||
|
||||
furi_hal_power_insomnia_enter();
|
||||
@@ -62,7 +62,7 @@ void furi_hal_spi_acquire(FuriHalSpiBusHandle* handle) {
|
||||
handle->callback(handle, FuriHalSpiBusHandleEventActivate);
|
||||
}
|
||||
|
||||
void furi_hal_spi_release(FuriHalSpiBusHandle* handle) {
|
||||
void furi_hal_spi_release(const FuriHalSpiBusHandle* handle) {
|
||||
furi_check(handle);
|
||||
furi_check(handle->bus->current_handle == handle);
|
||||
|
||||
@@ -77,7 +77,7 @@ void furi_hal_spi_release(FuriHalSpiBusHandle* handle) {
|
||||
furi_hal_power_insomnia_exit();
|
||||
}
|
||||
|
||||
static void furi_hal_spi_bus_end_txrx(FuriHalSpiBusHandle* handle, uint32_t timeout) {
|
||||
static void furi_hal_spi_bus_end_txrx(const FuriHalSpiBusHandle* handle, uint32_t timeout) {
|
||||
UNUSED(timeout); // FIXME
|
||||
while(LL_SPI_GetTxFIFOLevel(handle->bus->spi) != LL_SPI_TX_FIFO_EMPTY)
|
||||
;
|
||||
@@ -89,7 +89,7 @@ static void furi_hal_spi_bus_end_txrx(FuriHalSpiBusHandle* handle, uint32_t time
|
||||
}
|
||||
|
||||
bool furi_hal_spi_bus_rx(
|
||||
FuriHalSpiBusHandle* handle,
|
||||
const FuriHalSpiBusHandle* handle,
|
||||
uint8_t* buffer,
|
||||
size_t size,
|
||||
uint32_t timeout) {
|
||||
@@ -102,7 +102,7 @@ bool furi_hal_spi_bus_rx(
|
||||
}
|
||||
|
||||
bool furi_hal_spi_bus_tx(
|
||||
FuriHalSpiBusHandle* handle,
|
||||
const FuriHalSpiBusHandle* handle,
|
||||
const uint8_t* buffer,
|
||||
size_t size,
|
||||
uint32_t timeout) {
|
||||
@@ -128,7 +128,7 @@ bool furi_hal_spi_bus_tx(
|
||||
}
|
||||
|
||||
bool furi_hal_spi_bus_trx(
|
||||
FuriHalSpiBusHandle* handle,
|
||||
const FuriHalSpiBusHandle* handle,
|
||||
const uint8_t* tx_buffer,
|
||||
uint8_t* rx_buffer,
|
||||
size_t size,
|
||||
@@ -192,7 +192,7 @@ static void spi_dma_isr(void* context) {
|
||||
}
|
||||
|
||||
bool furi_hal_spi_bus_trx_dma(
|
||||
FuriHalSpiBusHandle* handle,
|
||||
const FuriHalSpiBusHandle* handle,
|
||||
uint8_t* tx_buffer,
|
||||
uint8_t* rx_buffer,
|
||||
size_t size,
|
||||
|
||||
@@ -147,7 +147,7 @@ FuriHalSpiBus furi_hal_spi_bus_d = {
|
||||
/* SPI Bus Handles */
|
||||
|
||||
inline static void furi_hal_spi_bus_r_handle_event_callback(
|
||||
FuriHalSpiBusHandle* handle,
|
||||
const FuriHalSpiBusHandle* handle,
|
||||
FuriHalSpiBusHandleEvent event,
|
||||
const LL_SPI_InitTypeDef* preset) {
|
||||
if(event == FuriHalSpiBusHandleEventInit) {
|
||||
@@ -193,7 +193,7 @@ inline static void furi_hal_spi_bus_r_handle_event_callback(
|
||||
}
|
||||
|
||||
inline static void furi_hal_spi_bus_external_handle_event_callback(
|
||||
FuriHalSpiBusHandle* handle,
|
||||
const FuriHalSpiBusHandle* handle,
|
||||
FuriHalSpiBusHandleEvent event,
|
||||
const LL_SPI_InitTypeDef* preset) {
|
||||
if(event == FuriHalSpiBusHandleEventInit) {
|
||||
@@ -239,7 +239,7 @@ inline static void furi_hal_spi_bus_external_handle_event_callback(
|
||||
}
|
||||
|
||||
inline static void furi_hal_spi_bus_nfc_handle_event_callback(
|
||||
FuriHalSpiBusHandle* handle,
|
||||
const FuriHalSpiBusHandle* handle,
|
||||
FuriHalSpiBusHandleEvent event,
|
||||
const LL_SPI_InitTypeDef* preset) {
|
||||
if(event == FuriHalSpiBusHandleEventInit) {
|
||||
@@ -305,12 +305,12 @@ inline static void furi_hal_spi_bus_nfc_handle_event_callback(
|
||||
}
|
||||
|
||||
static void furi_hal_spi_bus_handle_subghz_event_callback(
|
||||
FuriHalSpiBusHandle* handle,
|
||||
const FuriHalSpiBusHandle* handle,
|
||||
FuriHalSpiBusHandleEvent event) {
|
||||
furi_hal_spi_bus_r_handle_event_callback(handle, event, &furi_hal_spi_preset_1edge_low_8m);
|
||||
}
|
||||
|
||||
FuriHalSpiBusHandle furi_hal_spi_bus_handle_subghz = {
|
||||
const FuriHalSpiBusHandle furi_hal_spi_bus_handle_subghz = {
|
||||
.bus = &furi_hal_spi_bus_r,
|
||||
.callback = furi_hal_spi_bus_handle_subghz_event_callback,
|
||||
.miso = &gpio_spi_r_miso,
|
||||
@@ -320,12 +320,12 @@ FuriHalSpiBusHandle furi_hal_spi_bus_handle_subghz = {
|
||||
};
|
||||
|
||||
static void furi_hal_spi_bus_handle_nfc_event_callback(
|
||||
FuriHalSpiBusHandle* handle,
|
||||
const FuriHalSpiBusHandle* handle,
|
||||
FuriHalSpiBusHandleEvent event) {
|
||||
furi_hal_spi_bus_nfc_handle_event_callback(handle, event, &furi_hal_spi_preset_2edge_low_8m);
|
||||
}
|
||||
|
||||
FuriHalSpiBusHandle furi_hal_spi_bus_handle_nfc = {
|
||||
const FuriHalSpiBusHandle furi_hal_spi_bus_handle_nfc = {
|
||||
.bus = &furi_hal_spi_bus_r,
|
||||
.callback = furi_hal_spi_bus_handle_nfc_event_callback,
|
||||
.miso = &gpio_spi_r_miso,
|
||||
@@ -335,13 +335,13 @@ FuriHalSpiBusHandle furi_hal_spi_bus_handle_nfc = {
|
||||
};
|
||||
|
||||
static void furi_hal_spi_bus_handle_external_event_callback(
|
||||
FuriHalSpiBusHandle* handle,
|
||||
const FuriHalSpiBusHandle* handle,
|
||||
FuriHalSpiBusHandleEvent event) {
|
||||
furi_hal_spi_bus_external_handle_event_callback(
|
||||
handle, event, &furi_hal_spi_preset_1edge_low_2m);
|
||||
}
|
||||
|
||||
FuriHalSpiBusHandle furi_hal_spi_bus_handle_external = {
|
||||
const FuriHalSpiBusHandle furi_hal_spi_bus_handle_external = {
|
||||
.bus = &furi_hal_spi_bus_r,
|
||||
.callback = furi_hal_spi_bus_handle_external_event_callback,
|
||||
.miso = &gpio_ext_pa6,
|
||||
@@ -351,7 +351,7 @@ FuriHalSpiBusHandle furi_hal_spi_bus_handle_external = {
|
||||
};
|
||||
|
||||
inline static void furi_hal_spi_bus_d_handle_event_callback(
|
||||
FuriHalSpiBusHandle* handle,
|
||||
const FuriHalSpiBusHandle* handle,
|
||||
FuriHalSpiBusHandleEvent event,
|
||||
const LL_SPI_InitTypeDef* preset) {
|
||||
if(event == FuriHalSpiBusHandleEventInit) {
|
||||
@@ -392,12 +392,12 @@ inline static void furi_hal_spi_bus_d_handle_event_callback(
|
||||
}
|
||||
|
||||
static void furi_hal_spi_bus_handle_display_event_callback(
|
||||
FuriHalSpiBusHandle* handle,
|
||||
const FuriHalSpiBusHandle* handle,
|
||||
FuriHalSpiBusHandleEvent event) {
|
||||
furi_hal_spi_bus_d_handle_event_callback(handle, event, &furi_hal_spi_preset_1edge_low_4m);
|
||||
}
|
||||
|
||||
FuriHalSpiBusHandle furi_hal_spi_bus_handle_display = {
|
||||
const FuriHalSpiBusHandle furi_hal_spi_bus_handle_display = {
|
||||
.bus = &furi_hal_spi_bus_d,
|
||||
.callback = furi_hal_spi_bus_handle_display_event_callback,
|
||||
.miso = &gpio_spi_d_miso,
|
||||
@@ -407,12 +407,12 @@ FuriHalSpiBusHandle furi_hal_spi_bus_handle_display = {
|
||||
};
|
||||
|
||||
static void furi_hal_spi_bus_handle_sd_fast_event_callback(
|
||||
FuriHalSpiBusHandle* handle,
|
||||
const FuriHalSpiBusHandle* handle,
|
||||
FuriHalSpiBusHandleEvent event) {
|
||||
furi_hal_spi_bus_d_handle_event_callback(handle, event, &furi_hal_spi_preset_1edge_low_16m);
|
||||
}
|
||||
|
||||
FuriHalSpiBusHandle furi_hal_spi_bus_handle_sd_fast = {
|
||||
const FuriHalSpiBusHandle furi_hal_spi_bus_handle_sd_fast = {
|
||||
.bus = &furi_hal_spi_bus_d,
|
||||
.callback = furi_hal_spi_bus_handle_sd_fast_event_callback,
|
||||
.miso = &gpio_spi_d_miso,
|
||||
@@ -422,12 +422,12 @@ FuriHalSpiBusHandle furi_hal_spi_bus_handle_sd_fast = {
|
||||
};
|
||||
|
||||
static void furi_hal_spi_bus_handle_sd_slow_event_callback(
|
||||
FuriHalSpiBusHandle* handle,
|
||||
const FuriHalSpiBusHandle* handle,
|
||||
FuriHalSpiBusHandleEvent event) {
|
||||
furi_hal_spi_bus_d_handle_event_callback(handle, event, &furi_hal_spi_preset_1edge_low_2m);
|
||||
}
|
||||
|
||||
FuriHalSpiBusHandle furi_hal_spi_bus_handle_sd_slow = {
|
||||
const FuriHalSpiBusHandle furi_hal_spi_bus_handle_sd_slow = {
|
||||
.bus = &furi_hal_spi_bus_d,
|
||||
.callback = furi_hal_spi_bus_handle_sd_slow_event_callback,
|
||||
.miso = &gpio_spi_d_miso,
|
||||
|
||||
@@ -28,10 +28,10 @@ extern FuriHalSpiBus furi_hal_spi_bus_r;
|
||||
extern FuriHalSpiBus furi_hal_spi_bus_d;
|
||||
|
||||
/** CC1101 on `furi_hal_spi_bus_r` */
|
||||
extern FuriHalSpiBusHandle furi_hal_spi_bus_handle_subghz;
|
||||
extern const FuriHalSpiBusHandle furi_hal_spi_bus_handle_subghz;
|
||||
|
||||
/** ST25R3916 on `furi_hal_spi_bus_r` */
|
||||
extern FuriHalSpiBusHandle furi_hal_spi_bus_handle_nfc;
|
||||
extern const FuriHalSpiBusHandle furi_hal_spi_bus_handle_nfc;
|
||||
|
||||
/** External on `furi_hal_spi_bus_r`
|
||||
* Preset: `furi_hal_spi_preset_1edge_low_2m`
|
||||
@@ -45,16 +45,16 @@ extern FuriHalSpiBusHandle furi_hal_spi_bus_handle_nfc;
|
||||
* Bus pins are floating on inactive state, CS high after initialization
|
||||
*
|
||||
*/
|
||||
extern FuriHalSpiBusHandle furi_hal_spi_bus_handle_external;
|
||||
extern const FuriHalSpiBusHandle furi_hal_spi_bus_handle_external;
|
||||
|
||||
/** ST7567(Display) on `furi_hal_spi_bus_d` */
|
||||
extern FuriHalSpiBusHandle furi_hal_spi_bus_handle_display;
|
||||
extern const FuriHalSpiBusHandle furi_hal_spi_bus_handle_display;
|
||||
|
||||
/** SdCard in fast mode on `furi_hal_spi_bus_d` */
|
||||
extern FuriHalSpiBusHandle furi_hal_spi_bus_handle_sd_fast;
|
||||
extern const FuriHalSpiBusHandle furi_hal_spi_bus_handle_sd_fast;
|
||||
|
||||
/** SdCard in slow mode on `furi_hal_spi_bus_d` */
|
||||
extern FuriHalSpiBusHandle furi_hal_spi_bus_handle_sd_slow;
|
||||
extern const FuriHalSpiBusHandle furi_hal_spi_bus_handle_sd_slow;
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
|
||||
@@ -31,7 +31,7 @@ typedef void (*FuriHalSpiBusEventCallback)(FuriHalSpiBus* bus, FuriHalSpiBusEven
|
||||
struct FuriHalSpiBus {
|
||||
SPI_TypeDef* spi;
|
||||
FuriHalSpiBusEventCallback callback;
|
||||
FuriHalSpiBusHandle* current_handle;
|
||||
const FuriHalSpiBusHandle* current_handle;
|
||||
};
|
||||
|
||||
/** FuriHal spi handle states */
|
||||
@@ -44,7 +44,7 @@ typedef enum {
|
||||
|
||||
/** FuriHal spi handle event callback */
|
||||
typedef void (*FuriHalSpiBusHandleEventCallback)(
|
||||
FuriHalSpiBusHandle* handle,
|
||||
const FuriHalSpiBusHandle* handle,
|
||||
FuriHalSpiBusHandleEvent event);
|
||||
|
||||
/** FuriHal spi handle */
|
||||
|
||||
@@ -35,13 +35,13 @@ void furi_hal_spi_bus_deinit(FuriHalSpiBus* bus);
|
||||
*
|
||||
* @param handle pointer to FuriHalSpiBusHandle instance
|
||||
*/
|
||||
void furi_hal_spi_bus_handle_init(FuriHalSpiBusHandle* handle);
|
||||
void furi_hal_spi_bus_handle_init(const FuriHalSpiBusHandle* handle);
|
||||
|
||||
/** Deinitialize SPI Bus Handle
|
||||
*
|
||||
* @param handle pointer to FuriHalSpiBusHandle instance
|
||||
*/
|
||||
void furi_hal_spi_bus_handle_deinit(FuriHalSpiBusHandle* handle);
|
||||
void furi_hal_spi_bus_handle_deinit(const FuriHalSpiBusHandle* handle);
|
||||
|
||||
/** Acquire SPI bus
|
||||
*
|
||||
@@ -49,7 +49,7 @@ void furi_hal_spi_bus_handle_deinit(FuriHalSpiBusHandle* handle);
|
||||
*
|
||||
* @param handle pointer to FuriHalSpiBusHandle instance
|
||||
*/
|
||||
void furi_hal_spi_acquire(FuriHalSpiBusHandle* handle);
|
||||
void furi_hal_spi_acquire(const FuriHalSpiBusHandle* handle);
|
||||
|
||||
/** Release SPI bus
|
||||
*
|
||||
@@ -57,7 +57,7 @@ void furi_hal_spi_acquire(FuriHalSpiBusHandle* handle);
|
||||
*
|
||||
* @param handle pointer to FuriHalSpiBusHandle instance
|
||||
*/
|
||||
void furi_hal_spi_release(FuriHalSpiBusHandle* handle);
|
||||
void furi_hal_spi_release(const FuriHalSpiBusHandle* handle);
|
||||
|
||||
/** SPI Receive
|
||||
*
|
||||
@@ -69,7 +69,7 @@ void furi_hal_spi_release(FuriHalSpiBusHandle* handle);
|
||||
* @return true on sucess
|
||||
*/
|
||||
bool furi_hal_spi_bus_rx(
|
||||
FuriHalSpiBusHandle* handle,
|
||||
const FuriHalSpiBusHandle* handle,
|
||||
uint8_t* buffer,
|
||||
size_t size,
|
||||
uint32_t timeout);
|
||||
@@ -84,7 +84,7 @@ bool furi_hal_spi_bus_rx(
|
||||
* @return true on success
|
||||
*/
|
||||
bool furi_hal_spi_bus_tx(
|
||||
FuriHalSpiBusHandle* handle,
|
||||
const FuriHalSpiBusHandle* handle,
|
||||
const uint8_t* buffer,
|
||||
size_t size,
|
||||
uint32_t timeout);
|
||||
@@ -100,7 +100,7 @@ bool furi_hal_spi_bus_tx(
|
||||
* @return true on success
|
||||
*/
|
||||
bool furi_hal_spi_bus_trx(
|
||||
FuriHalSpiBusHandle* handle,
|
||||
const FuriHalSpiBusHandle* handle,
|
||||
const uint8_t* tx_buffer,
|
||||
uint8_t* rx_buffer,
|
||||
size_t size,
|
||||
@@ -117,7 +117,7 @@ bool furi_hal_spi_bus_trx(
|
||||
* @return true on success
|
||||
*/
|
||||
bool furi_hal_spi_bus_trx_dma(
|
||||
FuriHalSpiBusHandle* handle,
|
||||
const FuriHalSpiBusHandle* handle,
|
||||
uint8_t* tx_buffer,
|
||||
uint8_t* rx_buffer,
|
||||
size_t size,
|
||||
|
||||
Reference in New Issue
Block a user