mirror of
https://github.com/Next-Flip/Momentum-Firmware.git
synced 2026-04-24 03:29:57 -07:00
Merge remote-tracking branch 'ul/dev' into mntm-dev
This commit is contained in:
@@ -35,7 +35,7 @@ typedef struct {
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static bq25896_regs_t bq25896_regs;
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bool bq25896_init(FuriHalI2cBusHandle* handle) {
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bool bq25896_init(const FuriHalI2cBusHandle* handle) {
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bool result = true;
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bq25896_regs.r14.REG_RST = 1;
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@@ -78,19 +78,19 @@ bool bq25896_init(FuriHalI2cBusHandle* handle) {
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return result;
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}
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void bq25896_set_boost_lim(FuriHalI2cBusHandle* handle, BoostLim boost_lim) {
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void bq25896_set_boost_lim(const FuriHalI2cBusHandle* handle, BoostLim boost_lim) {
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bq25896_regs.r0A.BOOST_LIM = boost_lim;
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furi_hal_i2c_write_reg_8(
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handle, BQ25896_ADDRESS, 0x0A, *(uint8_t*)&bq25896_regs.r0A, BQ25896_I2C_TIMEOUT);
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}
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void bq25896_poweroff(FuriHalI2cBusHandle* handle) {
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void bq25896_poweroff(const FuriHalI2cBusHandle* handle) {
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bq25896_regs.r09.BATFET_DIS = 1;
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furi_hal_i2c_write_reg_8(
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handle, BQ25896_ADDRESS, 0x09, *(uint8_t*)&bq25896_regs.r09, BQ25896_I2C_TIMEOUT);
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}
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ChrgStat bq25896_get_charge_status(FuriHalI2cBusHandle* handle) {
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ChrgStat bq25896_get_charge_status(const FuriHalI2cBusHandle* handle) {
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furi_hal_i2c_read_mem(
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handle,
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BQ25896_ADDRESS,
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@@ -103,52 +103,52 @@ ChrgStat bq25896_get_charge_status(FuriHalI2cBusHandle* handle) {
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return bq25896_regs.r0B.CHRG_STAT;
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}
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bool bq25896_is_charging(FuriHalI2cBusHandle* handle) {
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bool bq25896_is_charging(const FuriHalI2cBusHandle* handle) {
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// Include precharge, fast charging, and charging termination done as "charging"
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return bq25896_get_charge_status(handle) != ChrgStatNo;
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}
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bool bq25896_is_charging_done(FuriHalI2cBusHandle* handle) {
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bool bq25896_is_charging_done(const FuriHalI2cBusHandle* handle) {
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return bq25896_get_charge_status(handle) == ChrgStatDone;
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}
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void bq25896_enable_charging(FuriHalI2cBusHandle* handle) {
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void bq25896_enable_charging(const FuriHalI2cBusHandle* handle) {
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bq25896_regs.r03.CHG_CONFIG = 1;
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furi_hal_i2c_write_reg_8(
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handle, BQ25896_ADDRESS, 0x03, *(uint8_t*)&bq25896_regs.r03, BQ25896_I2C_TIMEOUT);
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}
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void bq25896_disable_charging(FuriHalI2cBusHandle* handle) {
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void bq25896_disable_charging(const FuriHalI2cBusHandle* handle) {
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bq25896_regs.r03.CHG_CONFIG = 0;
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furi_hal_i2c_write_reg_8(
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handle, BQ25896_ADDRESS, 0x03, *(uint8_t*)&bq25896_regs.r03, BQ25896_I2C_TIMEOUT);
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}
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void bq25896_enable_otg(FuriHalI2cBusHandle* handle) {
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void bq25896_enable_otg(const FuriHalI2cBusHandle* handle) {
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bq25896_regs.r03.OTG_CONFIG = 1;
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furi_hal_i2c_write_reg_8(
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handle, BQ25896_ADDRESS, 0x03, *(uint8_t*)&bq25896_regs.r03, BQ25896_I2C_TIMEOUT);
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}
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void bq25896_disable_otg(FuriHalI2cBusHandle* handle) {
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void bq25896_disable_otg(const FuriHalI2cBusHandle* handle) {
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bq25896_regs.r03.OTG_CONFIG = 0;
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furi_hal_i2c_write_reg_8(
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handle, BQ25896_ADDRESS, 0x03, *(uint8_t*)&bq25896_regs.r03, BQ25896_I2C_TIMEOUT);
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}
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bool bq25896_is_otg_enabled(FuriHalI2cBusHandle* handle) {
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bool bq25896_is_otg_enabled(const FuriHalI2cBusHandle* handle) {
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furi_hal_i2c_read_reg_8(
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handle, BQ25896_ADDRESS, 0x03, (uint8_t*)&bq25896_regs.r03, BQ25896_I2C_TIMEOUT);
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return bq25896_regs.r03.OTG_CONFIG;
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}
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uint16_t bq25896_get_vreg_voltage(FuriHalI2cBusHandle* handle) {
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uint16_t bq25896_get_vreg_voltage(const FuriHalI2cBusHandle* handle) {
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furi_hal_i2c_read_reg_8(
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handle, BQ25896_ADDRESS, 0x06, (uint8_t*)&bq25896_regs.r06, BQ25896_I2C_TIMEOUT);
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return (uint16_t)bq25896_regs.r06.VREG * 16 + 3840;
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}
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void bq25896_set_vreg_voltage(FuriHalI2cBusHandle* handle, uint16_t vreg_voltage) {
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void bq25896_set_vreg_voltage(const FuriHalI2cBusHandle* handle, uint16_t vreg_voltage) {
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if(vreg_voltage < 3840) {
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// Minimum valid value is 3840 mV
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vreg_voltage = 3840;
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@@ -166,13 +166,13 @@ void bq25896_set_vreg_voltage(FuriHalI2cBusHandle* handle, uint16_t vreg_voltage
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handle, BQ25896_ADDRESS, 0x06, *(uint8_t*)&bq25896_regs.r06, BQ25896_I2C_TIMEOUT);
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}
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bool bq25896_check_otg_fault(FuriHalI2cBusHandle* handle) {
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bool bq25896_check_otg_fault(const FuriHalI2cBusHandle* handle) {
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furi_hal_i2c_read_reg_8(
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handle, BQ25896_ADDRESS, 0x0C, (uint8_t*)&bq25896_regs.r0C, BQ25896_I2C_TIMEOUT);
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return bq25896_regs.r0C.BOOST_FAULT;
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}
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uint16_t bq25896_get_vbus_voltage(FuriHalI2cBusHandle* handle) {
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uint16_t bq25896_get_vbus_voltage(const FuriHalI2cBusHandle* handle) {
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furi_hal_i2c_read_reg_8(
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handle, BQ25896_ADDRESS, 0x11, (uint8_t*)&bq25896_regs.r11, BQ25896_I2C_TIMEOUT);
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if(bq25896_regs.r11.VBUS_GD) {
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@@ -182,25 +182,25 @@ uint16_t bq25896_get_vbus_voltage(FuriHalI2cBusHandle* handle) {
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}
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}
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uint16_t bq25896_get_vsys_voltage(FuriHalI2cBusHandle* handle) {
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uint16_t bq25896_get_vsys_voltage(const FuriHalI2cBusHandle* handle) {
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furi_hal_i2c_read_reg_8(
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handle, BQ25896_ADDRESS, 0x0F, (uint8_t*)&bq25896_regs.r0F, BQ25896_I2C_TIMEOUT);
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return (uint16_t)bq25896_regs.r0F.SYSV * 20 + 2304;
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}
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uint16_t bq25896_get_vbat_voltage(FuriHalI2cBusHandle* handle) {
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uint16_t bq25896_get_vbat_voltage(const FuriHalI2cBusHandle* handle) {
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furi_hal_i2c_read_reg_8(
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handle, BQ25896_ADDRESS, 0x0E, (uint8_t*)&bq25896_regs.r0E, BQ25896_I2C_TIMEOUT);
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return (uint16_t)bq25896_regs.r0E.BATV * 20 + 2304;
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}
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uint16_t bq25896_get_vbat_current(FuriHalI2cBusHandle* handle) {
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uint16_t bq25896_get_vbat_current(const FuriHalI2cBusHandle* handle) {
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furi_hal_i2c_read_reg_8(
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handle, BQ25896_ADDRESS, 0x12, (uint8_t*)&bq25896_regs.r12, BQ25896_I2C_TIMEOUT);
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return (uint16_t)bq25896_regs.r12.ICHGR * 50;
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}
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uint32_t bq25896_get_ntc_mpct(FuriHalI2cBusHandle* handle) {
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uint32_t bq25896_get_ntc_mpct(const FuriHalI2cBusHandle* handle) {
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furi_hal_i2c_read_reg_8(
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handle, BQ25896_ADDRESS, 0x10, (uint8_t*)&bq25896_regs.r10, BQ25896_I2C_TIMEOUT);
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return (uint32_t)bq25896_regs.r10.TSPCT * 465 + 21000;
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@@ -7,61 +7,61 @@
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#include <furi_hal_i2c.h>
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/** Initialize Driver */
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bool bq25896_init(FuriHalI2cBusHandle* handle);
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bool bq25896_init(const FuriHalI2cBusHandle* handle);
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/** Set boost lim*/
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void bq25896_set_boost_lim(FuriHalI2cBusHandle* handle, BoostLim boost_lim);
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void bq25896_set_boost_lim(const FuriHalI2cBusHandle* handle, BoostLim boost_lim);
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/** Send device into shipping mode */
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void bq25896_poweroff(FuriHalI2cBusHandle* handle);
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void bq25896_poweroff(const FuriHalI2cBusHandle* handle);
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/** Get charging status */
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ChrgStat bq25896_get_charge_status(FuriHalI2cBusHandle* handle);
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ChrgStat bq25896_get_charge_status(const FuriHalI2cBusHandle* handle);
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/** Is currently charging */
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bool bq25896_is_charging(FuriHalI2cBusHandle* handle);
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bool bq25896_is_charging(const FuriHalI2cBusHandle* handle);
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/** Is charging completed while connected to charger */
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bool bq25896_is_charging_done(FuriHalI2cBusHandle* handle);
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bool bq25896_is_charging_done(const FuriHalI2cBusHandle* handle);
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/** Enable charging */
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void bq25896_enable_charging(FuriHalI2cBusHandle* handle);
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void bq25896_enable_charging(const FuriHalI2cBusHandle* handle);
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/** Disable charging */
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void bq25896_disable_charging(FuriHalI2cBusHandle* handle);
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void bq25896_disable_charging(const FuriHalI2cBusHandle* handle);
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/** Enable otg */
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void bq25896_enable_otg(FuriHalI2cBusHandle* handle);
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void bq25896_enable_otg(const FuriHalI2cBusHandle* handle);
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/** Disable otg */
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void bq25896_disable_otg(FuriHalI2cBusHandle* handle);
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void bq25896_disable_otg(const FuriHalI2cBusHandle* handle);
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/** Is otg enabled */
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bool bq25896_is_otg_enabled(FuriHalI2cBusHandle* handle);
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bool bq25896_is_otg_enabled(const FuriHalI2cBusHandle* handle);
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/** Get VREG (charging limit) voltage in mV */
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uint16_t bq25896_get_vreg_voltage(FuriHalI2cBusHandle* handle);
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uint16_t bq25896_get_vreg_voltage(const FuriHalI2cBusHandle* handle);
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/** Set VREG (charging limit) voltage in mV
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*
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* Valid range: 3840mV - 4208mV, in steps of 16mV
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*/
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void bq25896_set_vreg_voltage(FuriHalI2cBusHandle* handle, uint16_t vreg_voltage);
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void bq25896_set_vreg_voltage(const FuriHalI2cBusHandle* handle, uint16_t vreg_voltage);
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/** Check OTG BOOST Fault status */
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bool bq25896_check_otg_fault(FuriHalI2cBusHandle* handle);
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bool bq25896_check_otg_fault(const FuriHalI2cBusHandle* handle);
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/** Get VBUS Voltage in mV */
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uint16_t bq25896_get_vbus_voltage(FuriHalI2cBusHandle* handle);
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uint16_t bq25896_get_vbus_voltage(const FuriHalI2cBusHandle* handle);
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/** Get VSYS Voltage in mV */
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uint16_t bq25896_get_vsys_voltage(FuriHalI2cBusHandle* handle);
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uint16_t bq25896_get_vsys_voltage(const FuriHalI2cBusHandle* handle);
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/** Get VBAT Voltage in mV */
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uint16_t bq25896_get_vbat_voltage(FuriHalI2cBusHandle* handle);
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uint16_t bq25896_get_vbat_voltage(const FuriHalI2cBusHandle* handle);
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/** Get VBAT current in mA */
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uint16_t bq25896_get_vbat_current(FuriHalI2cBusHandle* handle);
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uint16_t bq25896_get_vbat_current(const FuriHalI2cBusHandle* handle);
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/** Get NTC voltage in mpct of REGN */
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uint32_t bq25896_get_ntc_mpct(FuriHalI2cBusHandle* handle);
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uint32_t bq25896_get_ntc_mpct(const FuriHalI2cBusHandle* handle);
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@@ -43,7 +43,7 @@
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#endif
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static inline bool bq27220_read_reg(
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FuriHalI2cBusHandle* handle,
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const FuriHalI2cBusHandle* handle,
|
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uint8_t address,
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uint8_t* buffer,
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size_t buffer_size) {
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@@ -52,7 +52,7 @@ static inline bool bq27220_read_reg(
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}
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static inline bool bq27220_write(
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FuriHalI2cBusHandle* handle,
|
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const FuriHalI2cBusHandle* handle,
|
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uint8_t address,
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||||
const uint8_t* buffer,
|
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size_t buffer_size) {
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@@ -60,11 +60,11 @@ static inline bool bq27220_write(
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handle, BQ27220_ADDRESS, address, buffer, buffer_size, BQ27220_I2C_TIMEOUT);
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}
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|
||||
static inline bool bq27220_control(FuriHalI2cBusHandle* handle, uint16_t control) {
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static inline bool bq27220_control(const FuriHalI2cBusHandle* handle, uint16_t control) {
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return bq27220_write(handle, CommandControl, (uint8_t*)&control, 2);
|
||||
}
|
||||
|
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static uint16_t bq27220_read_word(FuriHalI2cBusHandle* handle, uint8_t address) {
|
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static uint16_t bq27220_read_word(const FuriHalI2cBusHandle* handle, uint8_t address) {
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uint16_t buf = BQ27220_ERROR;
|
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|
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if(!bq27220_read_reg(handle, address, (uint8_t*)&buf, 2)) {
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@@ -83,7 +83,7 @@ static uint8_t bq27220_get_checksum(uint8_t* data, uint16_t len) {
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}
|
||||
|
||||
static bool bq27220_parameter_check(
|
||||
FuriHalI2cBusHandle* handle,
|
||||
const FuriHalI2cBusHandle* handle,
|
||||
uint16_t address,
|
||||
uint32_t value,
|
||||
size_t size,
|
||||
@@ -163,7 +163,7 @@ static bool bq27220_parameter_check(
|
||||
}
|
||||
|
||||
static bool bq27220_data_memory_check(
|
||||
FuriHalI2cBusHandle* handle,
|
||||
const FuriHalI2cBusHandle* handle,
|
||||
const BQ27220DMData* data_memory,
|
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bool update) {
|
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if(update) {
|
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@@ -268,7 +268,7 @@ static bool bq27220_data_memory_check(
|
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return result;
|
||||
}
|
||||
|
||||
bool bq27220_init(FuriHalI2cBusHandle* handle, const BQ27220DMData* data_memory) {
|
||||
bool bq27220_init(const FuriHalI2cBusHandle* handle, const BQ27220DMData* data_memory) {
|
||||
bool result = false;
|
||||
bool reset_and_provisioning_required = false;
|
||||
|
||||
@@ -365,7 +365,7 @@ bool bq27220_init(FuriHalI2cBusHandle* handle, const BQ27220DMData* data_memory)
|
||||
return result;
|
||||
}
|
||||
|
||||
bool bq27220_reset(FuriHalI2cBusHandle* handle) {
|
||||
bool bq27220_reset(const FuriHalI2cBusHandle* handle) {
|
||||
bool result = false;
|
||||
do {
|
||||
if(!bq27220_control(handle, Control_RESET)) {
|
||||
@@ -396,7 +396,7 @@ bool bq27220_reset(FuriHalI2cBusHandle* handle) {
|
||||
return result;
|
||||
}
|
||||
|
||||
bool bq27220_seal(FuriHalI2cBusHandle* handle) {
|
||||
bool bq27220_seal(const FuriHalI2cBusHandle* handle) {
|
||||
Bq27220OperationStatus operation_status = {0};
|
||||
bool result = false;
|
||||
do {
|
||||
@@ -431,7 +431,7 @@ bool bq27220_seal(FuriHalI2cBusHandle* handle) {
|
||||
return result;
|
||||
}
|
||||
|
||||
bool bq27220_unseal(FuriHalI2cBusHandle* handle) {
|
||||
bool bq27220_unseal(const FuriHalI2cBusHandle* handle) {
|
||||
Bq27220OperationStatus operation_status = {0};
|
||||
bool result = false;
|
||||
do {
|
||||
@@ -465,7 +465,7 @@ bool bq27220_unseal(FuriHalI2cBusHandle* handle) {
|
||||
return result;
|
||||
}
|
||||
|
||||
bool bq27220_full_access(FuriHalI2cBusHandle* handle) {
|
||||
bool bq27220_full_access(const FuriHalI2cBusHandle* handle) {
|
||||
bool result = false;
|
||||
|
||||
do {
|
||||
@@ -518,29 +518,35 @@ bool bq27220_full_access(FuriHalI2cBusHandle* handle) {
|
||||
return result;
|
||||
}
|
||||
|
||||
uint16_t bq27220_get_voltage(FuriHalI2cBusHandle* handle) {
|
||||
uint16_t bq27220_get_voltage(const FuriHalI2cBusHandle* handle) {
|
||||
return bq27220_read_word(handle, CommandVoltage);
|
||||
}
|
||||
|
||||
int16_t bq27220_get_current(FuriHalI2cBusHandle* handle) {
|
||||
int16_t bq27220_get_current(const FuriHalI2cBusHandle* handle) {
|
||||
return bq27220_read_word(handle, CommandCurrent);
|
||||
}
|
||||
|
||||
bool bq27220_get_control_status(FuriHalI2cBusHandle* handle, Bq27220ControlStatus* control_status) {
|
||||
bool bq27220_get_control_status(
|
||||
const FuriHalI2cBusHandle* handle,
|
||||
Bq27220ControlStatus* control_status) {
|
||||
return bq27220_read_reg(handle, CommandControl, (uint8_t*)control_status, 2);
|
||||
}
|
||||
|
||||
bool bq27220_get_battery_status(FuriHalI2cBusHandle* handle, Bq27220BatteryStatus* battery_status) {
|
||||
bool bq27220_get_battery_status(
|
||||
const FuriHalI2cBusHandle* handle,
|
||||
Bq27220BatteryStatus* battery_status) {
|
||||
return bq27220_read_reg(handle, CommandBatteryStatus, (uint8_t*)battery_status, 2);
|
||||
}
|
||||
|
||||
bool bq27220_get_operation_status(
|
||||
FuriHalI2cBusHandle* handle,
|
||||
const FuriHalI2cBusHandle* handle,
|
||||
Bq27220OperationStatus* operation_status) {
|
||||
return bq27220_read_reg(handle, CommandOperationStatus, (uint8_t*)operation_status, 2);
|
||||
}
|
||||
|
||||
bool bq27220_get_gauging_status(FuriHalI2cBusHandle* handle, Bq27220GaugingStatus* gauging_status) {
|
||||
bool bq27220_get_gauging_status(
|
||||
const FuriHalI2cBusHandle* handle,
|
||||
Bq27220GaugingStatus* gauging_status) {
|
||||
// Request gauging data to be loaded to MAC
|
||||
if(!bq27220_control(handle, Control_GAUGING_STATUS)) {
|
||||
FURI_LOG_E(TAG, "DM SelectSubclass for read failed");
|
||||
@@ -552,26 +558,26 @@ bool bq27220_get_gauging_status(FuriHalI2cBusHandle* handle, Bq27220GaugingStatu
|
||||
return bq27220_read_reg(handle, CommandMACData, (uint8_t*)gauging_status, 2);
|
||||
}
|
||||
|
||||
uint16_t bq27220_get_temperature(FuriHalI2cBusHandle* handle) {
|
||||
uint16_t bq27220_get_temperature(const FuriHalI2cBusHandle* handle) {
|
||||
return bq27220_read_word(handle, CommandTemperature);
|
||||
}
|
||||
|
||||
uint16_t bq27220_get_full_charge_capacity(FuriHalI2cBusHandle* handle) {
|
||||
uint16_t bq27220_get_full_charge_capacity(const FuriHalI2cBusHandle* handle) {
|
||||
return bq27220_read_word(handle, CommandFullChargeCapacity);
|
||||
}
|
||||
|
||||
uint16_t bq27220_get_design_capacity(FuriHalI2cBusHandle* handle) {
|
||||
uint16_t bq27220_get_design_capacity(const FuriHalI2cBusHandle* handle) {
|
||||
return bq27220_read_word(handle, CommandDesignCapacity);
|
||||
}
|
||||
|
||||
uint16_t bq27220_get_remaining_capacity(FuriHalI2cBusHandle* handle) {
|
||||
uint16_t bq27220_get_remaining_capacity(const FuriHalI2cBusHandle* handle) {
|
||||
return bq27220_read_word(handle, CommandRemainingCapacity);
|
||||
}
|
||||
|
||||
uint16_t bq27220_get_state_of_charge(FuriHalI2cBusHandle* handle) {
|
||||
uint16_t bq27220_get_state_of_charge(const FuriHalI2cBusHandle* handle) {
|
||||
return bq27220_read_word(handle, CommandStateOfCharge);
|
||||
}
|
||||
|
||||
uint16_t bq27220_get_state_of_health(FuriHalI2cBusHandle* handle) {
|
||||
uint16_t bq27220_get_state_of_health(const FuriHalI2cBusHandle* handle) {
|
||||
return bq27220_read_word(handle, CommandStateOfHealth);
|
||||
}
|
||||
|
||||
@@ -136,7 +136,7 @@ typedef struct BQ27220DMData BQ27220DMData;
|
||||
*
|
||||
* @return true on success, false otherwise
|
||||
*/
|
||||
bool bq27220_init(FuriHalI2cBusHandle* handle, const BQ27220DMData* data_memory);
|
||||
bool bq27220_init(const FuriHalI2cBusHandle* handle, const BQ27220DMData* data_memory);
|
||||
|
||||
/** Reset gauge
|
||||
*
|
||||
@@ -144,7 +144,7 @@ bool bq27220_init(FuriHalI2cBusHandle* handle, const BQ27220DMData* data_memory)
|
||||
*
|
||||
* @return true on success, false otherwise
|
||||
*/
|
||||
bool bq27220_reset(FuriHalI2cBusHandle* handle);
|
||||
bool bq27220_reset(const FuriHalI2cBusHandle* handle);
|
||||
|
||||
/** Seal gauge access
|
||||
*
|
||||
@@ -152,7 +152,7 @@ bool bq27220_reset(FuriHalI2cBusHandle* handle);
|
||||
*
|
||||
* @return true on success, false otherwise
|
||||
*/
|
||||
bool bq27220_seal(FuriHalI2cBusHandle* handle);
|
||||
bool bq27220_seal(const FuriHalI2cBusHandle* handle);
|
||||
|
||||
/** Unseal gauge access
|
||||
*
|
||||
@@ -160,7 +160,7 @@ bool bq27220_seal(FuriHalI2cBusHandle* handle);
|
||||
*
|
||||
* @return true on success, false otherwise
|
||||
*/
|
||||
bool bq27220_unseal(FuriHalI2cBusHandle* handle);
|
||||
bool bq27220_unseal(const FuriHalI2cBusHandle* handle);
|
||||
|
||||
/** Get full access
|
||||
*
|
||||
@@ -170,7 +170,7 @@ bool bq27220_unseal(FuriHalI2cBusHandle* handle);
|
||||
*
|
||||
* @return true on success, false otherwise
|
||||
*/
|
||||
bool bq27220_full_access(FuriHalI2cBusHandle* handle);
|
||||
bool bq27220_full_access(const FuriHalI2cBusHandle* handle);
|
||||
|
||||
/** Get battery voltage
|
||||
*
|
||||
@@ -178,7 +178,7 @@ bool bq27220_full_access(FuriHalI2cBusHandle* handle);
|
||||
*
|
||||
* @return voltage in mV or BQ27220_ERROR
|
||||
*/
|
||||
uint16_t bq27220_get_voltage(FuriHalI2cBusHandle* handle);
|
||||
uint16_t bq27220_get_voltage(const FuriHalI2cBusHandle* handle);
|
||||
|
||||
/** Get current
|
||||
*
|
||||
@@ -186,7 +186,7 @@ uint16_t bq27220_get_voltage(FuriHalI2cBusHandle* handle);
|
||||
*
|
||||
* @return current in mA or BQ27220_ERROR
|
||||
*/
|
||||
int16_t bq27220_get_current(FuriHalI2cBusHandle* handle);
|
||||
int16_t bq27220_get_current(const FuriHalI2cBusHandle* handle);
|
||||
|
||||
/** Get control status
|
||||
*
|
||||
@@ -195,7 +195,9 @@ int16_t bq27220_get_current(FuriHalI2cBusHandle* handle);
|
||||
*
|
||||
* @return true on success, false otherwise
|
||||
*/
|
||||
bool bq27220_get_control_status(FuriHalI2cBusHandle* handle, Bq27220ControlStatus* control_status);
|
||||
bool bq27220_get_control_status(
|
||||
const FuriHalI2cBusHandle* handle,
|
||||
Bq27220ControlStatus* control_status);
|
||||
|
||||
/** Get battery status
|
||||
*
|
||||
@@ -204,7 +206,9 @@ bool bq27220_get_control_status(FuriHalI2cBusHandle* handle, Bq27220ControlStatu
|
||||
*
|
||||
* @return true on success, false otherwise
|
||||
*/
|
||||
bool bq27220_get_battery_status(FuriHalI2cBusHandle* handle, Bq27220BatteryStatus* battery_status);
|
||||
bool bq27220_get_battery_status(
|
||||
const FuriHalI2cBusHandle* handle,
|
||||
Bq27220BatteryStatus* battery_status);
|
||||
|
||||
/** Get operation status
|
||||
*
|
||||
@@ -214,7 +218,7 @@ bool bq27220_get_battery_status(FuriHalI2cBusHandle* handle, Bq27220BatteryStatu
|
||||
* @return true on success, false otherwise
|
||||
*/
|
||||
bool bq27220_get_operation_status(
|
||||
FuriHalI2cBusHandle* handle,
|
||||
const FuriHalI2cBusHandle* handle,
|
||||
Bq27220OperationStatus* operation_status);
|
||||
|
||||
/** Get gauging status
|
||||
@@ -224,7 +228,9 @@ bool bq27220_get_operation_status(
|
||||
*
|
||||
* @return true on success, false otherwise
|
||||
*/
|
||||
bool bq27220_get_gauging_status(FuriHalI2cBusHandle* handle, Bq27220GaugingStatus* gauging_status);
|
||||
bool bq27220_get_gauging_status(
|
||||
const FuriHalI2cBusHandle* handle,
|
||||
Bq27220GaugingStatus* gauging_status);
|
||||
|
||||
/** Get temperature
|
||||
*
|
||||
@@ -232,7 +238,7 @@ bool bq27220_get_gauging_status(FuriHalI2cBusHandle* handle, Bq27220GaugingStatu
|
||||
*
|
||||
* @return temperature in units of 0.1°K
|
||||
*/
|
||||
uint16_t bq27220_get_temperature(FuriHalI2cBusHandle* handle);
|
||||
uint16_t bq27220_get_temperature(const FuriHalI2cBusHandle* handle);
|
||||
|
||||
/** Get compensated full charge capacity
|
||||
*
|
||||
@@ -240,7 +246,7 @@ uint16_t bq27220_get_temperature(FuriHalI2cBusHandle* handle);
|
||||
*
|
||||
* @return full charge capacity in mAh or BQ27220_ERROR
|
||||
*/
|
||||
uint16_t bq27220_get_full_charge_capacity(FuriHalI2cBusHandle* handle);
|
||||
uint16_t bq27220_get_full_charge_capacity(const FuriHalI2cBusHandle* handle);
|
||||
|
||||
/** Get design capacity
|
||||
*
|
||||
@@ -248,7 +254,7 @@ uint16_t bq27220_get_full_charge_capacity(FuriHalI2cBusHandle* handle);
|
||||
*
|
||||
* @return design capacity in mAh or BQ27220_ERROR
|
||||
*/
|
||||
uint16_t bq27220_get_design_capacity(FuriHalI2cBusHandle* handle);
|
||||
uint16_t bq27220_get_design_capacity(const FuriHalI2cBusHandle* handle);
|
||||
|
||||
/** Get remaining capacity
|
||||
*
|
||||
@@ -256,7 +262,7 @@ uint16_t bq27220_get_design_capacity(FuriHalI2cBusHandle* handle);
|
||||
*
|
||||
* @return remaining capacity in mAh or BQ27220_ERROR
|
||||
*/
|
||||
uint16_t bq27220_get_remaining_capacity(FuriHalI2cBusHandle* handle);
|
||||
uint16_t bq27220_get_remaining_capacity(const FuriHalI2cBusHandle* handle);
|
||||
|
||||
/** Get predicted remaining battery capacity
|
||||
*
|
||||
@@ -264,7 +270,7 @@ uint16_t bq27220_get_remaining_capacity(FuriHalI2cBusHandle* handle);
|
||||
*
|
||||
* @return state of charge in percents or BQ27220_ERROR
|
||||
*/
|
||||
uint16_t bq27220_get_state_of_charge(FuriHalI2cBusHandle* handle);
|
||||
uint16_t bq27220_get_state_of_charge(const FuriHalI2cBusHandle* handle);
|
||||
|
||||
/** Get ratio of full charge capacity over design capacity
|
||||
*
|
||||
@@ -272,4 +278,4 @@ uint16_t bq27220_get_state_of_charge(FuriHalI2cBusHandle* handle);
|
||||
*
|
||||
* @return state of health in percents or BQ27220_ERROR
|
||||
*/
|
||||
uint16_t bq27220_get_state_of_health(FuriHalI2cBusHandle* handle);
|
||||
uint16_t bq27220_get_state_of_health(const FuriHalI2cBusHandle* handle);
|
||||
|
||||
@@ -3,7 +3,8 @@
|
||||
#include <string.h>
|
||||
#include <furi_hal_cortex.h>
|
||||
|
||||
static bool cc1101_spi_trx(FuriHalSpiBusHandle* handle, uint8_t* tx, uint8_t* rx, uint8_t size) {
|
||||
static bool
|
||||
cc1101_spi_trx(const FuriHalSpiBusHandle* handle, uint8_t* tx, uint8_t* rx, uint8_t size) {
|
||||
FuriHalCortexTimer timer = furi_hal_cortex_timer_get(CC1101_TIMEOUT * 1000);
|
||||
|
||||
while(furi_hal_gpio_read(handle->miso)) {
|
||||
@@ -16,7 +17,7 @@ static bool cc1101_spi_trx(FuriHalSpiBusHandle* handle, uint8_t* tx, uint8_t* rx
|
||||
return true;
|
||||
}
|
||||
|
||||
CC1101Status cc1101_strobe(FuriHalSpiBusHandle* handle, uint8_t strobe) {
|
||||
CC1101Status cc1101_strobe(const FuriHalSpiBusHandle* handle, uint8_t strobe) {
|
||||
uint8_t tx[1] = {strobe};
|
||||
CC1101Status rx[1] = {0};
|
||||
rx[0].CHIP_RDYn = 1;
|
||||
@@ -27,7 +28,7 @@ CC1101Status cc1101_strobe(FuriHalSpiBusHandle* handle, uint8_t strobe) {
|
||||
return rx[0];
|
||||
}
|
||||
|
||||
CC1101Status cc1101_write_reg(FuriHalSpiBusHandle* handle, uint8_t reg, uint8_t data) {
|
||||
CC1101Status cc1101_write_reg(const FuriHalSpiBusHandle* handle, uint8_t reg, uint8_t data) {
|
||||
uint8_t tx[2] = {reg, data};
|
||||
CC1101Status rx[2] = {0};
|
||||
rx[0].CHIP_RDYn = 1;
|
||||
@@ -39,7 +40,7 @@ CC1101Status cc1101_write_reg(FuriHalSpiBusHandle* handle, uint8_t reg, uint8_t
|
||||
return rx[1];
|
||||
}
|
||||
|
||||
CC1101Status cc1101_read_reg(FuriHalSpiBusHandle* handle, uint8_t reg, uint8_t* data) {
|
||||
CC1101Status cc1101_read_reg(const FuriHalSpiBusHandle* handle, uint8_t reg, uint8_t* data) {
|
||||
assert(sizeof(CC1101Status) == 1);
|
||||
uint8_t tx[2] = {reg | CC1101_READ, 0};
|
||||
CC1101Status rx[2] = {0};
|
||||
@@ -52,33 +53,36 @@ CC1101Status cc1101_read_reg(FuriHalSpiBusHandle* handle, uint8_t reg, uint8_t*
|
||||
return rx[0];
|
||||
}
|
||||
|
||||
uint8_t cc1101_get_partnumber(FuriHalSpiBusHandle* handle) {
|
||||
uint8_t cc1101_get_partnumber(const FuriHalSpiBusHandle* handle) {
|
||||
uint8_t partnumber = 0;
|
||||
cc1101_read_reg(handle, CC1101_STATUS_PARTNUM | CC1101_BURST, &partnumber);
|
||||
return partnumber;
|
||||
}
|
||||
|
||||
uint8_t cc1101_get_version(FuriHalSpiBusHandle* handle) {
|
||||
uint8_t cc1101_get_version(const FuriHalSpiBusHandle* handle) {
|
||||
uint8_t version = 0;
|
||||
cc1101_read_reg(handle, CC1101_STATUS_VERSION | CC1101_BURST, &version);
|
||||
return version;
|
||||
}
|
||||
|
||||
uint8_t cc1101_get_rssi(FuriHalSpiBusHandle* handle) {
|
||||
uint8_t cc1101_get_rssi(const FuriHalSpiBusHandle* handle) {
|
||||
uint8_t rssi = 0;
|
||||
cc1101_read_reg(handle, CC1101_STATUS_RSSI | CC1101_BURST, &rssi);
|
||||
return rssi;
|
||||
}
|
||||
|
||||
CC1101Status cc1101_reset(FuriHalSpiBusHandle* handle) {
|
||||
CC1101Status cc1101_reset(const FuriHalSpiBusHandle* handle) {
|
||||
return cc1101_strobe(handle, CC1101_STROBE_SRES);
|
||||
}
|
||||
|
||||
CC1101Status cc1101_get_status(FuriHalSpiBusHandle* handle) {
|
||||
CC1101Status cc1101_get_status(const FuriHalSpiBusHandle* handle) {
|
||||
return cc1101_strobe(handle, CC1101_STROBE_SNOP);
|
||||
}
|
||||
|
||||
bool cc1101_wait_status_state(FuriHalSpiBusHandle* handle, CC1101State state, uint32_t timeout_us) {
|
||||
bool cc1101_wait_status_state(
|
||||
const FuriHalSpiBusHandle* handle,
|
||||
CC1101State state,
|
||||
uint32_t timeout_us) {
|
||||
bool result = false;
|
||||
CC1101Status status = {0};
|
||||
FuriHalCortexTimer timer = furi_hal_cortex_timer_get(timeout_us);
|
||||
@@ -92,35 +96,35 @@ bool cc1101_wait_status_state(FuriHalSpiBusHandle* handle, CC1101State state, ui
|
||||
return result;
|
||||
}
|
||||
|
||||
CC1101Status cc1101_shutdown(FuriHalSpiBusHandle* handle) {
|
||||
CC1101Status cc1101_shutdown(const FuriHalSpiBusHandle* handle) {
|
||||
return cc1101_strobe(handle, CC1101_STROBE_SPWD);
|
||||
}
|
||||
|
||||
CC1101Status cc1101_calibrate(FuriHalSpiBusHandle* handle) {
|
||||
CC1101Status cc1101_calibrate(const FuriHalSpiBusHandle* handle) {
|
||||
return cc1101_strobe(handle, CC1101_STROBE_SCAL);
|
||||
}
|
||||
|
||||
CC1101Status cc1101_switch_to_idle(FuriHalSpiBusHandle* handle) {
|
||||
CC1101Status cc1101_switch_to_idle(const FuriHalSpiBusHandle* handle) {
|
||||
return cc1101_strobe(handle, CC1101_STROBE_SIDLE);
|
||||
}
|
||||
|
||||
CC1101Status cc1101_switch_to_rx(FuriHalSpiBusHandle* handle) {
|
||||
CC1101Status cc1101_switch_to_rx(const FuriHalSpiBusHandle* handle) {
|
||||
return cc1101_strobe(handle, CC1101_STROBE_SRX);
|
||||
}
|
||||
|
||||
CC1101Status cc1101_switch_to_tx(FuriHalSpiBusHandle* handle) {
|
||||
CC1101Status cc1101_switch_to_tx(const FuriHalSpiBusHandle* handle) {
|
||||
return cc1101_strobe(handle, CC1101_STROBE_STX);
|
||||
}
|
||||
|
||||
CC1101Status cc1101_flush_rx(FuriHalSpiBusHandle* handle) {
|
||||
CC1101Status cc1101_flush_rx(const FuriHalSpiBusHandle* handle) {
|
||||
return cc1101_strobe(handle, CC1101_STROBE_SFRX);
|
||||
}
|
||||
|
||||
CC1101Status cc1101_flush_tx(FuriHalSpiBusHandle* handle) {
|
||||
CC1101Status cc1101_flush_tx(const FuriHalSpiBusHandle* handle) {
|
||||
return cc1101_strobe(handle, CC1101_STROBE_SFTX);
|
||||
}
|
||||
|
||||
uint32_t cc1101_set_frequency(FuriHalSpiBusHandle* handle, uint32_t value) {
|
||||
uint32_t cc1101_set_frequency(const FuriHalSpiBusHandle* handle, uint32_t value) {
|
||||
uint64_t real_value = (uint64_t)value * CC1101_FDIV / CC1101_QUARTZ;
|
||||
|
||||
// Sanity check
|
||||
@@ -135,7 +139,7 @@ uint32_t cc1101_set_frequency(FuriHalSpiBusHandle* handle, uint32_t value) {
|
||||
return (uint32_t)real_frequency;
|
||||
}
|
||||
|
||||
uint32_t cc1101_set_intermediate_frequency(FuriHalSpiBusHandle* handle, uint32_t value) {
|
||||
uint32_t cc1101_set_intermediate_frequency(const FuriHalSpiBusHandle* handle, uint32_t value) {
|
||||
uint64_t real_value = value * CC1101_IFDIV / CC1101_QUARTZ;
|
||||
assert((real_value & 0xFF) == real_value);
|
||||
|
||||
@@ -146,7 +150,7 @@ uint32_t cc1101_set_intermediate_frequency(FuriHalSpiBusHandle* handle, uint32_t
|
||||
return (uint32_t)real_frequency;
|
||||
}
|
||||
|
||||
void cc1101_set_pa_table(FuriHalSpiBusHandle* handle, const uint8_t value[8]) {
|
||||
void cc1101_set_pa_table(const FuriHalSpiBusHandle* handle, const uint8_t value[8]) {
|
||||
uint8_t tx[9] = {CC1101_PATABLE | CC1101_BURST}; //-V1009
|
||||
CC1101Status rx[9] = {0};
|
||||
rx[0].CHIP_RDYn = 1;
|
||||
@@ -159,7 +163,7 @@ void cc1101_set_pa_table(FuriHalSpiBusHandle* handle, const uint8_t value[8]) {
|
||||
assert((rx[0].CHIP_RDYn | rx[8].CHIP_RDYn) == 0);
|
||||
}
|
||||
|
||||
uint8_t cc1101_write_fifo(FuriHalSpiBusHandle* handle, const uint8_t* data, uint8_t size) {
|
||||
uint8_t cc1101_write_fifo(const FuriHalSpiBusHandle* handle, const uint8_t* data, uint8_t size) {
|
||||
uint8_t buff_tx[64];
|
||||
uint8_t buff_rx[64];
|
||||
buff_tx[0] = CC1101_FIFO | CC1101_BURST;
|
||||
@@ -170,7 +174,7 @@ uint8_t cc1101_write_fifo(FuriHalSpiBusHandle* handle, const uint8_t* data, uint
|
||||
return size;
|
||||
}
|
||||
|
||||
uint8_t cc1101_read_fifo(FuriHalSpiBusHandle* handle, uint8_t* data, uint8_t* size) {
|
||||
uint8_t cc1101_read_fifo(const FuriHalSpiBusHandle* handle, uint8_t* data, uint8_t* size) {
|
||||
uint8_t buff_trx[2];
|
||||
buff_trx[0] = CC1101_FIFO | CC1101_READ | CC1101_BURST;
|
||||
|
||||
|
||||
@@ -19,7 +19,7 @@ extern "C" {
|
||||
*
|
||||
* @return device status
|
||||
*/
|
||||
CC1101Status cc1101_strobe(FuriHalSpiBusHandle* handle, uint8_t strobe);
|
||||
CC1101Status cc1101_strobe(const FuriHalSpiBusHandle* handle, uint8_t strobe);
|
||||
|
||||
/** Write device register
|
||||
*
|
||||
@@ -29,7 +29,7 @@ CC1101Status cc1101_strobe(FuriHalSpiBusHandle* handle, uint8_t strobe);
|
||||
*
|
||||
* @return device status
|
||||
*/
|
||||
CC1101Status cc1101_write_reg(FuriHalSpiBusHandle* handle, uint8_t reg, uint8_t data);
|
||||
CC1101Status cc1101_write_reg(const FuriHalSpiBusHandle* handle, uint8_t reg, uint8_t data);
|
||||
|
||||
/** Read device register
|
||||
*
|
||||
@@ -39,7 +39,7 @@ CC1101Status cc1101_write_reg(FuriHalSpiBusHandle* handle, uint8_t reg, uint8_t
|
||||
*
|
||||
* @return device status
|
||||
*/
|
||||
CC1101Status cc1101_read_reg(FuriHalSpiBusHandle* handle, uint8_t reg, uint8_t* data);
|
||||
CC1101Status cc1101_read_reg(const FuriHalSpiBusHandle* handle, uint8_t reg, uint8_t* data);
|
||||
|
||||
/* High level API */
|
||||
|
||||
@@ -49,7 +49,7 @@ CC1101Status cc1101_read_reg(FuriHalSpiBusHandle* handle, uint8_t reg, uint8_t*
|
||||
*
|
||||
* @return CC1101Status structure
|
||||
*/
|
||||
CC1101Status cc1101_reset(FuriHalSpiBusHandle* handle);
|
||||
CC1101Status cc1101_reset(const FuriHalSpiBusHandle* handle);
|
||||
|
||||
/** Get status
|
||||
*
|
||||
@@ -57,7 +57,7 @@ CC1101Status cc1101_reset(FuriHalSpiBusHandle* handle);
|
||||
*
|
||||
* @return CC1101Status structure
|
||||
*/
|
||||
CC1101Status cc1101_get_status(FuriHalSpiBusHandle* handle);
|
||||
CC1101Status cc1101_get_status(const FuriHalSpiBusHandle* handle);
|
||||
|
||||
/** Wait specific chip state
|
||||
*
|
||||
@@ -67,7 +67,10 @@ CC1101Status cc1101_get_status(FuriHalSpiBusHandle* handle);
|
||||
*
|
||||
* @return true on success, false otherwise
|
||||
*/
|
||||
bool cc1101_wait_status_state(FuriHalSpiBusHandle* handle, CC1101State state, uint32_t timeout_us);
|
||||
bool cc1101_wait_status_state(
|
||||
const FuriHalSpiBusHandle* handle,
|
||||
CC1101State state,
|
||||
uint32_t timeout_us);
|
||||
|
||||
/** Enable shutdown mode
|
||||
*
|
||||
@@ -75,7 +78,7 @@ bool cc1101_wait_status_state(FuriHalSpiBusHandle* handle, CC1101State state, ui
|
||||
*
|
||||
* @return CC1101Status structure
|
||||
*/
|
||||
CC1101Status cc1101_shutdown(FuriHalSpiBusHandle* handle);
|
||||
CC1101Status cc1101_shutdown(const FuriHalSpiBusHandle* handle);
|
||||
|
||||
/** Get Partnumber
|
||||
*
|
||||
@@ -83,7 +86,7 @@ CC1101Status cc1101_shutdown(FuriHalSpiBusHandle* handle);
|
||||
*
|
||||
* @return part number id
|
||||
*/
|
||||
uint8_t cc1101_get_partnumber(FuriHalSpiBusHandle* handle);
|
||||
uint8_t cc1101_get_partnumber(const FuriHalSpiBusHandle* handle);
|
||||
|
||||
/** Get Version
|
||||
*
|
||||
@@ -91,7 +94,7 @@ uint8_t cc1101_get_partnumber(FuriHalSpiBusHandle* handle);
|
||||
*
|
||||
* @return version
|
||||
*/
|
||||
uint8_t cc1101_get_version(FuriHalSpiBusHandle* handle);
|
||||
uint8_t cc1101_get_version(const FuriHalSpiBusHandle* handle);
|
||||
|
||||
/** Get raw RSSI value
|
||||
*
|
||||
@@ -99,7 +102,7 @@ uint8_t cc1101_get_version(FuriHalSpiBusHandle* handle);
|
||||
*
|
||||
* @return rssi value
|
||||
*/
|
||||
uint8_t cc1101_get_rssi(FuriHalSpiBusHandle* handle);
|
||||
uint8_t cc1101_get_rssi(const FuriHalSpiBusHandle* handle);
|
||||
|
||||
/** Calibrate oscillator
|
||||
*
|
||||
@@ -107,13 +110,13 @@ uint8_t cc1101_get_rssi(FuriHalSpiBusHandle* handle);
|
||||
*
|
||||
* @return CC1101Status structure
|
||||
*/
|
||||
CC1101Status cc1101_calibrate(FuriHalSpiBusHandle* handle);
|
||||
CC1101Status cc1101_calibrate(const FuriHalSpiBusHandle* handle);
|
||||
|
||||
/** Switch to idle
|
||||
*
|
||||
* @param handle - pointer to FuriHalSpiHandle
|
||||
*/
|
||||
CC1101Status cc1101_switch_to_idle(FuriHalSpiBusHandle* handle);
|
||||
CC1101Status cc1101_switch_to_idle(const FuriHalSpiBusHandle* handle);
|
||||
|
||||
/** Switch to RX
|
||||
*
|
||||
@@ -121,7 +124,7 @@ CC1101Status cc1101_switch_to_idle(FuriHalSpiBusHandle* handle);
|
||||
*
|
||||
* @return CC1101Status structure
|
||||
*/
|
||||
CC1101Status cc1101_switch_to_rx(FuriHalSpiBusHandle* handle);
|
||||
CC1101Status cc1101_switch_to_rx(const FuriHalSpiBusHandle* handle);
|
||||
|
||||
/** Switch to TX
|
||||
*
|
||||
@@ -129,7 +132,7 @@ CC1101Status cc1101_switch_to_rx(FuriHalSpiBusHandle* handle);
|
||||
*
|
||||
* @return CC1101Status structure
|
||||
*/
|
||||
CC1101Status cc1101_switch_to_tx(FuriHalSpiBusHandle* handle);
|
||||
CC1101Status cc1101_switch_to_tx(const FuriHalSpiBusHandle* handle);
|
||||
|
||||
/** Flush RX FIFO
|
||||
*
|
||||
@@ -137,13 +140,13 @@ CC1101Status cc1101_switch_to_tx(FuriHalSpiBusHandle* handle);
|
||||
*
|
||||
* @return CC1101Status structure
|
||||
*/
|
||||
CC1101Status cc1101_flush_rx(FuriHalSpiBusHandle* handle);
|
||||
CC1101Status cc1101_flush_rx(const FuriHalSpiBusHandle* handle);
|
||||
|
||||
/** Flush TX FIFO
|
||||
*
|
||||
* @param handle - pointer to FuriHalSpiHandle
|
||||
*/
|
||||
CC1101Status cc1101_flush_tx(FuriHalSpiBusHandle* handle);
|
||||
CC1101Status cc1101_flush_tx(const FuriHalSpiBusHandle* handle);
|
||||
|
||||
/** Set Frequency
|
||||
*
|
||||
@@ -152,7 +155,7 @@ CC1101Status cc1101_flush_tx(FuriHalSpiBusHandle* handle);
|
||||
*
|
||||
* @return real frequency that were synthesized
|
||||
*/
|
||||
uint32_t cc1101_set_frequency(FuriHalSpiBusHandle* handle, uint32_t value);
|
||||
uint32_t cc1101_set_frequency(const FuriHalSpiBusHandle* handle, uint32_t value);
|
||||
|
||||
/** Set Intermediate Frequency
|
||||
*
|
||||
@@ -161,14 +164,14 @@ uint32_t cc1101_set_frequency(FuriHalSpiBusHandle* handle, uint32_t value);
|
||||
*
|
||||
* @return real inermediate frequency that were synthesized
|
||||
*/
|
||||
uint32_t cc1101_set_intermediate_frequency(FuriHalSpiBusHandle* handle, uint32_t value);
|
||||
uint32_t cc1101_set_intermediate_frequency(const FuriHalSpiBusHandle* handle, uint32_t value);
|
||||
|
||||
/** Set Power Amplifier level table, ramp
|
||||
*
|
||||
* @param handle - pointer to FuriHalSpiHandle
|
||||
* @param value - array of power level values
|
||||
*/
|
||||
void cc1101_set_pa_table(FuriHalSpiBusHandle* handle, const uint8_t value[8]);
|
||||
void cc1101_set_pa_table(const FuriHalSpiBusHandle* handle, const uint8_t value[8]);
|
||||
|
||||
/** Write FIFO
|
||||
*
|
||||
@@ -178,7 +181,7 @@ void cc1101_set_pa_table(FuriHalSpiBusHandle* handle, const uint8_t value[8]);
|
||||
*
|
||||
* @return size, written bytes count
|
||||
*/
|
||||
uint8_t cc1101_write_fifo(FuriHalSpiBusHandle* handle, const uint8_t* data, uint8_t size);
|
||||
uint8_t cc1101_write_fifo(const FuriHalSpiBusHandle* handle, const uint8_t* data, uint8_t size);
|
||||
|
||||
/** Read FIFO
|
||||
*
|
||||
@@ -188,7 +191,7 @@ uint8_t cc1101_write_fifo(FuriHalSpiBusHandle* handle, const uint8_t* data, uint
|
||||
*
|
||||
* @return size, read bytes count
|
||||
*/
|
||||
uint8_t cc1101_read_fifo(FuriHalSpiBusHandle* handle, uint8_t* data, uint8_t* size);
|
||||
uint8_t cc1101_read_fifo(const FuriHalSpiBusHandle* handle, uint8_t* data, uint8_t* size);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
|
||||
@@ -3,12 +3,12 @@
|
||||
#include "lp5562_reg.h"
|
||||
#include <furi_hal.h>
|
||||
|
||||
void lp5562_reset(FuriHalI2cBusHandle* handle) {
|
||||
void lp5562_reset(const FuriHalI2cBusHandle* handle) {
|
||||
Reg0D_Reset reg = {.value = 0xFF};
|
||||
furi_hal_i2c_write_reg_8(handle, LP5562_ADDRESS, 0x0D, *(uint8_t*)®, LP5562_I2C_TIMEOUT);
|
||||
}
|
||||
|
||||
void lp5562_configure(FuriHalI2cBusHandle* handle) {
|
||||
void lp5562_configure(const FuriHalI2cBusHandle* handle) {
|
||||
Reg08_Config config = {.INT_CLK_EN = true, .PS_EN = true, .PWM_HF = true};
|
||||
furi_hal_i2c_write_reg_8(handle, LP5562_ADDRESS, 0x08, *(uint8_t*)&config, LP5562_I2C_TIMEOUT);
|
||||
|
||||
@@ -21,14 +21,17 @@ void lp5562_configure(FuriHalI2cBusHandle* handle) {
|
||||
furi_hal_i2c_write_reg_8(handle, LP5562_ADDRESS, 0x70, *(uint8_t*)&map, LP5562_I2C_TIMEOUT);
|
||||
}
|
||||
|
||||
void lp5562_enable(FuriHalI2cBusHandle* handle) {
|
||||
void lp5562_enable(const FuriHalI2cBusHandle* handle) {
|
||||
Reg00_Enable reg = {.CHIP_EN = true, .LOG_EN = true};
|
||||
furi_hal_i2c_write_reg_8(handle, LP5562_ADDRESS, 0x00, *(uint8_t*)®, LP5562_I2C_TIMEOUT);
|
||||
//>488μs delay is required after writing to 0x00 register, otherwise program engine will not work
|
||||
furi_delay_us(500);
|
||||
}
|
||||
|
||||
void lp5562_set_channel_current(FuriHalI2cBusHandle* handle, LP5562Channel channel, uint8_t value) {
|
||||
void lp5562_set_channel_current(
|
||||
const FuriHalI2cBusHandle* handle,
|
||||
LP5562Channel channel,
|
||||
uint8_t value) {
|
||||
uint8_t reg_no;
|
||||
if(channel == LP5562ChannelRed) {
|
||||
reg_no = LP5562_CHANNEL_RED_CURRENT_REGISTER;
|
||||
@@ -44,7 +47,10 @@ void lp5562_set_channel_current(FuriHalI2cBusHandle* handle, LP5562Channel chann
|
||||
furi_hal_i2c_write_reg_8(handle, LP5562_ADDRESS, reg_no, value, LP5562_I2C_TIMEOUT);
|
||||
}
|
||||
|
||||
void lp5562_set_channel_value(FuriHalI2cBusHandle* handle, LP5562Channel channel, uint8_t value) {
|
||||
void lp5562_set_channel_value(
|
||||
const FuriHalI2cBusHandle* handle,
|
||||
LP5562Channel channel,
|
||||
uint8_t value) {
|
||||
uint8_t reg_no;
|
||||
if(channel == LP5562ChannelRed) {
|
||||
reg_no = LP5562_CHANNEL_RED_VALUE_REGISTER;
|
||||
@@ -60,7 +66,7 @@ void lp5562_set_channel_value(FuriHalI2cBusHandle* handle, LP5562Channel channel
|
||||
furi_hal_i2c_write_reg_8(handle, LP5562_ADDRESS, reg_no, value, LP5562_I2C_TIMEOUT);
|
||||
}
|
||||
|
||||
uint8_t lp5562_get_channel_value(FuriHalI2cBusHandle* handle, LP5562Channel channel) {
|
||||
uint8_t lp5562_get_channel_value(const FuriHalI2cBusHandle* handle, LP5562Channel channel) {
|
||||
uint8_t reg_no;
|
||||
uint8_t value;
|
||||
if(channel == LP5562ChannelRed) {
|
||||
@@ -78,7 +84,10 @@ uint8_t lp5562_get_channel_value(FuriHalI2cBusHandle* handle, LP5562Channel chan
|
||||
return value;
|
||||
}
|
||||
|
||||
void lp5562_set_channel_src(FuriHalI2cBusHandle* handle, LP5562Channel channel, LP5562Engine src) {
|
||||
void lp5562_set_channel_src(
|
||||
const FuriHalI2cBusHandle* handle,
|
||||
LP5562Channel channel,
|
||||
LP5562Engine src) {
|
||||
uint8_t reg_val = 0;
|
||||
uint8_t bit_offset = 0;
|
||||
|
||||
@@ -107,7 +116,7 @@ void lp5562_set_channel_src(FuriHalI2cBusHandle* handle, LP5562Channel channel,
|
||||
}
|
||||
|
||||
void lp5562_execute_program(
|
||||
FuriHalI2cBusHandle* handle,
|
||||
const FuriHalI2cBusHandle* handle,
|
||||
LP5562Engine eng,
|
||||
LP5562Channel ch,
|
||||
uint16_t* program) {
|
||||
@@ -155,7 +164,7 @@ void lp5562_execute_program(
|
||||
furi_hal_i2c_write_reg_8(handle, LP5562_ADDRESS, 0x00, enable_reg, LP5562_I2C_TIMEOUT);
|
||||
}
|
||||
|
||||
void lp5562_stop_program(FuriHalI2cBusHandle* handle, LP5562Engine eng) {
|
||||
void lp5562_stop_program(const FuriHalI2cBusHandle* handle, LP5562Engine eng) {
|
||||
if((eng < LP5562Engine1) || (eng > LP5562Engine3)) return;
|
||||
uint8_t reg_val = 0;
|
||||
uint8_t bit_offset = 0;
|
||||
@@ -169,7 +178,7 @@ void lp5562_stop_program(FuriHalI2cBusHandle* handle, LP5562Engine eng) {
|
||||
}
|
||||
|
||||
void lp5562_execute_ramp(
|
||||
FuriHalI2cBusHandle* handle,
|
||||
const FuriHalI2cBusHandle* handle,
|
||||
LP5562Engine eng,
|
||||
LP5562Channel ch,
|
||||
uint8_t val_start,
|
||||
@@ -213,7 +222,7 @@ void lp5562_execute_ramp(
|
||||
}
|
||||
|
||||
void lp5562_execute_blink(
|
||||
FuriHalI2cBusHandle* handle,
|
||||
const FuriHalI2cBusHandle* handle,
|
||||
LP5562Engine eng,
|
||||
LP5562Channel ch,
|
||||
uint16_t on_time,
|
||||
|
||||
@@ -20,39 +20,48 @@ typedef enum {
|
||||
} LP5562Engine;
|
||||
|
||||
/** Initialize Driver */
|
||||
void lp5562_reset(FuriHalI2cBusHandle* handle);
|
||||
void lp5562_reset(const FuriHalI2cBusHandle* handle);
|
||||
|
||||
/** Configure Driver */
|
||||
void lp5562_configure(FuriHalI2cBusHandle* handle);
|
||||
void lp5562_configure(const FuriHalI2cBusHandle* handle);
|
||||
|
||||
/** Enable Driver */
|
||||
void lp5562_enable(FuriHalI2cBusHandle* handle);
|
||||
void lp5562_enable(const FuriHalI2cBusHandle* handle);
|
||||
|
||||
/** Set channel current */
|
||||
void lp5562_set_channel_current(FuriHalI2cBusHandle* handle, LP5562Channel channel, uint8_t value);
|
||||
void lp5562_set_channel_current(
|
||||
const FuriHalI2cBusHandle* handle,
|
||||
LP5562Channel channel,
|
||||
uint8_t value);
|
||||
|
||||
/** Set channel PWM value */
|
||||
void lp5562_set_channel_value(FuriHalI2cBusHandle* handle, LP5562Channel channel, uint8_t value);
|
||||
void lp5562_set_channel_value(
|
||||
const FuriHalI2cBusHandle* handle,
|
||||
LP5562Channel channel,
|
||||
uint8_t value);
|
||||
|
||||
/** Get channel PWM value */
|
||||
uint8_t lp5562_get_channel_value(FuriHalI2cBusHandle* handle, LP5562Channel channel);
|
||||
uint8_t lp5562_get_channel_value(const FuriHalI2cBusHandle* handle, LP5562Channel channel);
|
||||
|
||||
/** Set channel source */
|
||||
void lp5562_set_channel_src(FuriHalI2cBusHandle* handle, LP5562Channel channel, LP5562Engine src);
|
||||
void lp5562_set_channel_src(
|
||||
const FuriHalI2cBusHandle* handle,
|
||||
LP5562Channel channel,
|
||||
LP5562Engine src);
|
||||
|
||||
/** Execute program sequence */
|
||||
void lp5562_execute_program(
|
||||
FuriHalI2cBusHandle* handle,
|
||||
const FuriHalI2cBusHandle* handle,
|
||||
LP5562Engine eng,
|
||||
LP5562Channel ch,
|
||||
uint16_t* program);
|
||||
|
||||
/** Stop program sequence */
|
||||
void lp5562_stop_program(FuriHalI2cBusHandle* handle, LP5562Engine eng);
|
||||
void lp5562_stop_program(const FuriHalI2cBusHandle* handle, LP5562Engine eng);
|
||||
|
||||
/** Execute ramp program sequence */
|
||||
void lp5562_execute_ramp(
|
||||
FuriHalI2cBusHandle* handle,
|
||||
const FuriHalI2cBusHandle* handle,
|
||||
LP5562Engine eng,
|
||||
LP5562Channel ch,
|
||||
uint8_t val_start,
|
||||
@@ -61,7 +70,7 @@ void lp5562_execute_ramp(
|
||||
|
||||
/** Start blink program sequence */
|
||||
void lp5562_execute_blink(
|
||||
FuriHalI2cBusHandle* handle,
|
||||
const FuriHalI2cBusHandle* handle,
|
||||
LP5562Engine eng,
|
||||
LP5562Channel ch,
|
||||
uint16_t on_time,
|
||||
|
||||
@@ -2,7 +2,7 @@
|
||||
|
||||
#include <furi.h>
|
||||
|
||||
void st25r3916_mask_irq(FuriHalSpiBusHandle* handle, uint32_t mask) {
|
||||
void st25r3916_mask_irq(const FuriHalSpiBusHandle* handle, uint32_t mask) {
|
||||
furi_assert(handle);
|
||||
|
||||
uint8_t irq_mask_regs[4] = {
|
||||
@@ -14,7 +14,7 @@ void st25r3916_mask_irq(FuriHalSpiBusHandle* handle, uint32_t mask) {
|
||||
st25r3916_write_burst_regs(handle, ST25R3916_REG_IRQ_MASK_MAIN, irq_mask_regs, 4);
|
||||
}
|
||||
|
||||
uint32_t st25r3916_get_irq(FuriHalSpiBusHandle* handle) {
|
||||
uint32_t st25r3916_get_irq(const FuriHalSpiBusHandle* handle) {
|
||||
furi_assert(handle);
|
||||
|
||||
uint8_t irq_regs[4] = {};
|
||||
@@ -32,7 +32,7 @@ uint32_t st25r3916_get_irq(FuriHalSpiBusHandle* handle) {
|
||||
return irq;
|
||||
}
|
||||
|
||||
void st25r3916_write_fifo(FuriHalSpiBusHandle* handle, const uint8_t* buff, size_t bits) {
|
||||
void st25r3916_write_fifo(const FuriHalSpiBusHandle* handle, const uint8_t* buff, size_t bits) {
|
||||
furi_assert(handle);
|
||||
furi_assert(buff);
|
||||
|
||||
@@ -45,7 +45,7 @@ void st25r3916_write_fifo(FuriHalSpiBusHandle* handle, const uint8_t* buff, size
|
||||
}
|
||||
|
||||
bool st25r3916_read_fifo(
|
||||
FuriHalSpiBusHandle* handle,
|
||||
const FuriHalSpiBusHandle* handle,
|
||||
uint8_t* buff,
|
||||
size_t buff_size,
|
||||
size_t* buff_bits) {
|
||||
|
||||
@@ -75,7 +75,7 @@ extern "C" {
|
||||
* @param handle - pointer to FuriHalSpiBusHandle instance
|
||||
* @param mask - mask of interrupts to be disabled
|
||||
*/
|
||||
void st25r3916_mask_irq(FuriHalSpiBusHandle* handle, uint32_t mask);
|
||||
void st25r3916_mask_irq(const FuriHalSpiBusHandle* handle, uint32_t mask);
|
||||
|
||||
/** Get st25r3916 interrupts
|
||||
*
|
||||
@@ -83,7 +83,7 @@ void st25r3916_mask_irq(FuriHalSpiBusHandle* handle, uint32_t mask);
|
||||
*
|
||||
* @return received interrupts
|
||||
*/
|
||||
uint32_t st25r3916_get_irq(FuriHalSpiBusHandle* handle);
|
||||
uint32_t st25r3916_get_irq(const FuriHalSpiBusHandle* handle);
|
||||
|
||||
/** Write FIFO
|
||||
*
|
||||
@@ -91,7 +91,7 @@ uint32_t st25r3916_get_irq(FuriHalSpiBusHandle* handle);
|
||||
* @param buff - buffer to write to FIFO
|
||||
* @param bits - number of bits to write
|
||||
*/
|
||||
void st25r3916_write_fifo(FuriHalSpiBusHandle* handle, const uint8_t* buff, size_t bits);
|
||||
void st25r3916_write_fifo(const FuriHalSpiBusHandle* handle, const uint8_t* buff, size_t bits);
|
||||
|
||||
/** Read FIFO
|
||||
*
|
||||
@@ -103,7 +103,7 @@ void st25r3916_write_fifo(FuriHalSpiBusHandle* handle, const uint8_t* buff, size
|
||||
* @return true if read success, false otherwise
|
||||
*/
|
||||
bool st25r3916_read_fifo(
|
||||
FuriHalSpiBusHandle* handle,
|
||||
const FuriHalSpiBusHandle* handle,
|
||||
uint8_t* buff,
|
||||
size_t buff_size,
|
||||
size_t* buff_bits);
|
||||
|
||||
@@ -28,18 +28,18 @@
|
||||
(ST25R3916_CMD_LEN + \
|
||||
ST25R3916_FIFO_DEPTH) /*!< ST25R3916 communication buffer: CMD + FIFO length */
|
||||
|
||||
static void st25r3916_reg_tx_byte(FuriHalSpiBusHandle* handle, uint8_t byte) {
|
||||
static void st25r3916_reg_tx_byte(const FuriHalSpiBusHandle* handle, uint8_t byte) {
|
||||
uint8_t val = byte;
|
||||
furi_hal_spi_bus_tx(handle, &val, 1, 5);
|
||||
}
|
||||
|
||||
void st25r3916_read_reg(FuriHalSpiBusHandle* handle, uint8_t reg, uint8_t* val) {
|
||||
void st25r3916_read_reg(const FuriHalSpiBusHandle* handle, uint8_t reg, uint8_t* val) {
|
||||
furi_check(handle);
|
||||
st25r3916_read_burst_regs(handle, reg, val, 1);
|
||||
}
|
||||
|
||||
void st25r3916_read_burst_regs(
|
||||
FuriHalSpiBusHandle* handle,
|
||||
const FuriHalSpiBusHandle* handle,
|
||||
uint8_t reg_start,
|
||||
uint8_t* values,
|
||||
uint8_t length) {
|
||||
@@ -59,14 +59,14 @@ void st25r3916_read_burst_regs(
|
||||
furi_hal_gpio_write(handle->cs, true);
|
||||
}
|
||||
|
||||
void st25r3916_write_reg(FuriHalSpiBusHandle* handle, uint8_t reg, uint8_t val) {
|
||||
void st25r3916_write_reg(const FuriHalSpiBusHandle* handle, uint8_t reg, uint8_t val) {
|
||||
furi_check(handle);
|
||||
uint8_t reg_val = val;
|
||||
st25r3916_write_burst_regs(handle, reg, ®_val, 1);
|
||||
}
|
||||
|
||||
void st25r3916_write_burst_regs(
|
||||
FuriHalSpiBusHandle* handle,
|
||||
const FuriHalSpiBusHandle* handle,
|
||||
uint8_t reg_start,
|
||||
const uint8_t* values,
|
||||
uint8_t length) {
|
||||
@@ -86,7 +86,10 @@ void st25r3916_write_burst_regs(
|
||||
furi_hal_gpio_write(handle->cs, true);
|
||||
}
|
||||
|
||||
void st25r3916_reg_write_fifo(FuriHalSpiBusHandle* handle, const uint8_t* buff, size_t length) {
|
||||
void st25r3916_reg_write_fifo(
|
||||
const FuriHalSpiBusHandle* handle,
|
||||
const uint8_t* buff,
|
||||
size_t length) {
|
||||
furi_check(handle);
|
||||
furi_check(buff);
|
||||
furi_check(length);
|
||||
@@ -98,7 +101,7 @@ void st25r3916_reg_write_fifo(FuriHalSpiBusHandle* handle, const uint8_t* buff,
|
||||
furi_hal_gpio_write(handle->cs, true);
|
||||
}
|
||||
|
||||
void st25r3916_reg_read_fifo(FuriHalSpiBusHandle* handle, uint8_t* buff, size_t length) {
|
||||
void st25r3916_reg_read_fifo(const FuriHalSpiBusHandle* handle, uint8_t* buff, size_t length) {
|
||||
furi_check(handle);
|
||||
furi_check(buff);
|
||||
furi_check(length);
|
||||
@@ -110,7 +113,10 @@ void st25r3916_reg_read_fifo(FuriHalSpiBusHandle* handle, uint8_t* buff, size_t
|
||||
furi_hal_gpio_write(handle->cs, true);
|
||||
}
|
||||
|
||||
void st25r3916_write_pta_mem(FuriHalSpiBusHandle* handle, const uint8_t* values, size_t length) {
|
||||
void st25r3916_write_pta_mem(
|
||||
const FuriHalSpiBusHandle* handle,
|
||||
const uint8_t* values,
|
||||
size_t length) {
|
||||
furi_check(handle);
|
||||
furi_check(values);
|
||||
furi_check(length);
|
||||
@@ -122,7 +128,7 @@ void st25r3916_write_pta_mem(FuriHalSpiBusHandle* handle, const uint8_t* values,
|
||||
furi_hal_gpio_write(handle->cs, true);
|
||||
}
|
||||
|
||||
void st25r3916_read_pta_mem(FuriHalSpiBusHandle* handle, uint8_t* buff, size_t length) {
|
||||
void st25r3916_read_pta_mem(const FuriHalSpiBusHandle* handle, uint8_t* buff, size_t length) {
|
||||
furi_check(handle);
|
||||
furi_check(buff);
|
||||
furi_check(length);
|
||||
@@ -136,7 +142,10 @@ void st25r3916_read_pta_mem(FuriHalSpiBusHandle* handle, uint8_t* buff, size_t l
|
||||
memcpy(buff, tmp_buff + 1, length);
|
||||
}
|
||||
|
||||
void st25r3916_write_ptf_mem(FuriHalSpiBusHandle* handle, const uint8_t* values, size_t length) {
|
||||
void st25r3916_write_ptf_mem(
|
||||
const FuriHalSpiBusHandle* handle,
|
||||
const uint8_t* values,
|
||||
size_t length) {
|
||||
furi_check(handle);
|
||||
furi_check(values);
|
||||
|
||||
@@ -146,7 +155,7 @@ void st25r3916_write_ptf_mem(FuriHalSpiBusHandle* handle, const uint8_t* values,
|
||||
furi_hal_gpio_write(handle->cs, true);
|
||||
}
|
||||
|
||||
void st25r3916_write_pttsn_mem(FuriHalSpiBusHandle* handle, uint8_t* buff, size_t length) {
|
||||
void st25r3916_write_pttsn_mem(const FuriHalSpiBusHandle* handle, uint8_t* buff, size_t length) {
|
||||
furi_check(handle);
|
||||
furi_check(buff);
|
||||
|
||||
@@ -156,7 +165,7 @@ void st25r3916_write_pttsn_mem(FuriHalSpiBusHandle* handle, uint8_t* buff, size_
|
||||
furi_hal_gpio_write(handle->cs, true);
|
||||
}
|
||||
|
||||
void st25r3916_direct_cmd(FuriHalSpiBusHandle* handle, uint8_t cmd) {
|
||||
void st25r3916_direct_cmd(const FuriHalSpiBusHandle* handle, uint8_t cmd) {
|
||||
furi_check(handle);
|
||||
|
||||
furi_hal_gpio_write(handle->cs, false);
|
||||
@@ -164,7 +173,7 @@ void st25r3916_direct_cmd(FuriHalSpiBusHandle* handle, uint8_t cmd) {
|
||||
furi_hal_gpio_write(handle->cs, true);
|
||||
}
|
||||
|
||||
void st25r3916_read_test_reg(FuriHalSpiBusHandle* handle, uint8_t reg, uint8_t* val) {
|
||||
void st25r3916_read_test_reg(const FuriHalSpiBusHandle* handle, uint8_t reg, uint8_t* val) {
|
||||
furi_check(handle);
|
||||
|
||||
furi_hal_gpio_write(handle->cs, false);
|
||||
@@ -174,7 +183,7 @@ void st25r3916_read_test_reg(FuriHalSpiBusHandle* handle, uint8_t reg, uint8_t*
|
||||
furi_hal_gpio_write(handle->cs, true);
|
||||
}
|
||||
|
||||
void st25r3916_write_test_reg(FuriHalSpiBusHandle* handle, uint8_t reg, uint8_t val) {
|
||||
void st25r3916_write_test_reg(const FuriHalSpiBusHandle* handle, uint8_t reg, uint8_t val) {
|
||||
furi_check(handle);
|
||||
|
||||
furi_hal_gpio_write(handle->cs, false);
|
||||
@@ -184,7 +193,7 @@ void st25r3916_write_test_reg(FuriHalSpiBusHandle* handle, uint8_t reg, uint8_t
|
||||
furi_hal_gpio_write(handle->cs, true);
|
||||
}
|
||||
|
||||
void st25r3916_clear_reg_bits(FuriHalSpiBusHandle* handle, uint8_t reg, uint8_t clr_mask) {
|
||||
void st25r3916_clear_reg_bits(const FuriHalSpiBusHandle* handle, uint8_t reg, uint8_t clr_mask) {
|
||||
furi_check(handle);
|
||||
|
||||
uint8_t reg_val = 0;
|
||||
@@ -195,7 +204,7 @@ void st25r3916_clear_reg_bits(FuriHalSpiBusHandle* handle, uint8_t reg, uint8_t
|
||||
}
|
||||
}
|
||||
|
||||
void st25r3916_set_reg_bits(FuriHalSpiBusHandle* handle, uint8_t reg, uint8_t set_mask) {
|
||||
void st25r3916_set_reg_bits(const FuriHalSpiBusHandle* handle, uint8_t reg, uint8_t set_mask) {
|
||||
furi_check(handle);
|
||||
|
||||
uint8_t reg_val = 0;
|
||||
@@ -207,7 +216,7 @@ void st25r3916_set_reg_bits(FuriHalSpiBusHandle* handle, uint8_t reg, uint8_t se
|
||||
}
|
||||
|
||||
void st25r3916_change_reg_bits(
|
||||
FuriHalSpiBusHandle* handle,
|
||||
const FuriHalSpiBusHandle* handle,
|
||||
uint8_t reg,
|
||||
uint8_t mask,
|
||||
uint8_t value) {
|
||||
@@ -217,7 +226,7 @@ void st25r3916_change_reg_bits(
|
||||
}
|
||||
|
||||
void st25r3916_modify_reg(
|
||||
FuriHalSpiBusHandle* handle,
|
||||
const FuriHalSpiBusHandle* handle,
|
||||
uint8_t reg,
|
||||
uint8_t clr_mask,
|
||||
uint8_t set_mask) {
|
||||
@@ -233,7 +242,7 @@ void st25r3916_modify_reg(
|
||||
}
|
||||
|
||||
void st25r3916_change_test_reg_bits(
|
||||
FuriHalSpiBusHandle* handle,
|
||||
const FuriHalSpiBusHandle* handle,
|
||||
uint8_t reg,
|
||||
uint8_t mask,
|
||||
uint8_t value) {
|
||||
@@ -248,7 +257,7 @@ void st25r3916_change_test_reg_bits(
|
||||
}
|
||||
}
|
||||
|
||||
bool st25r3916_check_reg(FuriHalSpiBusHandle* handle, uint8_t reg, uint8_t mask, uint8_t val) {
|
||||
bool st25r3916_check_reg(const FuriHalSpiBusHandle* handle, uint8_t reg, uint8_t mask, uint8_t val) {
|
||||
furi_check(handle);
|
||||
|
||||
uint8_t reg_val = 0;
|
||||
|
||||
@@ -967,7 +967,7 @@ extern "C" {
|
||||
* @param reg - register address
|
||||
* @param val - pointer to the variable to store the read value
|
||||
*/
|
||||
void st25r3916_read_reg(FuriHalSpiBusHandle* handle, uint8_t reg, uint8_t* val);
|
||||
void st25r3916_read_reg(const FuriHalSpiBusHandle* handle, uint8_t reg, uint8_t* val);
|
||||
|
||||
/** Read multiple registers
|
||||
*
|
||||
@@ -977,7 +977,7 @@ void st25r3916_read_reg(FuriHalSpiBusHandle* handle, uint8_t reg, uint8_t* val);
|
||||
* @param length - number of registers to read
|
||||
*/
|
||||
void st25r3916_read_burst_regs(
|
||||
FuriHalSpiBusHandle* handle,
|
||||
const FuriHalSpiBusHandle* handle,
|
||||
uint8_t reg_start,
|
||||
uint8_t* values,
|
||||
uint8_t length);
|
||||
@@ -988,7 +988,7 @@ void st25r3916_read_burst_regs(
|
||||
* @param reg - register address
|
||||
* @param val - value to write
|
||||
*/
|
||||
void st25r3916_write_reg(FuriHalSpiBusHandle* handle, uint8_t reg, uint8_t val);
|
||||
void st25r3916_write_reg(const FuriHalSpiBusHandle* handle, uint8_t reg, uint8_t val);
|
||||
|
||||
/** Write multiple registers
|
||||
*
|
||||
@@ -998,7 +998,7 @@ void st25r3916_write_reg(FuriHalSpiBusHandle* handle, uint8_t reg, uint8_t val);
|
||||
* @param length - number of registers to write
|
||||
*/
|
||||
void st25r3916_write_burst_regs(
|
||||
FuriHalSpiBusHandle* handle,
|
||||
const FuriHalSpiBusHandle* handle,
|
||||
uint8_t reg_start,
|
||||
const uint8_t* values,
|
||||
uint8_t length);
|
||||
@@ -1009,7 +1009,10 @@ void st25r3916_write_burst_regs(
|
||||
* @param buff - buffer to write to FIFO
|
||||
* @param length - number of bytes to write
|
||||
*/
|
||||
void st25r3916_reg_write_fifo(FuriHalSpiBusHandle* handle, const uint8_t* buff, size_t length);
|
||||
void st25r3916_reg_write_fifo(
|
||||
const FuriHalSpiBusHandle* handle,
|
||||
const uint8_t* buff,
|
||||
size_t length);
|
||||
|
||||
/** Read fifo register
|
||||
*
|
||||
@@ -1017,7 +1020,7 @@ void st25r3916_reg_write_fifo(FuriHalSpiBusHandle* handle, const uint8_t* buff,
|
||||
* @param buff - buffer to store the read values
|
||||
* @param length - number of bytes to read
|
||||
*/
|
||||
void st25r3916_reg_read_fifo(FuriHalSpiBusHandle* handle, uint8_t* buff, size_t length);
|
||||
void st25r3916_reg_read_fifo(const FuriHalSpiBusHandle* handle, uint8_t* buff, size_t length);
|
||||
|
||||
/** Write PTA memory register
|
||||
*
|
||||
@@ -1025,7 +1028,10 @@ void st25r3916_reg_read_fifo(FuriHalSpiBusHandle* handle, uint8_t* buff, size_t
|
||||
* @param values - pointer to buffer to write
|
||||
* @param length - number of bytes to write
|
||||
*/
|
||||
void st25r3916_write_pta_mem(FuriHalSpiBusHandle* handle, const uint8_t* values, size_t length);
|
||||
void st25r3916_write_pta_mem(
|
||||
const FuriHalSpiBusHandle* handle,
|
||||
const uint8_t* values,
|
||||
size_t length);
|
||||
|
||||
/** Read PTA memory register
|
||||
*
|
||||
@@ -1033,7 +1039,7 @@ void st25r3916_write_pta_mem(FuriHalSpiBusHandle* handle, const uint8_t* values,
|
||||
* @param values - buffer to store the read values
|
||||
* @param length - number of bytes to read
|
||||
*/
|
||||
void st25r3916_read_pta_mem(FuriHalSpiBusHandle* handle, uint8_t* values, size_t length);
|
||||
void st25r3916_read_pta_mem(const FuriHalSpiBusHandle* handle, uint8_t* values, size_t length);
|
||||
|
||||
/** Write PTF memory register
|
||||
*
|
||||
@@ -1041,7 +1047,10 @@ void st25r3916_read_pta_mem(FuriHalSpiBusHandle* handle, uint8_t* values, size_t
|
||||
* @param values - pointer to buffer to write
|
||||
* @param length - number of bytes to write
|
||||
*/
|
||||
void st25r3916_write_ptf_mem(FuriHalSpiBusHandle* handle, const uint8_t* values, size_t length);
|
||||
void st25r3916_write_ptf_mem(
|
||||
const FuriHalSpiBusHandle* handle,
|
||||
const uint8_t* values,
|
||||
size_t length);
|
||||
|
||||
/** Read PTTSN memory register
|
||||
*
|
||||
@@ -1049,21 +1058,21 @@ void st25r3916_write_ptf_mem(FuriHalSpiBusHandle* handle, const uint8_t* values,
|
||||
* @param values - pointer to buffer to write
|
||||
* @param length - number of bytes to write
|
||||
*/
|
||||
void st25r3916_write_pttsn_mem(FuriHalSpiBusHandle* handle, uint8_t* values, size_t length);
|
||||
void st25r3916_write_pttsn_mem(const FuriHalSpiBusHandle* handle, uint8_t* values, size_t length);
|
||||
|
||||
/** Send Direct command
|
||||
*
|
||||
* @param handle - pointer to FuriHalSpiBusHandle instance
|
||||
* @param cmd - direct command
|
||||
*/
|
||||
void st25r3916_direct_cmd(FuriHalSpiBusHandle* handle, uint8_t cmd);
|
||||
void st25r3916_direct_cmd(const FuriHalSpiBusHandle* handle, uint8_t cmd);
|
||||
|
||||
/** Read test register
|
||||
* @param handle - pointer to FuriHalSpiBusHandle instance
|
||||
* @param reg - register address
|
||||
* @param val - pointer to the variable to store the read value
|
||||
*/
|
||||
void st25r3916_read_test_reg(FuriHalSpiBusHandle* handle, uint8_t reg, uint8_t* val);
|
||||
void st25r3916_read_test_reg(const FuriHalSpiBusHandle* handle, uint8_t reg, uint8_t* val);
|
||||
|
||||
/** Write test register
|
||||
*
|
||||
@@ -1071,7 +1080,7 @@ void st25r3916_read_test_reg(FuriHalSpiBusHandle* handle, uint8_t reg, uint8_t*
|
||||
* @param reg - register address
|
||||
* @param val - value to write
|
||||
*/
|
||||
void st25r3916_write_test_reg(FuriHalSpiBusHandle* handle, uint8_t reg, uint8_t val);
|
||||
void st25r3916_write_test_reg(const FuriHalSpiBusHandle* handle, uint8_t reg, uint8_t val);
|
||||
|
||||
/** Clear register bits
|
||||
*
|
||||
@@ -1079,7 +1088,7 @@ void st25r3916_write_test_reg(FuriHalSpiBusHandle* handle, uint8_t reg, uint8_t
|
||||
* @param reg - register address
|
||||
* @param clr_mask - bit mask to clear
|
||||
*/
|
||||
void st25r3916_clear_reg_bits(FuriHalSpiBusHandle* handle, uint8_t reg, uint8_t clr_mask);
|
||||
void st25r3916_clear_reg_bits(const FuriHalSpiBusHandle* handle, uint8_t reg, uint8_t clr_mask);
|
||||
|
||||
/** Set register bits
|
||||
*
|
||||
@@ -1087,7 +1096,7 @@ void st25r3916_clear_reg_bits(FuriHalSpiBusHandle* handle, uint8_t reg, uint8_t
|
||||
* @param reg - register address
|
||||
* @param set_mask - bit mask to set
|
||||
*/
|
||||
void st25r3916_set_reg_bits(FuriHalSpiBusHandle* handle, uint8_t reg, uint8_t set_mask);
|
||||
void st25r3916_set_reg_bits(const FuriHalSpiBusHandle* handle, uint8_t reg, uint8_t set_mask);
|
||||
|
||||
/** Change register bits
|
||||
*
|
||||
@@ -1097,7 +1106,7 @@ void st25r3916_set_reg_bits(FuriHalSpiBusHandle* handle, uint8_t reg, uint8_t se
|
||||
* @param value - new register value to write
|
||||
*/
|
||||
void st25r3916_change_reg_bits(
|
||||
FuriHalSpiBusHandle* handle,
|
||||
const FuriHalSpiBusHandle* handle,
|
||||
uint8_t reg,
|
||||
uint8_t mask,
|
||||
uint8_t value);
|
||||
@@ -1110,7 +1119,7 @@ void st25r3916_change_reg_bits(
|
||||
* @param set_mask - bit mask to set
|
||||
*/
|
||||
void st25r3916_modify_reg(
|
||||
FuriHalSpiBusHandle* handle,
|
||||
const FuriHalSpiBusHandle* handle,
|
||||
uint8_t reg,
|
||||
uint8_t clr_mask,
|
||||
uint8_t set_mask);
|
||||
@@ -1123,7 +1132,7 @@ void st25r3916_modify_reg(
|
||||
* @param value - new register value to write
|
||||
*/
|
||||
void st25r3916_change_test_reg_bits(
|
||||
FuriHalSpiBusHandle* handle,
|
||||
const FuriHalSpiBusHandle* handle,
|
||||
uint8_t reg,
|
||||
uint8_t mask,
|
||||
uint8_t value);
|
||||
@@ -1137,7 +1146,7 @@ void st25r3916_change_test_reg_bits(
|
||||
*
|
||||
* @return true if register value matches the expected value, false otherwise
|
||||
*/
|
||||
bool st25r3916_check_reg(FuriHalSpiBusHandle* handle, uint8_t reg, uint8_t mask, uint8_t val);
|
||||
bool st25r3916_check_reg(const FuriHalSpiBusHandle* handle, uint8_t reg, uint8_t mask, uint8_t val);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
|
||||
Reference in New Issue
Block a user