From 5564fe1f314f5f0cdf7069b579b6033bae5c1407 Mon Sep 17 00:00:00 2001
From: MX <10697207+xMasterX@users.noreply.github.com>
Date: Mon, 26 Jan 2026 12:46:30 +0300
Subject: [PATCH] fmt

---
 applications/drivers/subghz/cc1101_ext/cc1101_ext.c |  6 +++---
 lib/subghz/protocols/legrand.c                      |  2 +-
 targets/f7/furi_hal/furi_hal_subghz.c               | 12 ++++++++----
 3 files changed, 12 insertions(+), 8 deletions(-)

diff --git a/applications/drivers/subghz/cc1101_ext/cc1101_ext.c b/applications/drivers/subghz/cc1101_ext/cc1101_ext.c
index adcf785f2..e24ed8f7a 100644
--- a/applications/drivers/subghz/cc1101_ext/cc1101_ext.c
+++ b/applications/drivers/subghz/cc1101_ext/cc1101_ext.c
@@ -807,7 +807,7 @@ bool subghz_device_cc1101_ext_start_async_tx(SubGhzDeviceCC1101ExtCallback callb
     // Configure DMA to update timer TIM17 ARR by durations from buffer
     LL_DMA_SetMemoryAddress(
         SUBGHZ_DEVICE_CC1101_EXT_DMA_CH3_DEF, (uint32_t)subghz_device_cc1101_ext->async_tx.buffer);
-    LL_DMA_SetPeriphAddress(SUBGHZ_DEVICE_CC1101_EXT_DMA_CH3_DEF, (uint32_t)&(TIM17->ARR));
+    LL_DMA_SetPeriphAddress(SUBGHZ_DEVICE_CC1101_EXT_DMA_CH3_DEF, (uint32_t) & (TIM17->ARR));
     LL_DMA_ConfigTransfer(
         SUBGHZ_DEVICE_CC1101_EXT_DMA_CH3_DEF,
         LL_DMA_DIRECTION_MEMORY_TO_PERIPH | LL_DMA_MODE_CIRCULAR | LL_DMA_PERIPH_NOINCREMENT |
@@ -849,7 +849,7 @@ bool subghz_device_cc1101_ext_start_async_tx(SubGhzDeviceCC1101ExtCallback callb
     LL_DMA_SetMemoryAddress(
         SUBGHZ_DEVICE_CC1101_EXT_DMA_CH4_DEF,
         (uint32_t)subghz_device_cc1101_ext->async_tx.gpio_tx_buff);
-    LL_DMA_SetPeriphAddress(SUBGHZ_DEVICE_CC1101_EXT_DMA_CH4_DEF, (uint32_t)&(gpio->port->BSRR));
+    LL_DMA_SetPeriphAddress(SUBGHZ_DEVICE_CC1101_EXT_DMA_CH4_DEF, (uint32_t) & (gpio->port->BSRR));
     LL_DMA_ConfigTransfer(
         SUBGHZ_DEVICE_CC1101_EXT_DMA_CH4_DEF,
         LL_DMA_DIRECTION_MEMORY_TO_PERIPH | LL_DMA_MODE_CIRCULAR | LL_DMA_PERIPH_NOINCREMENT |
@@ -869,7 +869,7 @@ bool subghz_device_cc1101_ext_start_async_tx(SubGhzDeviceCC1101ExtCallback callb
             SUBGHZ_DEVICE_CC1101_EXT_DMA_CH5_DEF,
             (uint32_t)subghz_device_cc1101_ext->async_tx.debug_gpio_buff);
         LL_DMA_SetPeriphAddress(
-            SUBGHZ_DEVICE_CC1101_EXT_DMA_CH5_DEF, (uint32_t)&(gpio->port->BSRR));
+            SUBGHZ_DEVICE_CC1101_EXT_DMA_CH5_DEF, (uint32_t) & (gpio->port->BSRR));
         LL_DMA_ConfigTransfer(
             SUBGHZ_DEVICE_CC1101_EXT_DMA_CH5_DEF,
             LL_DMA_DIRECTION_MEMORY_TO_PERIPH | LL_DMA_MODE_CIRCULAR | LL_DMA_PERIPH_NOINCREMENT |
diff --git a/lib/subghz/protocols/legrand.c b/lib/subghz/protocols/legrand.c
index 45a46847c..7b8b70204 100644
--- a/lib/subghz/protocols/legrand.c
+++ b/lib/subghz/protocols/legrand.c
@@ -155,7 +155,7 @@ SubGhzProtocolStatus
             ret = SubGhzProtocolStatusErrorParserTe;
             break;
         }
-        
+
         // optional parameter
         flipper_format_read_uint32(
             flipper_format, "Repeat", (uint32_t*)&instance->encoder.repeat, 1);
diff --git a/targets/f7/furi_hal/furi_hal_subghz.c b/targets/f7/furi_hal/furi_hal_subghz.c
index 0f8fa939c..b9723487e 100644
--- a/targets/f7/furi_hal/furi_hal_subghz.c
+++ b/targets/f7/furi_hal/furi_hal_subghz.c
@@ -684,7 +684,7 @@ static void furi_hal_subghz_async_tx_refill(uint32_t* buffer, size_t samples) {
     while(samples > 0) {
         volatile uint32_t duration = furi_hal_subghz_async_tx_middleware_get_duration(
             &furi_hal_subghz_async_tx.middleware, furi_hal_subghz_async_tx.callback);
-        // if duration == 0 then we stop DMA interrupt(that used to refill buffer) and write to buffer 0 as last element. 
+        // if duration == 0 then we stop DMA interrupt(that used to refill buffer) and write to buffer 0 as last element.
         // later DMA write this 0 to ARR and timer TIM2 will be stopped.
         if(duration == 0) {
             *buffer = 0;
@@ -771,7 +771,7 @@ bool furi_hal_subghz_start_async_tx(FuriHalSubGhzAsyncTxCallback callback, void*
 
     // Configure DMA to update TIM2->ARR
     LL_DMA_InitTypeDef dma_config = {0}; // DMA settings structure
-    dma_config.PeriphOrM2MSrcAddress = (uint32_t)&(TIM2->ARR); // DMA destination TIM2->ARR
+    dma_config.PeriphOrM2MSrcAddress = (uint32_t) & (TIM2->ARR); // DMA destination TIM2->ARR
     dma_config.MemoryOrM2MDstAddress =
         (uint32_t)furi_hal_subghz_async_tx.buffer; // DMA buffer with signals durations
     dma_config.Direction =
@@ -838,7 +838,7 @@ bool furi_hal_subghz_start_async_tx(FuriHalSubGhzAsyncTxCallback callback, void*
         furi_hal_subghz_debug_gpio_buff[1] = (uint32_t)gpio->pin << GPIO_NUMBER;
 
         dma_config.MemoryOrM2MDstAddress = (uint32_t)furi_hal_subghz_debug_gpio_buff;
-        dma_config.PeriphOrM2MSrcAddress = (uint32_t)&(gpio->port->BSRR);
+        dma_config.PeriphOrM2MSrcAddress = (uint32_t) & (gpio->port->BSRR);
         dma_config.Direction = LL_DMA_DIRECTION_MEMORY_TO_PERIPH;
         dma_config.Mode = LL_DMA_MODE_CIRCULAR;
         dma_config.PeriphOrM2MSrcIncMode = LL_DMA_PERIPH_NOINCREMENT;
@@ -867,7 +867,11 @@ bool furi_hal_subghz_start_async_tx(FuriHalSubGhzAsyncTxCallback callback, void*
 
 bool furi_hal_subghz_is_async_tx_complete(void) {
     return (furi_hal_subghz.state == SubGhzStateAsyncTx) && (LL_TIM_GetAutoReload(TIM2) == 0);
-    FURI_LOG_I(TAG, "SubGhzStateAsyncTx %d , TIM2-ARR %ld",furi_hal_subghz.state,LL_TIM_GetAutoReload(TIM2));
+    FURI_LOG_I(
+        TAG,
+        "SubGhzStateAsyncTx %d , TIM2-ARR %ld",
+        furi_hal_subghz.state,
+        LL_TIM_GetAutoReload(TIM2));
 }
 
 void furi_hal_subghz_stop_async_tx(void) {