mirror of
https://github.com/Next-Flip/Momentum-Firmware.git
synced 2026-04-24 03:29:57 -07:00
[FL-3629] fbt: reworked assets & resources handling (#3160)
* fbt: reworking targets & assets handling WIP * fbt: dist fixes * fbt: moved SD card resources to owning apps * unit_tests: moved resources to app folder * github: updated unit_tests paths * github: packaging fixes * unit_tests: fixes * fbt: assets: internal cleanup * fbt: reworked assets handling * github: unit_tests: reintroducing fixes * minor cleanup * fbt: naming changes to reflect private nature of scons tools * fbt: resources: fixed dist archive paths * docs: updated paths * docs: updated more paths * docs: included "resources" parameter in app manifest docs; updated assets readme * updated gitignore for assets * github: updated action versions * unit_tests: restored timeout; scripts: assets: logging changes * gh: don't upload desktop animations for unit test run Co-authored-by: あく <alleteam@gmail.com>
This commit is contained in:
416
targets/f7/furi_hal/furi_hal_i2c.c
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416
targets/f7/furi_hal/furi_hal_i2c.c
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#include <furi_hal_i2c.h>
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#include <furi_hal_version.h>
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#include <furi_hal_power.h>
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#include <furi_hal_cortex.h>
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#include <stm32wbxx_ll_i2c.h>
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#include <stm32wbxx_ll_gpio.h>
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#include <furi.h>
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#define TAG "FuriHalI2c"
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void furi_hal_i2c_init_early() {
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furi_hal_i2c_bus_power.callback(&furi_hal_i2c_bus_power, FuriHalI2cBusEventInit);
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}
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void furi_hal_i2c_deinit_early() {
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furi_hal_i2c_bus_power.callback(&furi_hal_i2c_bus_power, FuriHalI2cBusEventDeinit);
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}
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void furi_hal_i2c_init() {
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furi_hal_i2c_bus_external.callback(&furi_hal_i2c_bus_external, FuriHalI2cBusEventInit);
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FURI_LOG_I(TAG, "Init OK");
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}
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void furi_hal_i2c_acquire(FuriHalI2cBusHandle* handle) {
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furi_hal_power_insomnia_enter();
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// Lock bus access
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handle->bus->callback(handle->bus, FuriHalI2cBusEventLock);
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// Ensure that no active handle set
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furi_check(handle->bus->current_handle == NULL);
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// Set current handle
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handle->bus->current_handle = handle;
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// Activate bus
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handle->bus->callback(handle->bus, FuriHalI2cBusEventActivate);
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// Activate handle
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handle->callback(handle, FuriHalI2cBusHandleEventActivate);
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}
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void furi_hal_i2c_release(FuriHalI2cBusHandle* handle) {
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// Ensure that current handle is our handle
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furi_check(handle->bus->current_handle == handle);
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// Deactivate handle
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handle->callback(handle, FuriHalI2cBusHandleEventDeactivate);
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// Deactivate bus
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handle->bus->callback(handle->bus, FuriHalI2cBusEventDeactivate);
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// Reset current handle
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handle->bus->current_handle = NULL;
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// Unlock bus
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handle->bus->callback(handle->bus, FuriHalI2cBusEventUnlock);
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furi_hal_power_insomnia_exit();
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}
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static bool
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furi_hal_i2c_wait_for_idle(I2C_TypeDef* i2c, FuriHalI2cBegin begin, FuriHalCortexTimer timer) {
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do {
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if(furi_hal_cortex_timer_is_expired(timer)) {
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return false;
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}
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} while(begin == FuriHalI2cBeginStart && LL_I2C_IsActiveFlag_BUSY(i2c));
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// Only check if the bus is busy if starting a new transaction, if not we already control the bus
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return true;
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}
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static bool
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furi_hal_i2c_wait_for_end(I2C_TypeDef* i2c, FuriHalI2cEnd end, FuriHalCortexTimer timer) {
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// If ending the transaction with a stop condition, wait for it to be detected, otherwise wait for a transfer complete flag
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bool wait_for_stop = end == FuriHalI2cEndStop;
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uint32_t end_mask = (wait_for_stop) ? I2C_ISR_STOPF : (I2C_ISR_TC | I2C_ISR_TCR);
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while((i2c->ISR & end_mask) == 0) {
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if(furi_hal_cortex_timer_is_expired(timer)) {
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return false;
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}
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}
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return true;
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}
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static uint32_t
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furi_hal_i2c_get_start_signal(FuriHalI2cBegin begin, bool ten_bit_address, bool read) {
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switch(begin) {
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case FuriHalI2cBeginRestart:
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if(read) {
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return ten_bit_address ? LL_I2C_GENERATE_RESTART_10BIT_READ :
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LL_I2C_GENERATE_RESTART_7BIT_READ;
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} else {
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return ten_bit_address ? LL_I2C_GENERATE_RESTART_10BIT_WRITE :
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LL_I2C_GENERATE_RESTART_7BIT_WRITE;
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}
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case FuriHalI2cBeginResume:
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return LL_I2C_GENERATE_NOSTARTSTOP;
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case FuriHalI2cBeginStart:
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default:
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return read ? LL_I2C_GENERATE_START_READ : LL_I2C_GENERATE_START_WRITE;
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}
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}
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static uint32_t furi_hal_i2c_get_end_signal(FuriHalI2cEnd end) {
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switch(end) {
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case FuriHalI2cEndAwaitRestart:
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return LL_I2C_MODE_SOFTEND;
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case FuriHalI2cEndPause:
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return LL_I2C_MODE_RELOAD;
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case FuriHalI2cEndStop:
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default:
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return LL_I2C_MODE_AUTOEND;
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}
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}
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static bool furi_hal_i2c_transfer_is_aborted(I2C_TypeDef* i2c) {
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return LL_I2C_IsActiveFlag_STOP(i2c) &&
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!(LL_I2C_IsActiveFlag_TC(i2c) || LL_I2C_IsActiveFlag_TCR(i2c));
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}
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static bool furi_hal_i2c_transfer(
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I2C_TypeDef* i2c,
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uint8_t* data,
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uint32_t size,
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FuriHalI2cEnd end,
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bool read,
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FuriHalCortexTimer timer) {
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bool ret = true;
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while(size > 0) {
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bool should_stop = furi_hal_cortex_timer_is_expired(timer) ||
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furi_hal_i2c_transfer_is_aborted(i2c);
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// Modifying the data pointer's data is UB if read is true
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if(read && LL_I2C_IsActiveFlag_RXNE(i2c)) {
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*data = LL_I2C_ReceiveData8(i2c);
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data++;
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size--;
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} else if(!read && LL_I2C_IsActiveFlag_TXIS(i2c)) {
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LL_I2C_TransmitData8(i2c, *data);
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data++;
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size--;
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}
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// Exit on timeout or premature stop, probably caused by a nacked address or byte
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if(should_stop) {
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ret = size == 0; // If the transfer was over, still a success
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break;
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}
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}
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if(ret) {
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ret = furi_hal_i2c_wait_for_end(i2c, end, timer);
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}
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LL_I2C_ClearFlag_STOP(i2c);
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return ret;
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}
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static bool furi_hal_i2c_transaction(
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I2C_TypeDef* i2c,
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uint16_t address,
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bool ten_bit,
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uint8_t* data,
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size_t size,
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FuriHalI2cBegin begin,
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FuriHalI2cEnd end,
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bool read,
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FuriHalCortexTimer timer) {
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uint32_t addr_size = ten_bit ? LL_I2C_ADDRSLAVE_10BIT : LL_I2C_ADDRSLAVE_7BIT;
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uint32_t start_signal = furi_hal_i2c_get_start_signal(begin, ten_bit, read);
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if(!furi_hal_i2c_wait_for_idle(i2c, begin, timer)) {
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return false;
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}
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do {
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uint8_t transfer_size = size;
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FuriHalI2cEnd transfer_end = end;
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if(size > 255) {
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transfer_size = 255;
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transfer_end = FuriHalI2cEndPause;
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}
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uint32_t end_signal = furi_hal_i2c_get_end_signal(transfer_end);
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LL_I2C_HandleTransfer(i2c, address, addr_size, transfer_size, end_signal, start_signal);
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if(!furi_hal_i2c_transfer(i2c, data, transfer_size, transfer_end, read, timer)) {
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return false;
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}
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size -= transfer_size;
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data += transfer_size;
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start_signal = LL_I2C_GENERATE_NOSTARTSTOP;
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} while(size > 0);
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return true;
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}
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bool furi_hal_i2c_rx_ext(
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FuriHalI2cBusHandle* handle,
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uint16_t address,
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bool ten_bit,
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uint8_t* data,
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size_t size,
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FuriHalI2cBegin begin,
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FuriHalI2cEnd end,
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uint32_t timeout) {
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furi_check(handle->bus->current_handle == handle);
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FuriHalCortexTimer timer = furi_hal_cortex_timer_get(timeout * 1000);
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return furi_hal_i2c_transaction(
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handle->bus->i2c, address, ten_bit, data, size, begin, end, true, timer);
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}
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bool furi_hal_i2c_tx_ext(
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FuriHalI2cBusHandle* handle,
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uint16_t address,
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bool ten_bit,
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const uint8_t* data,
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size_t size,
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FuriHalI2cBegin begin,
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FuriHalI2cEnd end,
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uint32_t timeout) {
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furi_check(handle->bus->current_handle == handle);
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FuriHalCortexTimer timer = furi_hal_cortex_timer_get(timeout * 1000);
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return furi_hal_i2c_transaction(
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handle->bus->i2c, address, ten_bit, (uint8_t*)data, size, begin, end, false, timer);
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}
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bool furi_hal_i2c_tx(
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FuriHalI2cBusHandle* handle,
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uint8_t address,
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const uint8_t* data,
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size_t size,
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uint32_t timeout) {
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furi_assert(timeout > 0);
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return furi_hal_i2c_tx_ext(
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handle, address, false, data, size, FuriHalI2cBeginStart, FuriHalI2cEndStop, timeout);
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}
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bool furi_hal_i2c_rx(
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FuriHalI2cBusHandle* handle,
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uint8_t address,
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uint8_t* data,
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size_t size,
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uint32_t timeout) {
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furi_assert(timeout > 0);
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return furi_hal_i2c_rx_ext(
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handle, address, false, data, size, FuriHalI2cBeginStart, FuriHalI2cEndStop, timeout);
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}
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bool furi_hal_i2c_trx(
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FuriHalI2cBusHandle* handle,
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uint8_t address,
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const uint8_t* tx_data,
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size_t tx_size,
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uint8_t* rx_data,
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size_t rx_size,
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uint32_t timeout) {
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return furi_hal_i2c_tx_ext(
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handle,
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address,
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false,
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tx_data,
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tx_size,
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FuriHalI2cBeginStart,
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FuriHalI2cEndStop,
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timeout) &&
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furi_hal_i2c_rx_ext(
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handle,
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address,
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false,
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rx_data,
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rx_size,
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FuriHalI2cBeginStart,
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FuriHalI2cEndStop,
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timeout);
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}
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bool furi_hal_i2c_is_device_ready(FuriHalI2cBusHandle* handle, uint8_t i2c_addr, uint32_t timeout) {
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furi_check(handle);
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furi_check(handle->bus->current_handle == handle);
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furi_assert(timeout > 0);
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bool ret = true;
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FuriHalCortexTimer timer = furi_hal_cortex_timer_get(timeout * 1000);
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if(!furi_hal_i2c_wait_for_idle(handle->bus->i2c, FuriHalI2cBeginStart, timer)) {
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return false;
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}
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LL_I2C_HandleTransfer(
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handle->bus->i2c,
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i2c_addr,
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LL_I2C_ADDRSLAVE_7BIT,
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0,
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LL_I2C_MODE_AUTOEND,
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LL_I2C_GENERATE_START_WRITE);
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if(!furi_hal_i2c_wait_for_end(handle->bus->i2c, FuriHalI2cEndStop, timer)) {
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return false;
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}
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ret = !LL_I2C_IsActiveFlag_NACK(handle->bus->i2c);
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LL_I2C_ClearFlag_NACK(handle->bus->i2c);
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LL_I2C_ClearFlag_STOP(handle->bus->i2c);
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return ret;
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}
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bool furi_hal_i2c_read_reg_8(
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FuriHalI2cBusHandle* handle,
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uint8_t i2c_addr,
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uint8_t reg_addr,
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uint8_t* data,
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uint32_t timeout) {
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furi_check(handle);
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return furi_hal_i2c_trx(handle, i2c_addr, ®_addr, 1, data, 1, timeout);
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}
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bool furi_hal_i2c_read_reg_16(
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FuriHalI2cBusHandle* handle,
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uint8_t i2c_addr,
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uint8_t reg_addr,
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uint16_t* data,
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uint32_t timeout) {
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furi_check(handle);
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uint8_t reg_data[2];
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bool ret = furi_hal_i2c_trx(handle, i2c_addr, ®_addr, 1, reg_data, 2, timeout);
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*data = (reg_data[0] << 8) | (reg_data[1]);
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return ret;
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}
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bool furi_hal_i2c_read_mem(
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FuriHalI2cBusHandle* handle,
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uint8_t i2c_addr,
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uint8_t mem_addr,
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uint8_t* data,
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size_t len,
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uint32_t timeout) {
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furi_check(handle);
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return furi_hal_i2c_trx(handle, i2c_addr, &mem_addr, 1, data, len, timeout);
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}
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bool furi_hal_i2c_write_reg_8(
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FuriHalI2cBusHandle* handle,
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uint8_t i2c_addr,
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uint8_t reg_addr,
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uint8_t data,
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uint32_t timeout) {
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furi_check(handle);
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const uint8_t tx_data[2] = {
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reg_addr,
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data,
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};
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return furi_hal_i2c_tx(handle, i2c_addr, tx_data, 2, timeout);
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}
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bool furi_hal_i2c_write_reg_16(
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FuriHalI2cBusHandle* handle,
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uint8_t i2c_addr,
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uint8_t reg_addr,
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uint16_t data,
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uint32_t timeout) {
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furi_check(handle);
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const uint8_t tx_data[3] = {
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reg_addr,
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(data >> 8) & 0xFF,
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data & 0xFF,
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};
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return furi_hal_i2c_tx(handle, i2c_addr, tx_data, 3, timeout);
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}
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bool furi_hal_i2c_write_mem(
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FuriHalI2cBusHandle* handle,
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uint8_t i2c_addr,
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uint8_t mem_addr,
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const uint8_t* data,
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size_t len,
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uint32_t timeout) {
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furi_check(handle);
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furi_check(handle->bus->current_handle == handle);
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furi_assert(timeout > 0);
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return furi_hal_i2c_tx_ext(
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handle,
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i2c_addr,
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false,
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&mem_addr,
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1,
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FuriHalI2cBeginStart,
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FuriHalI2cEndPause,
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timeout) &&
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furi_hal_i2c_tx_ext(
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handle,
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i2c_addr,
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false,
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data,
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len,
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FuriHalI2cBeginResume,
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FuriHalI2cEndStop,
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timeout);
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}
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