mirror of
https://github.com/Next-Flip/Momentum-Firmware.git
synced 2026-05-14 10:38:35 -07:00
Merge branch 'dev' of https://github.com/DarkFlippers/unleashed-firmware into xfw-dev
This commit is contained in:
@@ -1,5 +1,5 @@
|
||||
entry,status,name,type,params
|
||||
Version,+,31.3,,
|
||||
Version,+,34.1,,
|
||||
Header,+,applications/main/archive/helpers/favorite_timeout.h,,
|
||||
Header,+,applications/main/subghz/helpers/subghz_txrx.h,,
|
||||
Header,+,applications/services/bt/bt_service/bt.h,,
|
||||
@@ -65,6 +65,7 @@ Header,+,firmware/targets/f7/furi_hal/furi_hal_target_hw.h,,
|
||||
Header,+,firmware/targets/f7/furi_hal/furi_hal_uart.h,,
|
||||
Header,+,firmware/targets/f7/furi_hal/furi_hal_usb_cdc.h,,
|
||||
Header,+,firmware/targets/f7/platform_specific/intrinsic_export.h,,
|
||||
Header,+,firmware/targets/f7/platform_specific/math_wrapper.h,,
|
||||
Header,+,firmware/targets/furi_hal_include/furi_hal.h,,
|
||||
Header,+,firmware/targets/furi_hal_include/furi_hal_bt.h,,
|
||||
Header,+,firmware/targets/furi_hal_include/furi_hal_bt_hid.h,,
|
||||
@@ -152,7 +153,12 @@ Header,+,lib/mlib/m-rbtree.h,,
|
||||
Header,+,lib/mlib/m-tuple.h,,
|
||||
Header,+,lib/mlib/m-variant.h,,
|
||||
Header,+,lib/music_worker/music_worker.h,,
|
||||
Header,+,lib/nfc/helpers/mfkey32.h,,
|
||||
Header,+,lib/nfc/helpers/nfc_generators.h,,
|
||||
Header,+,lib/nfc/nfc_device.h,,
|
||||
Header,+,lib/nfc/nfc_types.h,,
|
||||
Header,+,lib/nfc/nfc_worker.h,,
|
||||
Header,+,lib/nfc/parsers/nfc_supported_card.h,,
|
||||
Header,+,lib/nfc/protocols/nfc_util.h,,
|
||||
Header,+,lib/one_wire/maxim_crc.h,,
|
||||
Header,+,lib/one_wire/one_wire_host.h,,
|
||||
@@ -196,6 +202,7 @@ Header,+,lib/subghz/environment.h,,
|
||||
Header,+,lib/subghz/protocols/raw.h,,
|
||||
Header,+,lib/subghz/receiver.h,,
|
||||
Header,+,lib/subghz/registry.h,,
|
||||
Header,+,lib/subghz/subghz_file_encoder_worker.h,,
|
||||
Header,+,lib/subghz/subghz_protocol_registry.h,,
|
||||
Header,+,lib/subghz/subghz_setting.h,,
|
||||
Header,+,lib/subghz/subghz_tx_rx_worker.h,,
|
||||
@@ -1332,12 +1339,13 @@ Function,+,furi_hal_nfc_tx_rx,_Bool,"FuriHalNfcTxRxContext*, uint16_t"
|
||||
Function,+,furi_hal_nfc_tx_rx_full,_Bool,FuriHalNfcTxRxContext*
|
||||
Function,-,furi_hal_os_init,void,
|
||||
Function,+,furi_hal_os_tick,void,
|
||||
Function,+,furi_hal_power_check_otg_fault,_Bool,
|
||||
Function,+,furi_hal_power_check_otg_status,void,
|
||||
Function,+,furi_hal_power_debug_get,void,"PropertyValueCallback, void*"
|
||||
Function,+,furi_hal_power_disable_external_3_3v,void,
|
||||
Function,+,furi_hal_power_disable_otg,void,
|
||||
Function,+,furi_hal_power_enable_external_3_3v,void,
|
||||
Function,+,furi_hal_power_enable_otg,void,
|
||||
Function,+,furi_hal_power_enable_otg,_Bool,
|
||||
Function,+,furi_hal_power_gauge_is_ok,_Bool,
|
||||
Function,+,furi_hal_power_get_bat_health_pct,uint8_t,
|
||||
Function,+,furi_hal_power_get_battery_charge_voltage_limit,float,
|
||||
@@ -1458,26 +1466,20 @@ Function,-,furi_hal_spi_config_init,void,
|
||||
Function,-,furi_hal_spi_config_init_early,void,
|
||||
Function,-,furi_hal_spi_dma_init,void,
|
||||
Function,+,furi_hal_spi_release,void,FuriHalSpiBusHandle*
|
||||
Function,+,furi_hal_subghz_check_radio,_Bool,
|
||||
Function,+,furi_hal_subghz_disable_ext_power,void,
|
||||
Function,-,furi_hal_subghz_dump_state,void,
|
||||
Function,+,furi_hal_subghz_enable_ext_power,_Bool,
|
||||
Function,+,furi_hal_subghz_flush_rx,void,
|
||||
Function,+,furi_hal_subghz_flush_tx,void,
|
||||
Function,+,furi_hal_subghz_get_external_power_disable,_Bool,
|
||||
Function,+,furi_hal_subghz_get_data_gpio,const GpioPin*,
|
||||
Function,+,furi_hal_subghz_get_lqi,uint8_t,
|
||||
Function,+,furi_hal_subghz_get_radio_type,SubGhzRadioType,
|
||||
Function,+,furi_hal_subghz_get_rolling_counter_mult,uint8_t,
|
||||
Function,+,furi_hal_subghz_get_rssi,float,
|
||||
Function,+,furi_hal_subghz_idle,void,
|
||||
Function,-,furi_hal_subghz_init,void,
|
||||
Function,-,furi_hal_subghz_init_check,_Bool,
|
||||
Function,+,furi_hal_subghz_init_radio_type,_Bool,SubGhzRadioType
|
||||
Function,+,furi_hal_subghz_is_async_tx_complete,_Bool,
|
||||
Function,+,furi_hal_subghz_is_frequency_valid,_Bool,uint32_t
|
||||
Function,+,furi_hal_subghz_is_rx_data_crc_valid,_Bool,
|
||||
Function,+,furi_hal_subghz_is_tx_allowed,_Bool,uint32_t
|
||||
Function,+,furi_hal_subghz_load_custom_preset,void,uint8_t*
|
||||
Function,+,furi_hal_subghz_load_custom_preset,void,const uint8_t*
|
||||
Function,+,furi_hal_subghz_load_patable,void,const uint8_t[8]
|
||||
Function,+,furi_hal_subghz_load_preset,void,FuriHalSubGhzPreset
|
||||
Function,+,furi_hal_subghz_load_registers,void,uint8_t*
|
||||
@@ -1485,14 +1487,12 @@ Function,+,furi_hal_subghz_read_packet,void,"uint8_t*, uint8_t*"
|
||||
Function,+,furi_hal_subghz_reset,void,
|
||||
Function,+,furi_hal_subghz_rx,void,
|
||||
Function,+,furi_hal_subghz_rx_pipe_not_empty,_Bool,
|
||||
Function,+,furi_hal_subghz_select_radio_type,void,SubGhzRadioType
|
||||
Function,+,furi_hal_subghz_set_async_mirror_pin,void,const GpioPin*
|
||||
Function,+,furi_hal_subghz_set_external_power_disable,void,_Bool
|
||||
Function,+,furi_hal_subghz_set_frequency,uint32_t,uint32_t
|
||||
Function,+,furi_hal_subghz_set_frequency_and_path,uint32_t,uint32_t
|
||||
Function,+,furi_hal_subghz_set_path,void,FuriHalSubGhzPath
|
||||
Function,-,furi_hal_subghz_set_rolling_counter_mult,void,uint8_t
|
||||
Function,-,furi_hal_subghz_shutdown,void,
|
||||
Function,+,furi_hal_subghz_set_rolling_counter_mult,void,uint8_t
|
||||
Function,+,furi_hal_subghz_shutdown,void,
|
||||
Function,+,furi_hal_subghz_sleep,void,
|
||||
Function,+,furi_hal_subghz_start_async_rx,void,"FuriHalSubGhzCaptureCallback, void*"
|
||||
Function,+,furi_hal_subghz_start_async_tx,_Bool,"FuriHalSubGhzAsyncTxCallback, void*"
|
||||
@@ -1537,6 +1537,7 @@ Function,+,furi_hal_version_get_hw_target,uint8_t,
|
||||
Function,+,furi_hal_version_get_hw_timestamp,uint32_t,
|
||||
Function,+,furi_hal_version_get_hw_version,uint8_t,
|
||||
Function,+,furi_hal_version_get_ic_id,const char*,
|
||||
Function,+,furi_hal_version_get_mic_id,const char*,
|
||||
Function,+,furi_hal_version_get_model_code,const char*,
|
||||
Function,+,furi_hal_version_get_model_name,const char*,
|
||||
Function,+,furi_hal_version_get_name_ptr,const char*,
|
||||
@@ -1556,6 +1557,8 @@ Function,+,furi_kernel_restore_lock,int32_t,int32_t
|
||||
Function,+,furi_kernel_unlock,int32_t,
|
||||
Function,+,furi_log_get_level,FuriLogLevel,
|
||||
Function,-,furi_log_init,void,
|
||||
Function,+,furi_log_level_from_string,_Bool,"const char*, FuriLogLevel*"
|
||||
Function,+,furi_log_level_to_string,_Bool,"FuriLogLevel, const char**"
|
||||
Function,+,furi_log_print_format,void,"FuriLogLevel, const char*, const char*, ..."
|
||||
Function,+,furi_log_print_raw_format,void,"FuriLogLevel, const char*, ..."
|
||||
Function,+,furi_log_set_level,void,FuriLogLevel
|
||||
@@ -2051,40 +2054,40 @@ Function,-,mf_classic_authenticate,_Bool,"FuriHalNfcTxRxContext*, uint8_t, uint6
|
||||
Function,-,mf_classic_authenticate_skip_activate,_Bool,"FuriHalNfcTxRxContext*, uint8_t, uint64_t, MfClassicKey, _Bool, uint32_t"
|
||||
Function,-,mf_classic_block_to_value,_Bool,"const uint8_t*, int32_t*, uint8_t*"
|
||||
Function,-,mf_classic_check_card_type,_Bool,FuriHalNfcADevData*
|
||||
Function,-,mf_classic_dict_add_key,_Bool,"MfClassicDict*, uint8_t*"
|
||||
Function,+,mf_classic_dict_add_key,_Bool,"MfClassicDict*, uint8_t*"
|
||||
Function,-,mf_classic_dict_add_key_str,_Bool,"MfClassicDict*, FuriString*"
|
||||
Function,-,mf_classic_dict_alloc,MfClassicDict*,MfClassicDictType
|
||||
Function,-,mf_classic_dict_check_presence,_Bool,MfClassicDictType
|
||||
Function,-,mf_classic_dict_delete_index,_Bool,"MfClassicDict*, uint32_t"
|
||||
Function,+,mf_classic_dict_alloc,MfClassicDict*,MfClassicDictType
|
||||
Function,+,mf_classic_dict_check_presence,_Bool,MfClassicDictType
|
||||
Function,+,mf_classic_dict_delete_index,_Bool,"MfClassicDict*, uint32_t"
|
||||
Function,-,mf_classic_dict_find_index,_Bool,"MfClassicDict*, uint8_t*, uint32_t*"
|
||||
Function,-,mf_classic_dict_find_index_str,_Bool,"MfClassicDict*, FuriString*, uint32_t*"
|
||||
Function,-,mf_classic_dict_free,void,MfClassicDict*
|
||||
Function,+,mf_classic_dict_free,void,MfClassicDict*
|
||||
Function,-,mf_classic_dict_get_key_at_index,_Bool,"MfClassicDict*, uint64_t*, uint32_t"
|
||||
Function,-,mf_classic_dict_get_key_at_index_str,_Bool,"MfClassicDict*, FuriString*, uint32_t"
|
||||
Function,+,mf_classic_dict_get_key_at_index_str,_Bool,"MfClassicDict*, FuriString*, uint32_t"
|
||||
Function,-,mf_classic_dict_get_next_key,_Bool,"MfClassicDict*, uint64_t*"
|
||||
Function,-,mf_classic_dict_get_next_key_str,_Bool,"MfClassicDict*, FuriString*"
|
||||
Function,-,mf_classic_dict_get_total_keys,uint32_t,MfClassicDict*
|
||||
Function,-,mf_classic_dict_is_key_present,_Bool,"MfClassicDict*, uint8_t*"
|
||||
Function,+,mf_classic_dict_get_next_key_str,_Bool,"MfClassicDict*, FuriString*"
|
||||
Function,+,mf_classic_dict_get_total_keys,uint32_t,MfClassicDict*
|
||||
Function,+,mf_classic_dict_is_key_present,_Bool,"MfClassicDict*, uint8_t*"
|
||||
Function,-,mf_classic_dict_is_key_present_str,_Bool,"MfClassicDict*, FuriString*"
|
||||
Function,-,mf_classic_dict_rewind,_Bool,MfClassicDict*
|
||||
Function,-,mf_classic_emulator,_Bool,"MfClassicEmulator*, FuriHalNfcTxRxContext*, _Bool"
|
||||
Function,-,mf_classic_get_classic_type,MfClassicType,FuriHalNfcADevData*
|
||||
Function,-,mf_classic_get_read_sectors_and_keys,void,"MfClassicData*, uint8_t*, uint8_t*"
|
||||
Function,-,mf_classic_get_sector_by_block,uint8_t,uint8_t
|
||||
Function,+,mf_classic_get_read_sectors_and_keys,void,"MfClassicData*, uint8_t*, uint8_t*"
|
||||
Function,+,mf_classic_get_sector_by_block,uint8_t,uint8_t
|
||||
Function,-,mf_classic_get_sector_trailer_block_num_by_sector,uint8_t,uint8_t
|
||||
Function,-,mf_classic_get_sector_trailer_by_sector,MfClassicSectorTrailer*,"MfClassicData*, uint8_t"
|
||||
Function,+,mf_classic_get_sector_trailer_by_sector,MfClassicSectorTrailer*,"MfClassicData*, uint8_t"
|
||||
Function,-,mf_classic_get_total_block_num,uint16_t,MfClassicType
|
||||
Function,-,mf_classic_get_total_sectors_num,uint8_t,MfClassicType
|
||||
Function,+,mf_classic_get_total_sectors_num,uint8_t,MfClassicType
|
||||
Function,-,mf_classic_get_type_str,const char*,MfClassicType
|
||||
Function,-,mf_classic_halt,void,"FuriHalNfcTxRxContext*, Crypto1*"
|
||||
Function,-,mf_classic_is_allowed_access_data_block,_Bool,"MfClassicData*, uint8_t, MfClassicKey, MfClassicAction"
|
||||
Function,-,mf_classic_is_allowed_access_sector_trailer,_Bool,"MfClassicData*, uint8_t, MfClassicKey, MfClassicAction"
|
||||
Function,-,mf_classic_is_block_read,_Bool,"MfClassicData*, uint8_t"
|
||||
Function,-,mf_classic_is_card_read,_Bool,MfClassicData*
|
||||
Function,-,mf_classic_is_key_found,_Bool,"MfClassicData*, uint8_t, MfClassicKey"
|
||||
Function,+,mf_classic_is_block_read,_Bool,"MfClassicData*, uint8_t"
|
||||
Function,+,mf_classic_is_card_read,_Bool,MfClassicData*
|
||||
Function,+,mf_classic_is_key_found,_Bool,"MfClassicData*, uint8_t, MfClassicKey"
|
||||
Function,-,mf_classic_is_sector_data_read,_Bool,"MfClassicData*, uint8_t"
|
||||
Function,-,mf_classic_is_sector_read,_Bool,"MfClassicData*, uint8_t"
|
||||
Function,-,mf_classic_is_sector_trailer,_Bool,uint8_t
|
||||
Function,+,mf_classic_is_sector_trailer,_Bool,uint8_t
|
||||
Function,-,mf_classic_is_value_block,_Bool,"MfClassicData*, uint8_t"
|
||||
Function,-,mf_classic_read_block,_Bool,"FuriHalNfcTxRxContext*, Crypto1*, uint8_t, MfClassicBlock*"
|
||||
Function,-,mf_classic_read_card,uint8_t,"FuriHalNfcTxRxContext*, MfClassicReader*, MfClassicData*"
|
||||
@@ -2102,10 +2105,10 @@ Function,-,mf_classic_value_to_block,void,"int32_t, uint8_t, uint8_t*"
|
||||
Function,-,mf_classic_write_block,_Bool,"FuriHalNfcTxRxContext*, Crypto1*, uint8_t, MfClassicBlock*"
|
||||
Function,-,mf_classic_write_sector,_Bool,"FuriHalNfcTxRxContext*, MfClassicData*, MfClassicData*, uint8_t"
|
||||
Function,-,mf_df_cat_application,void,"MifareDesfireApplication*, FuriString*"
|
||||
Function,-,mf_df_cat_application_info,void,"MifareDesfireApplication*, FuriString*"
|
||||
Function,-,mf_df_cat_card_info,void,"MifareDesfireData*, FuriString*"
|
||||
Function,+,mf_df_cat_application_info,void,"MifareDesfireApplication*, FuriString*"
|
||||
Function,+,mf_df_cat_card_info,void,"MifareDesfireData*, FuriString*"
|
||||
Function,-,mf_df_cat_data,void,"MifareDesfireData*, FuriString*"
|
||||
Function,-,mf_df_cat_file,void,"MifareDesfireFile*, FuriString*"
|
||||
Function,+,mf_df_cat_file,void,"MifareDesfireFile*, FuriString*"
|
||||
Function,-,mf_df_cat_free_mem,void,"MifareDesfireFreeMemory*, FuriString*"
|
||||
Function,-,mf_df_cat_key_settings,void,"MifareDesfireKeySettings*, FuriString*"
|
||||
Function,-,mf_df_cat_version,void,"MifareDesfireVersion*, FuriString*"
|
||||
@@ -2135,8 +2138,8 @@ Function,-,mf_df_prepare_read_records,uint16_t,"uint8_t*, uint8_t, uint32_t, uin
|
||||
Function,-,mf_df_prepare_select_application,uint16_t,"uint8_t*, uint8_t[3]"
|
||||
Function,-,mf_df_read_card,_Bool,"FuriHalNfcTxRxContext*, MifareDesfireData*"
|
||||
Function,-,mf_ul_check_card_type,_Bool,FuriHalNfcADevData*
|
||||
Function,-,mf_ul_emulation_supported,_Bool,MfUltralightData*
|
||||
Function,-,mf_ul_is_full_capture,_Bool,MfUltralightData*
|
||||
Function,+,mf_ul_emulation_supported,_Bool,MfUltralightData*
|
||||
Function,+,mf_ul_is_full_capture,_Bool,MfUltralightData*
|
||||
Function,-,mf_ul_prepare_emulation,void,"MfUltralightEmulator*, MfUltralightData*"
|
||||
Function,-,mf_ul_prepare_emulation_response,_Bool,"uint8_t*, uint16_t, uint8_t*, uint16_t*, uint32_t*, void*"
|
||||
Function,-,mf_ul_pwdgen_amiibo,uint32_t,FuriHalNfcDevData*
|
||||
@@ -2146,13 +2149,18 @@ Function,-,mf_ul_reset,void,MfUltralightData*
|
||||
Function,-,mf_ul_reset_emulation,void,"MfUltralightEmulator*, _Bool"
|
||||
Function,-,mf_ultralight_authenticate,_Bool,"FuriHalNfcTxRxContext*, uint32_t, uint16_t*"
|
||||
Function,-,mf_ultralight_fast_read_pages,_Bool,"FuriHalNfcTxRxContext*, MfUltralightReader*, MfUltralightData*"
|
||||
Function,-,mf_ultralight_get_config_pages,MfUltralightConfigPages*,MfUltralightData*
|
||||
Function,+,mf_ultralight_get_config_pages,MfUltralightConfigPages*,MfUltralightData*
|
||||
Function,-,mf_ultralight_read_counters,_Bool,"FuriHalNfcTxRxContext*, MfUltralightData*"
|
||||
Function,-,mf_ultralight_read_pages,_Bool,"FuriHalNfcTxRxContext*, MfUltralightReader*, MfUltralightData*"
|
||||
Function,-,mf_ultralight_read_pages_direct,_Bool,"FuriHalNfcTxRxContext*, uint8_t, uint8_t*"
|
||||
Function,-,mf_ultralight_read_signature,_Bool,"FuriHalNfcTxRxContext*, MfUltralightData*"
|
||||
Function,-,mf_ultralight_read_tearing_flags,_Bool,"FuriHalNfcTxRxContext*, MfUltralightData*"
|
||||
Function,-,mf_ultralight_read_version,_Bool,"FuriHalNfcTxRxContext*, MfUltralightReader*, MfUltralightData*"
|
||||
Function,-,mfkey32_alloc,Mfkey32*,uint32_t
|
||||
Function,-,mfkey32_free,void,Mfkey32*
|
||||
Function,+,mfkey32_get_auth_sectors,uint16_t,FuriString*
|
||||
Function,-,mfkey32_process_data,void,"Mfkey32*, uint8_t*, uint16_t, _Bool, _Bool"
|
||||
Function,-,mfkey32_set_callback,void,"Mfkey32*, Mfkey32ParseDataCallback, void*"
|
||||
Function,-,mkdtemp,char*,char*
|
||||
Function,-,mkostemp,int,"char*, int"
|
||||
Function,-,mkostemps,int,"char*, int, int"
|
||||
@@ -2201,11 +2209,25 @@ Function,+,nfc_device_save_shadow,_Bool,"NfcDevice*, const char*"
|
||||
Function,+,nfc_device_set_loading_callback,void,"NfcDevice*, NfcLoadingCallback, void*"
|
||||
Function,+,nfc_device_set_name,void,"NfcDevice*, const char*"
|
||||
Function,+,nfc_file_select,_Bool,NfcDevice*
|
||||
Function,-,nfc_generate_mf_classic,void,"NfcDeviceData*, uint8_t, MfClassicType"
|
||||
Function,+,nfc_get_dev_type,const char*,FuriHalNfcType
|
||||
Function,-,nfc_guess_protocol,const char*,NfcProtocol
|
||||
Function,+,nfc_mf_classic_type,const char*,MfClassicType
|
||||
Function,+,nfc_mf_ul_type,const char*,"MfUltralightType, _Bool"
|
||||
Function,+,nfc_supported_card_verify_and_parse,_Bool,NfcDeviceData*
|
||||
Function,+,nfc_util_bytes2num,uint64_t,"const uint8_t*, uint8_t"
|
||||
Function,+,nfc_util_even_parity32,uint8_t,uint32_t
|
||||
Function,+,nfc_util_num2bytes,void,"uint64_t, uint8_t, uint8_t*"
|
||||
Function,+,nfc_util_odd_parity,void,"const uint8_t*, uint8_t*, uint8_t"
|
||||
Function,+,nfc_util_odd_parity8,uint8_t,uint8_t
|
||||
Function,+,nfc_worker_alloc,NfcWorker*,
|
||||
Function,+,nfc_worker_free,void,NfcWorker*
|
||||
Function,+,nfc_worker_get_state,NfcWorkerState,NfcWorker*
|
||||
Function,-,nfc_worker_nfcv_emulate,void,NfcWorker*
|
||||
Function,-,nfc_worker_nfcv_sniff,void,NfcWorker*
|
||||
Function,-,nfc_worker_nfcv_unlock,void,NfcWorker*
|
||||
Function,+,nfc_worker_start,void,"NfcWorker*, NfcWorkerState, NfcDeviceData*, NfcWorkerCallback, void*"
|
||||
Function,+,nfc_worker_stop,void,NfcWorker*
|
||||
Function,-,nfca_append_crc16,void,"uint8_t*, uint16_t"
|
||||
Function,-,nfca_emulation_handler,_Bool,"uint8_t*, uint16_t, uint8_t*, uint16_t*"
|
||||
Function,-,nfca_get_crc16,uint16_t,"uint8_t*, uint16_t"
|
||||
@@ -2794,15 +2816,46 @@ Function,-,strupr,char*,char*
|
||||
Function,-,strverscmp,int,"const char*, const char*"
|
||||
Function,-,strxfrm,size_t,"char*, const char*, size_t"
|
||||
Function,-,strxfrm_l,size_t,"char*, const char*, size_t, locale_t"
|
||||
Function,-,stub_parser_verify_read,_Bool,"NfcWorker*, FuriHalNfcTxRxContext*"
|
||||
Function,+,subghz_block_generic_deserialize,SubGhzProtocolStatus,"SubGhzBlockGeneric*, FlipperFormat*"
|
||||
Function,+,subghz_block_generic_deserialize_check_count_bit,SubGhzProtocolStatus,"SubGhzBlockGeneric*, FlipperFormat*, uint16_t"
|
||||
Function,+,subghz_block_generic_get_preset_name,void,"const char*, FuriString*"
|
||||
Function,+,subghz_block_generic_serialize,SubGhzProtocolStatus,"SubGhzBlockGeneric*, FlipperFormat*, SubGhzRadioPreset*"
|
||||
Function,-,subghz_custom_btn_get,uint8_t,
|
||||
Function,-,subghz_custom_btn_get_original,uint8_t,
|
||||
Function,-,subghz_custom_btn_is_allowed,_Bool,
|
||||
Function,-,subghz_custom_btn_set,_Bool,uint8_t
|
||||
Function,+,subghz_custom_btn_get,uint8_t,
|
||||
Function,+,subghz_custom_btn_get_original,uint8_t,
|
||||
Function,+,subghz_custom_btn_is_allowed,_Bool,
|
||||
Function,+,subghz_custom_btn_set,_Bool,uint8_t
|
||||
Function,+,subghz_custom_btns_reset,void,
|
||||
Function,+,subghz_devices_begin,_Bool,const SubGhzDevice*
|
||||
Function,+,subghz_devices_deinit,void,
|
||||
Function,+,subghz_devices_end,void,const SubGhzDevice*
|
||||
Function,+,subghz_devices_flush_rx,void,const SubGhzDevice*
|
||||
Function,+,subghz_devices_flush_tx,void,const SubGhzDevice*
|
||||
Function,+,subghz_devices_get_by_name,const SubGhzDevice*,const char*
|
||||
Function,+,subghz_devices_get_data_gpio,const GpioPin*,const SubGhzDevice*
|
||||
Function,+,subghz_devices_get_lqi,uint8_t,const SubGhzDevice*
|
||||
Function,+,subghz_devices_get_name,const char*,const SubGhzDevice*
|
||||
Function,+,subghz_devices_get_rssi,float,const SubGhzDevice*
|
||||
Function,+,subghz_devices_idle,void,const SubGhzDevice*
|
||||
Function,+,subghz_devices_init,void,
|
||||
Function,+,subghz_devices_is_async_complete_tx,_Bool,const SubGhzDevice*
|
||||
Function,+,subghz_devices_is_connect,_Bool,const SubGhzDevice*
|
||||
Function,+,subghz_devices_is_frequency_valid,_Bool,"const SubGhzDevice*, uint32_t"
|
||||
Function,+,subghz_devices_is_rx_data_crc_valid,_Bool,const SubGhzDevice*
|
||||
Function,+,subghz_devices_load_preset,void,"const SubGhzDevice*, FuriHalSubGhzPreset, uint8_t*"
|
||||
Function,+,subghz_devices_read_packet,void,"const SubGhzDevice*, uint8_t*, uint8_t*"
|
||||
Function,+,subghz_devices_reset,void,const SubGhzDevice*
|
||||
Function,+,subghz_devices_rx_pipe_not_empty,_Bool,const SubGhzDevice*
|
||||
Function,+,subghz_devices_set_async_mirror_pin,void,"const SubGhzDevice*, const GpioPin*"
|
||||
Function,+,subghz_devices_set_frequency,uint32_t,"const SubGhzDevice*, uint32_t"
|
||||
Function,+,subghz_devices_set_rx,void,const SubGhzDevice*
|
||||
Function,+,subghz_devices_set_tx,_Bool,const SubGhzDevice*
|
||||
Function,+,subghz_devices_sleep,void,const SubGhzDevice*
|
||||
Function,+,subghz_devices_start_async_rx,void,"const SubGhzDevice*, void*, void*"
|
||||
Function,+,subghz_devices_start_async_tx,_Bool,"const SubGhzDevice*, void*, void*"
|
||||
Function,+,subghz_devices_stop_async_rx,void,const SubGhzDevice*
|
||||
Function,+,subghz_devices_stop_async_tx,void,const SubGhzDevice*
|
||||
Function,+,subghz_devices_write_packet,void,"const SubGhzDevice*, const uint8_t*, uint8_t"
|
||||
Function,+,subghz_environment_alloc,SubGhzEnvironment*,
|
||||
Function,+,subghz_environment_free,void,SubGhzEnvironment*
|
||||
Function,+,subghz_environment_get_alutech_at_4n_rainbow_table_file_name,const char*,SubGhzEnvironment*
|
||||
@@ -2817,6 +2870,14 @@ Function,+,subghz_environment_set_alutech_at_4n_rainbow_table_file_name,void,"Su
|
||||
Function,+,subghz_environment_set_came_atomo_rainbow_table_file_name,void,"SubGhzEnvironment*, const char*"
|
||||
Function,+,subghz_environment_set_nice_flor_s_rainbow_table_file_name,void,"SubGhzEnvironment*, const char*"
|
||||
Function,+,subghz_environment_set_protocol_registry,void,"SubGhzEnvironment*, const SubGhzProtocolRegistry*"
|
||||
Function,+,subghz_file_encoder_worker_alloc,SubGhzFileEncoderWorker*,
|
||||
Function,+,subghz_file_encoder_worker_callback_end,void,"SubGhzFileEncoderWorker*, SubGhzFileEncoderWorkerCallbackEnd, void*"
|
||||
Function,+,subghz_file_encoder_worker_free,void,SubGhzFileEncoderWorker*
|
||||
Function,+,subghz_file_encoder_worker_get_level_duration,LevelDuration,void*
|
||||
Function,+,subghz_file_encoder_worker_get_text_progress,void,"SubGhzFileEncoderWorker*, FuriString*"
|
||||
Function,+,subghz_file_encoder_worker_is_running,_Bool,SubGhzFileEncoderWorker*
|
||||
Function,+,subghz_file_encoder_worker_start,_Bool,"SubGhzFileEncoderWorker*, const char*, const char*"
|
||||
Function,+,subghz_file_encoder_worker_stop,void,SubGhzFileEncoderWorker*
|
||||
Function,-,subghz_keystore_alloc,SubGhzKeystore*,
|
||||
Function,-,subghz_keystore_free,void,SubGhzKeystore*
|
||||
Function,-,subghz_keystore_get_data,SubGhzKeyArray_t*,SubGhzKeystore*
|
||||
@@ -2825,6 +2886,7 @@ Function,-,subghz_keystore_raw_encrypted_save,_Bool,"const char*, const char*, u
|
||||
Function,-,subghz_keystore_raw_get_data,_Bool,"const char*, size_t, uint8_t*, size_t"
|
||||
Function,-,subghz_keystore_reset_kl,void,SubGhzKeystore*
|
||||
Function,-,subghz_keystore_save,_Bool,"SubGhzKeystore*, const char*, uint8_t*"
|
||||
Function,+,subghz_protocol_alutech_at_4n_create_data,_Bool,"void*, FlipperFormat*, uint32_t, uint8_t, uint16_t, SubGhzRadioPreset*"
|
||||
Function,+,subghz_protocol_blocks_add_bit,void,"SubGhzBlockDecoder*, uint8_t"
|
||||
Function,+,subghz_protocol_blocks_add_bytes,uint8_t,"const uint8_t[], size_t"
|
||||
Function,+,subghz_protocol_blocks_add_to_128_bit,void,"SubGhzBlockDecoder*, uint8_t, uint64_t*"
|
||||
@@ -2846,11 +2908,13 @@ Function,+,subghz_protocol_blocks_parity_bytes,uint8_t,"const uint8_t[], size_t"
|
||||
Function,+,subghz_protocol_blocks_reverse_key,uint64_t,"uint64_t, uint8_t"
|
||||
Function,+,subghz_protocol_blocks_set_bit_array,void,"_Bool, uint8_t[], size_t, size_t"
|
||||
Function,+,subghz_protocol_blocks_xor_bytes,uint8_t,"const uint8_t[], size_t"
|
||||
Function,+,subghz_protocol_came_atomo_create_data,_Bool,"void*, FlipperFormat*, uint32_t, uint16_t, SubGhzRadioPreset*"
|
||||
Function,+,subghz_protocol_decoder_base_deserialize,SubGhzProtocolStatus,"SubGhzProtocolDecoderBase*, FlipperFormat*"
|
||||
Function,+,subghz_protocol_decoder_base_get_hash_data,uint8_t,SubGhzProtocolDecoderBase*
|
||||
Function,+,subghz_protocol_decoder_base_get_string,_Bool,"SubGhzProtocolDecoderBase*, FuriString*"
|
||||
Function,+,subghz_protocol_decoder_base_serialize,SubGhzProtocolStatus,"SubGhzProtocolDecoderBase*, FlipperFormat*, SubGhzRadioPreset*"
|
||||
Function,-,subghz_protocol_decoder_base_set_decoder_callback,void,"SubGhzProtocolDecoderBase*, SubGhzProtocolDecoderBaseRxCallback, void*"
|
||||
Function,+,subghz_protocol_decoder_bin_raw_data_input_rssi,void,"SubGhzProtocolDecoderBinRAW*, float"
|
||||
Function,+,subghz_protocol_decoder_raw_alloc,void*,SubGhzEnvironment*
|
||||
Function,+,subghz_protocol_decoder_raw_deserialize,SubGhzProtocolStatus,"void*, FlipperFormat*"
|
||||
Function,+,subghz_protocol_decoder_raw_feed,void,"void*, _Bool, uint32_t"
|
||||
@@ -2862,6 +2926,10 @@ Function,+,subghz_protocol_encoder_raw_deserialize,SubGhzProtocolStatus,"void*,
|
||||
Function,+,subghz_protocol_encoder_raw_free,void,void*
|
||||
Function,+,subghz_protocol_encoder_raw_stop,void,void*
|
||||
Function,+,subghz_protocol_encoder_raw_yield,LevelDuration,void*
|
||||
Function,+,subghz_protocol_faac_slh_create_data,_Bool,"void*, FlipperFormat*, uint32_t, uint8_t, uint32_t, uint32_t, const char*, SubGhzRadioPreset*"
|
||||
Function,+,subghz_protocol_keeloq_bft_create_data,_Bool,"void*, FlipperFormat*, uint32_t, uint8_t, uint16_t, uint32_t, const char*, SubGhzRadioPreset*"
|
||||
Function,+,subghz_protocol_keeloq_create_data,_Bool,"void*, FlipperFormat*, uint32_t, uint8_t, uint16_t, const char*, SubGhzRadioPreset*"
|
||||
Function,+,subghz_protocol_nice_flor_s_create_data,_Bool,"void*, FlipperFormat*, uint32_t, uint8_t, uint16_t, SubGhzRadioPreset*, _Bool"
|
||||
Function,+,subghz_protocol_raw_file_encoder_worker_set_callback_end,void,"SubGhzProtocolEncoderRAW*, SubGhzProtocolEncoderRAWCallbackEnd, void*"
|
||||
Function,+,subghz_protocol_raw_gen_fff_data,void,"FlipperFormat*, const char*"
|
||||
Function,+,subghz_protocol_raw_get_sample_write,size_t,SubGhzProtocolDecoderRAW*
|
||||
@@ -2871,6 +2939,9 @@ Function,+,subghz_protocol_raw_save_to_file_stop,void,SubGhzProtocolDecoderRAW*
|
||||
Function,+,subghz_protocol_registry_count,size_t,const SubGhzProtocolRegistry*
|
||||
Function,+,subghz_protocol_registry_get_by_index,const SubGhzProtocol*,"const SubGhzProtocolRegistry*, size_t"
|
||||
Function,+,subghz_protocol_registry_get_by_name,const SubGhzProtocol*,"const SubGhzProtocolRegistry*, const char*"
|
||||
Function,+,subghz_protocol_secplus_v1_check_fixed,_Bool,uint32_t
|
||||
Function,+,subghz_protocol_secplus_v2_create_data,_Bool,"void*, FlipperFormat*, uint32_t, uint8_t, uint32_t, SubGhzRadioPreset*"
|
||||
Function,+,subghz_protocol_somfy_telis_create_data,_Bool,"void*, FlipperFormat*, uint32_t, uint8_t, uint16_t, SubGhzRadioPreset*"
|
||||
Function,+,subghz_receiver_alloc_init,SubGhzReceiver*,SubGhzEnvironment*
|
||||
Function,+,subghz_receiver_decode,void,"SubGhzReceiver*, _Bool, uint32_t"
|
||||
Function,+,subghz_receiver_free,void,SubGhzReceiver*
|
||||
@@ -2879,7 +2950,7 @@ Function,+,subghz_receiver_search_decoder_base_by_name,SubGhzProtocolDecoderBase
|
||||
Function,+,subghz_receiver_set_filter,void,"SubGhzReceiver*, SubGhzProtocolFlag"
|
||||
Function,+,subghz_receiver_set_rx_callback,void,"SubGhzReceiver*, SubGhzReceiverCallback, void*"
|
||||
Function,+,subghz_setting_alloc,SubGhzSetting*,
|
||||
Function,-,subghz_setting_customs_presets_to_log,uint8_t,SubGhzSetting*
|
||||
Function,+,subghz_setting_customs_presets_to_log,uint8_t,SubGhzSetting*
|
||||
Function,+,subghz_setting_delete_custom_preset,_Bool,"SubGhzSetting*, const char*"
|
||||
Function,+,subghz_setting_free,void,SubGhzSetting*
|
||||
Function,+,subghz_setting_get_default_frequency,uint32_t,SubGhzSetting*
|
||||
@@ -3502,15 +3573,12 @@ Variable,+,furi_hal_spi_bus_handle_nfc,FuriHalSpiBusHandle,
|
||||
Variable,+,furi_hal_spi_bus_handle_sd_fast,FuriHalSpiBusHandle,
|
||||
Variable,+,furi_hal_spi_bus_handle_sd_slow,FuriHalSpiBusHandle,
|
||||
Variable,+,furi_hal_spi_bus_handle_subghz,FuriHalSpiBusHandle,
|
||||
Variable,+,furi_hal_spi_bus_handle_subghz_ext,FuriHalSpiBusHandle,
|
||||
Variable,+,furi_hal_spi_bus_handle_subghz_int,FuriHalSpiBusHandle,
|
||||
Variable,+,furi_hal_spi_bus_r,FuriHalSpiBus,
|
||||
Variable,+,furi_hal_spi_preset_1edge_low_16m,const LL_SPI_InitTypeDef,
|
||||
Variable,+,furi_hal_spi_preset_1edge_low_2m,const LL_SPI_InitTypeDef,
|
||||
Variable,+,furi_hal_spi_preset_1edge_low_4m,const LL_SPI_InitTypeDef,
|
||||
Variable,+,furi_hal_spi_preset_1edge_low_8m,const LL_SPI_InitTypeDef,
|
||||
Variable,+,furi_hal_spi_preset_2edge_low_8m,const LL_SPI_InitTypeDef,
|
||||
Variable,+,furi_hal_subghz,volatile FuriHalSubGhz,
|
||||
Variable,+,gpio_button_back,const GpioPin,
|
||||
Variable,+,gpio_button_down,const GpioPin,
|
||||
Variable,+,gpio_button_left,const GpioPin,
|
||||
@@ -3518,7 +3586,6 @@ Variable,+,gpio_button_ok,const GpioPin,
|
||||
Variable,+,gpio_button_right,const GpioPin,
|
||||
Variable,+,gpio_button_up,const GpioPin,
|
||||
Variable,+,gpio_cc1101_g0,const GpioPin,
|
||||
Variable,+,gpio_cc1101_g0_ext,const GpioPin,
|
||||
Variable,+,gpio_display_cs,const GpioPin,
|
||||
Variable,+,gpio_display_di,const GpioPin,
|
||||
Variable,+,gpio_display_rst_n,const GpioPin,
|
||||
@@ -3551,13 +3618,9 @@ Variable,+,gpio_spi_d_miso,const GpioPin,
|
||||
Variable,+,gpio_spi_d_mosi,const GpioPin,
|
||||
Variable,+,gpio_spi_d_sck,const GpioPin,
|
||||
Variable,+,gpio_spi_r_miso,const GpioPin,
|
||||
Variable,+,gpio_spi_r_miso_ext,const GpioPin,
|
||||
Variable,+,gpio_spi_r_mosi,const GpioPin,
|
||||
Variable,+,gpio_spi_r_mosi_ext,const GpioPin,
|
||||
Variable,+,gpio_spi_r_sck,const GpioPin,
|
||||
Variable,+,gpio_spi_r_sck_ext,const GpioPin,
|
||||
Variable,+,gpio_subghz_cs,const GpioPin,
|
||||
Variable,+,gpio_subghz_cs_ext,const GpioPin,
|
||||
Variable,+,gpio_swclk,const GpioPin,
|
||||
Variable,+,gpio_swdio,const GpioPin,
|
||||
Variable,+,gpio_usart_rx,const GpioPin,
|
||||
@@ -3714,6 +3777,8 @@ Variable,+,message_red_255,const NotificationMessage,
|
||||
Variable,+,message_sound_off,const NotificationMessage,
|
||||
Variable,+,message_vibro_off,const NotificationMessage,
|
||||
Variable,+,message_vibro_on,const NotificationMessage,
|
||||
Variable,+,nfc_generators,const NfcGenerator*[],
|
||||
Variable,-,nfc_supported_card,NfcSupportedCard[NfcSupportedCardTypeEnd],
|
||||
Variable,+,sequence_audiovisual_alert,const NotificationSequence,
|
||||
Variable,+,sequence_blink_blue_10,const NotificationSequence,
|
||||
Variable,+,sequence_blink_blue_100,const NotificationSequence,
|
||||
|
||||
|
@@ -501,7 +501,7 @@ void gap_stop_advertising() {
|
||||
furi_mutex_release(gap->state_mutex);
|
||||
}
|
||||
|
||||
static void gap_advetise_timer_callback(void* context) {
|
||||
static void gap_advertise_timer_callback(void* context) {
|
||||
UNUSED(context);
|
||||
GapCommand command = GapCommandAdvLowPower;
|
||||
furi_check(furi_message_queue_put(gap->command_queue, &command, 0) == FuriStatusOk);
|
||||
@@ -515,7 +515,7 @@ bool gap_init(GapConfig* config, GapEventCallback on_event_cb, void* context) {
|
||||
gap = malloc(sizeof(Gap));
|
||||
gap->config = config;
|
||||
// Create advertising timer
|
||||
gap->advertise_timer = furi_timer_alloc(gap_advetise_timer_callback, FuriTimerTypeOnce, NULL);
|
||||
gap->advertise_timer = furi_timer_alloc(gap_advertise_timer_callback, FuriTimerTypeOnce, NULL);
|
||||
// Initialization of GATT & GAP layer
|
||||
gap->service.adv_name = config->adv_name;
|
||||
gap_init_svc(gap);
|
||||
|
||||
@@ -251,7 +251,7 @@ bool furi_hal_bt_start_app(FuriHalBtProfile profile, GapEventCallback event_cb,
|
||||
}
|
||||
// Change name Flipper -> Control
|
||||
if(strnlen(config->adv_name, FURI_HAL_VERSION_DEVICE_NAME_LENGTH) < 2 ||
|
||||
strnlen(config->adv_name + 1, FURI_HAL_VERSION_DEVICE_NAME_LENGTH) < 1) {
|
||||
strnlen(config->adv_name + 1, FURI_HAL_VERSION_DEVICE_NAME_LENGTH - 1) < 1) {
|
||||
snprintf(
|
||||
config->adv_name,
|
||||
FURI_HAL_VERSION_DEVICE_NAME_LENGTH,
|
||||
@@ -499,13 +499,10 @@ void furi_hal_bt_set_profile_adv_name(
|
||||
furi_assert(name);
|
||||
|
||||
if(strlen(name) == 0) {
|
||||
memset(
|
||||
&(profile_config[profile].config.adv_name[1]),
|
||||
0,
|
||||
strlen(&(profile_config[profile].config.adv_name[1])));
|
||||
memset(&(profile_config[profile].config.adv_name[1]), 0, FURI_HAL_BT_ADV_NAME_LENGTH);
|
||||
} else {
|
||||
profile_config[profile].config.adv_name[0] = AD_TYPE_COMPLETE_LOCAL_NAME;
|
||||
memcpy(&(profile_config[profile].config.adv_name[1]), name, FURI_HAL_BT_ADV_NAME_LENGTH);
|
||||
strlcpy(&(profile_config[profile].config.adv_name[1]), name, FURI_HAL_BT_ADV_NAME_LENGTH);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
@@ -378,9 +378,6 @@ static void furi_hal_infrared_configure_tim_pwm_tx(uint32_t freq, float duty_cyc
|
||||
LL_TIM_EnableAllOutputs(INFRARED_DMA_TIMER);
|
||||
LL_TIM_DisableIT_UPDATE(INFRARED_DMA_TIMER);
|
||||
LL_TIM_EnableDMAReq_UPDATE(INFRARED_DMA_TIMER);
|
||||
|
||||
NVIC_SetPriority(TIM1_UP_TIM16_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(), 5, 0));
|
||||
NVIC_EnableIRQ(TIM1_UP_TIM16_IRQn);
|
||||
}
|
||||
|
||||
static void furi_hal_infrared_configure_tim_cmgr2_dma_tx(void) {
|
||||
|
||||
@@ -62,7 +62,7 @@ const IRQn_Type furi_hal_interrupt_irqn[FuriHalInterruptIdMax] = {
|
||||
|
||||
__attribute__((always_inline)) static inline void
|
||||
furi_hal_interrupt_call(FuriHalInterruptId index) {
|
||||
furi_assert(furi_hal_interrupt_isr[index].isr);
|
||||
furi_check(furi_hal_interrupt_isr[index].isr);
|
||||
furi_hal_interrupt_isr[index].isr(furi_hal_interrupt_isr[index].context);
|
||||
}
|
||||
|
||||
@@ -127,16 +127,14 @@ void furi_hal_interrupt_set_isr_ex(
|
||||
uint16_t priority,
|
||||
FuriHalInterruptISR isr,
|
||||
void* context) {
|
||||
furi_assert(index < FuriHalInterruptIdMax);
|
||||
furi_assert(priority < 15);
|
||||
furi_assert(furi_hal_interrupt_irqn[index]);
|
||||
furi_check(index < FuriHalInterruptIdMax);
|
||||
furi_check(priority <= 15);
|
||||
|
||||
if(isr) {
|
||||
// Pre ISR set
|
||||
furi_assert(furi_hal_interrupt_isr[index].isr == NULL);
|
||||
furi_check(furi_hal_interrupt_isr[index].isr == NULL);
|
||||
} else {
|
||||
// Pre ISR clear
|
||||
furi_assert(furi_hal_interrupt_isr[index].isr != NULL);
|
||||
furi_hal_interrupt_disable(index);
|
||||
furi_hal_interrupt_clear_pending(index);
|
||||
}
|
||||
|
||||
@@ -284,10 +284,15 @@ void furi_hal_power_reset() {
|
||||
NVIC_SystemReset();
|
||||
}
|
||||
|
||||
void furi_hal_power_enable_otg() {
|
||||
bool furi_hal_power_enable_otg() {
|
||||
furi_hal_i2c_acquire(&furi_hal_i2c_handle_power);
|
||||
bq25896_set_boost_lim(&furi_hal_i2c_handle_power, BoostLim_2150);
|
||||
bq25896_enable_otg(&furi_hal_i2c_handle_power);
|
||||
furi_delay_ms(30);
|
||||
bool ret = bq25896_is_otg_enabled(&furi_hal_i2c_handle_power);
|
||||
bq25896_set_boost_lim(&furi_hal_i2c_handle_power, BoostLim_1400);
|
||||
furi_hal_i2c_release(&furi_hal_i2c_handle_power);
|
||||
return ret;
|
||||
}
|
||||
|
||||
void furi_hal_power_disable_otg() {
|
||||
@@ -317,6 +322,13 @@ void furi_hal_power_set_battery_charge_voltage_limit(float voltage) {
|
||||
furi_hal_i2c_release(&furi_hal_i2c_handle_power);
|
||||
}
|
||||
|
||||
bool furi_hal_power_check_otg_fault() {
|
||||
furi_hal_i2c_acquire(&furi_hal_i2c_handle_power);
|
||||
bool ret = bq25896_check_otg_fault(&furi_hal_i2c_handle_power);
|
||||
furi_hal_i2c_release(&furi_hal_i2c_handle_power);
|
||||
return ret;
|
||||
}
|
||||
|
||||
void furi_hal_power_check_otg_status() {
|
||||
furi_hal_i2c_acquire(&furi_hal_i2c_handle_power);
|
||||
if(bq25896_check_otg_fault(&furi_hal_i2c_handle_power))
|
||||
|
||||
@@ -14,11 +14,9 @@ const GpioPin gpio_vibro = {.port = VIBRO_GPIO_Port, .pin = VIBRO_Pin};
|
||||
const GpioPin gpio_ibutton = {.port = iBTN_GPIO_Port, .pin = iBTN_Pin};
|
||||
|
||||
const GpioPin gpio_cc1101_g0 = {.port = CC1101_G0_GPIO_Port, .pin = CC1101_G0_Pin};
|
||||
const GpioPin gpio_cc1101_g0_ext = {.port = GPIOB, .pin = LL_GPIO_PIN_2};
|
||||
const GpioPin gpio_rf_sw_0 = {.port = RF_SW_0_GPIO_Port, .pin = RF_SW_0_Pin};
|
||||
|
||||
const GpioPin gpio_subghz_cs = {.port = CC1101_CS_GPIO_Port, .pin = CC1101_CS_Pin};
|
||||
const GpioPin gpio_subghz_cs_ext = {.port = GPIOA, .pin = LL_GPIO_PIN_4};
|
||||
const GpioPin gpio_display_cs = {.port = DISPLAY_CS_GPIO_Port, .pin = DISPLAY_CS_Pin};
|
||||
const GpioPin gpio_display_rst_n = {.port = DISPLAY_RST_GPIO_Port, .pin = DISPLAY_RST_Pin};
|
||||
const GpioPin gpio_display_di = {.port = DISPLAY_DI_GPIO_Port, .pin = DISPLAY_DI_Pin};
|
||||
@@ -39,9 +37,6 @@ const GpioPin gpio_spi_d_sck = {.port = SPI_D_SCK_GPIO_Port, .pin = SPI_D_SCK_Pi
|
||||
const GpioPin gpio_spi_r_miso = {.port = SPI_R_MISO_GPIO_Port, .pin = SPI_R_MISO_Pin};
|
||||
const GpioPin gpio_spi_r_mosi = {.port = SPI_R_MOSI_GPIO_Port, .pin = SPI_R_MOSI_Pin};
|
||||
const GpioPin gpio_spi_r_sck = {.port = SPI_R_SCK_GPIO_Port, .pin = SPI_R_SCK_Pin};
|
||||
const GpioPin gpio_spi_r_miso_ext = {.port = GPIOA, .pin = LL_GPIO_PIN_6};
|
||||
const GpioPin gpio_spi_r_mosi_ext = {.port = GPIOA, .pin = LL_GPIO_PIN_7};
|
||||
const GpioPin gpio_spi_r_sck_ext = {.port = GPIOB, .pin = LL_GPIO_PIN_3};
|
||||
|
||||
const GpioPin gpio_ext_pc0 = {.port = GPIOC, .pin = LL_GPIO_PIN_0};
|
||||
const GpioPin gpio_ext_pc1 = {.port = GPIOC, .pin = LL_GPIO_PIN_1};
|
||||
|
||||
@@ -57,11 +57,9 @@ extern const GpioPin gpio_vibro;
|
||||
extern const GpioPin gpio_ibutton;
|
||||
|
||||
extern const GpioPin gpio_cc1101_g0;
|
||||
extern const GpioPin gpio_cc1101_g0_ext;
|
||||
extern const GpioPin gpio_rf_sw_0;
|
||||
|
||||
extern const GpioPin gpio_subghz_cs;
|
||||
extern const GpioPin gpio_subghz_cs_ext;
|
||||
extern const GpioPin gpio_display_cs;
|
||||
extern const GpioPin gpio_display_rst_n;
|
||||
extern const GpioPin gpio_display_di;
|
||||
@@ -82,9 +80,6 @@ extern const GpioPin gpio_spi_d_sck;
|
||||
extern const GpioPin gpio_spi_r_miso;
|
||||
extern const GpioPin gpio_spi_r_mosi;
|
||||
extern const GpioPin gpio_spi_r_sck;
|
||||
extern const GpioPin gpio_spi_r_miso_ext;
|
||||
extern const GpioPin gpio_spi_r_mosi_ext;
|
||||
extern const GpioPin gpio_spi_r_sck_ext;
|
||||
|
||||
extern const GpioPin gpio_ext_pc0;
|
||||
extern const GpioPin gpio_ext_pc1;
|
||||
|
||||
@@ -3,7 +3,6 @@
|
||||
#include <furi_hal_spi.h>
|
||||
#include <furi_hal_bus.h>
|
||||
#include <furi.h>
|
||||
#include <furi_hal_subghz.h>
|
||||
|
||||
#define TAG "FuriHalSpiConfig"
|
||||
|
||||
@@ -91,7 +90,7 @@ void furi_hal_spi_config_deinit_early() {
|
||||
void furi_hal_spi_config_init() {
|
||||
furi_hal_spi_bus_init(&furi_hal_spi_bus_r);
|
||||
|
||||
furi_hal_spi_bus_handle_init(furi_hal_subghz.spi_bus_handle);
|
||||
furi_hal_spi_bus_handle_init(&furi_hal_spi_bus_handle_subghz);
|
||||
furi_hal_spi_bus_handle_init(&furi_hal_spi_bus_handle_nfc);
|
||||
furi_hal_spi_bus_handle_init(&furi_hal_spi_bus_handle_sd_fast);
|
||||
furi_hal_spi_bus_handle_init(&furi_hal_spi_bus_handle_sd_slow);
|
||||
@@ -193,6 +192,52 @@ inline static void furi_hal_spi_bus_r_handle_event_callback(
|
||||
}
|
||||
}
|
||||
|
||||
inline static void furi_hal_spi_bus_external_handle_event_callback(
|
||||
FuriHalSpiBusHandle* handle,
|
||||
FuriHalSpiBusHandleEvent event,
|
||||
const LL_SPI_InitTypeDef* preset) {
|
||||
if(event == FuriHalSpiBusHandleEventInit) {
|
||||
furi_hal_gpio_write(handle->cs, true);
|
||||
furi_hal_gpio_init(handle->cs, GpioModeOutputPushPull, GpioPullUp, GpioSpeedVeryHigh);
|
||||
} else if(event == FuriHalSpiBusHandleEventDeinit) {
|
||||
furi_hal_gpio_write(handle->cs, true);
|
||||
furi_hal_gpio_init(handle->cs, GpioModeAnalog, GpioPullNo, GpioSpeedLow);
|
||||
} else if(event == FuriHalSpiBusHandleEventActivate) {
|
||||
LL_SPI_Init(handle->bus->spi, (LL_SPI_InitTypeDef*)preset);
|
||||
LL_SPI_SetRxFIFOThreshold(handle->bus->spi, LL_SPI_RX_FIFO_TH_QUARTER);
|
||||
LL_SPI_Enable(handle->bus->spi);
|
||||
|
||||
furi_hal_gpio_init_ex(
|
||||
handle->miso,
|
||||
GpioModeAltFunctionPushPull,
|
||||
GpioPullDown,
|
||||
GpioSpeedVeryHigh,
|
||||
GpioAltFn5SPI1);
|
||||
furi_hal_gpio_init_ex(
|
||||
handle->mosi,
|
||||
GpioModeAltFunctionPushPull,
|
||||
GpioPullDown,
|
||||
GpioSpeedVeryHigh,
|
||||
GpioAltFn5SPI1);
|
||||
furi_hal_gpio_init_ex(
|
||||
handle->sck,
|
||||
GpioModeAltFunctionPushPull,
|
||||
GpioPullDown,
|
||||
GpioSpeedVeryHigh,
|
||||
GpioAltFn5SPI1);
|
||||
|
||||
furi_hal_gpio_write(handle->cs, false);
|
||||
} else if(event == FuriHalSpiBusHandleEventDeactivate) {
|
||||
furi_hal_gpio_write(handle->cs, true);
|
||||
|
||||
furi_hal_gpio_init(handle->miso, GpioModeAnalog, GpioPullNo, GpioSpeedLow);
|
||||
furi_hal_gpio_init(handle->mosi, GpioModeAnalog, GpioPullNo, GpioSpeedLow);
|
||||
furi_hal_gpio_init(handle->sck, GpioModeAnalog, GpioPullNo, GpioSpeedLow);
|
||||
|
||||
LL_SPI_Disable(handle->bus->spi);
|
||||
}
|
||||
}
|
||||
|
||||
inline static void furi_hal_spi_bus_nfc_handle_event_callback(
|
||||
FuriHalSpiBusHandle* handle,
|
||||
FuriHalSpiBusHandleEvent event,
|
||||
@@ -265,15 +310,6 @@ static void furi_hal_spi_bus_handle_subghz_event_callback(
|
||||
furi_hal_spi_bus_r_handle_event_callback(handle, event, &furi_hal_spi_preset_1edge_low_8m);
|
||||
}
|
||||
|
||||
FuriHalSpiBusHandle furi_hal_spi_bus_handle_subghz_int = {
|
||||
.bus = &furi_hal_spi_bus_r,
|
||||
.callback = furi_hal_spi_bus_handle_subghz_event_callback,
|
||||
.miso = &gpio_spi_r_miso,
|
||||
.mosi = &gpio_spi_r_mosi,
|
||||
.sck = &gpio_spi_r_sck,
|
||||
.cs = &gpio_subghz_cs,
|
||||
};
|
||||
|
||||
FuriHalSpiBusHandle furi_hal_spi_bus_handle_subghz = {
|
||||
.bus = &furi_hal_spi_bus_r,
|
||||
.callback = furi_hal_spi_bus_handle_subghz_event_callback,
|
||||
@@ -283,15 +319,6 @@ FuriHalSpiBusHandle furi_hal_spi_bus_handle_subghz = {
|
||||
.cs = &gpio_subghz_cs,
|
||||
};
|
||||
|
||||
FuriHalSpiBusHandle furi_hal_spi_bus_handle_subghz_ext = {
|
||||
.bus = &furi_hal_spi_bus_r,
|
||||
.callback = furi_hal_spi_bus_handle_subghz_event_callback,
|
||||
.miso = &gpio_ext_pa6,
|
||||
.mosi = &gpio_ext_pa7,
|
||||
.sck = &gpio_ext_pb3,
|
||||
.cs = &gpio_ext_pa4,
|
||||
};
|
||||
|
||||
static void furi_hal_spi_bus_handle_nfc_event_callback(
|
||||
FuriHalSpiBusHandle* handle,
|
||||
FuriHalSpiBusHandleEvent event) {
|
||||
@@ -310,7 +337,8 @@ FuriHalSpiBusHandle furi_hal_spi_bus_handle_nfc = {
|
||||
static void furi_hal_spi_bus_handle_external_event_callback(
|
||||
FuriHalSpiBusHandle* handle,
|
||||
FuriHalSpiBusHandleEvent event) {
|
||||
furi_hal_spi_bus_r_handle_event_callback(handle, event, &furi_hal_spi_preset_1edge_low_2m);
|
||||
furi_hal_spi_bus_external_handle_event_callback(
|
||||
handle, event, &furi_hal_spi_preset_1edge_low_2m);
|
||||
}
|
||||
|
||||
FuriHalSpiBusHandle furi_hal_spi_bus_handle_external = {
|
||||
|
||||
@@ -27,12 +27,8 @@ extern FuriHalSpiBus furi_hal_spi_bus_r;
|
||||
/** Furi Hal Spi Bus D (Display, SdCard) */
|
||||
extern FuriHalSpiBus furi_hal_spi_bus_d;
|
||||
|
||||
/** CC1101 on current SPI bus */
|
||||
extern FuriHalSpiBusHandle furi_hal_spi_bus_handle_subghz;
|
||||
/** CC1101 on `furi_hal_spi_bus_r` */
|
||||
extern FuriHalSpiBusHandle furi_hal_spi_bus_handle_subghz_int;
|
||||
/** CC1101 on external `furi_hal_spi_bus_r` */
|
||||
extern FuriHalSpiBusHandle furi_hal_spi_bus_handle_subghz_ext;
|
||||
extern FuriHalSpiBusHandle furi_hal_spi_bus_handle_subghz;
|
||||
|
||||
/** ST25R3916 on `furi_hal_spi_bus_r` */
|
||||
extern FuriHalSpiBusHandle furi_hal_spi_bus_handle_nfc;
|
||||
|
||||
@@ -1,25 +1,20 @@
|
||||
#include <furi_hal_subghz.h>
|
||||
#include <furi_hal_subghz_configs.h>
|
||||
#include <lib/subghz/devices/cc1101_configs.h>
|
||||
|
||||
#include <furi_hal_version.h>
|
||||
#include <furi_hal_rtc.h>
|
||||
#include <furi_hal_spi.h>
|
||||
#include <furi_hal_interrupt.h>
|
||||
#include <furi_hal_resources.h>
|
||||
#include <furi_hal_power.h>
|
||||
#include <furi_hal_bus.h>
|
||||
|
||||
#include <stm32wbxx_ll_dma.h>
|
||||
|
||||
#include <lib/flipper_format/flipper_format.h>
|
||||
|
||||
#include <furi.h>
|
||||
#include <cc1101.h>
|
||||
#include <stdio.h>
|
||||
|
||||
#define TAG "FuriHalSubGhz"
|
||||
//Initialisation timeout (ms)
|
||||
#define INIT_TIMEOUT 10
|
||||
|
||||
static uint32_t furi_hal_subghz_debug_gpio_buff[2];
|
||||
|
||||
@@ -31,48 +26,46 @@ static uint32_t furi_hal_subghz_debug_gpio_buff[2];
|
||||
#define SUBGHZ_DMA_CH1_DEF SUBGHZ_DMA, SUBGHZ_DMA_CH1_CHANNEL
|
||||
#define SUBGHZ_DMA_CH2_DEF SUBGHZ_DMA, SUBGHZ_DMA_CH2_CHANNEL
|
||||
|
||||
/** SubGhz state */
|
||||
typedef enum {
|
||||
SubGhzStateInit, /**< Init pending */
|
||||
|
||||
SubGhzStateIdle, /**< Idle, energy save mode */
|
||||
|
||||
SubGhzStateAsyncRx, /**< Async RX started */
|
||||
|
||||
SubGhzStateAsyncTx, /**< Async TX started, DMA and timer is on */
|
||||
SubGhzStateAsyncTxLast, /**< Async TX continue, DMA completed and timer got last value to go */
|
||||
SubGhzStateAsyncTxEnd, /**< Async TX complete, cleanup needed */
|
||||
|
||||
} SubGhzState;
|
||||
|
||||
/** SubGhz regulation, receive transmission on the current frequency for the
|
||||
* region */
|
||||
typedef enum {
|
||||
SubGhzRegulationOnlyRx, /**only Rx*/
|
||||
SubGhzRegulationTxRx, /**TxRx*/
|
||||
} SubGhzRegulation;
|
||||
|
||||
typedef struct {
|
||||
volatile SubGhzState state;
|
||||
volatile SubGhzRegulation regulation;
|
||||
const GpioPin* async_mirror_pin;
|
||||
|
||||
uint8_t rolling_counter_mult;
|
||||
bool timestamp_file_names : 1;
|
||||
bool dangerous_frequency_i : 1;
|
||||
} FuriHalSubGhz;
|
||||
|
||||
volatile FuriHalSubGhz furi_hal_subghz = {
|
||||
.state = SubGhzStateInit,
|
||||
.regulation = SubGhzRegulationTxRx,
|
||||
.preset = FuriHalSubGhzPresetIDLE,
|
||||
.async_mirror_pin = NULL,
|
||||
.radio_type = SubGhzRadioInternal,
|
||||
.spi_bus_handle = &furi_hal_spi_bus_handle_subghz,
|
||||
.cc1101_g0_pin = &gpio_cc1101_g0,
|
||||
.rolling_counter_mult = 1,
|
||||
.ext_module_power_disabled = false,
|
||||
.extended_frequency_i = false,
|
||||
.dangerous_frequency_i = false,
|
||||
};
|
||||
|
||||
void furi_hal_subghz_select_radio_type(SubGhzRadioType state) {
|
||||
furi_hal_subghz.radio_type = state;
|
||||
}
|
||||
|
||||
bool furi_hal_subghz_init_radio_type(SubGhzRadioType state) {
|
||||
if(state == SubGhzRadioInternal && furi_hal_subghz.cc1101_g0_pin == &gpio_cc1101_g0) {
|
||||
return true;
|
||||
} else if(state == SubGhzRadioExternal && furi_hal_subghz.cc1101_g0_pin == &gpio_cc1101_g0_ext) {
|
||||
return true;
|
||||
}
|
||||
furi_hal_spi_bus_handle_deinit(furi_hal_subghz.spi_bus_handle);
|
||||
|
||||
if(state == SubGhzRadioInternal) {
|
||||
furi_hal_subghz.spi_bus_handle = &furi_hal_spi_bus_handle_subghz;
|
||||
furi_hal_subghz.cc1101_g0_pin = &gpio_cc1101_g0;
|
||||
} else {
|
||||
furi_hal_subghz.spi_bus_handle = &furi_hal_spi_bus_handle_subghz_ext;
|
||||
furi_hal_subghz.cc1101_g0_pin = &gpio_cc1101_g0_ext;
|
||||
}
|
||||
|
||||
furi_hal_spi_bus_handle_init(furi_hal_subghz.spi_bus_handle);
|
||||
furi_hal_subghz_init_check();
|
||||
return true;
|
||||
}
|
||||
|
||||
SubGhzRadioType furi_hal_subghz_get_radio_type(void) {
|
||||
return furi_hal_subghz.radio_type;
|
||||
}
|
||||
|
||||
uint8_t furi_hal_subghz_get_rolling_counter_mult(void) {
|
||||
return furi_hal_subghz.rolling_counter_mult;
|
||||
}
|
||||
@@ -89,143 +82,84 @@ bool furi_hal_subghz_get_external_power_disable(void) {
|
||||
return furi_hal_subghz.ext_module_power_disabled;
|
||||
}
|
||||
|
||||
void furi_hal_subghz_set_extended_frequency(bool state_i) {
|
||||
furi_hal_subghz.extended_frequency_i = state_i;
|
||||
void furi_hal_subghz_set_dangerous_frequency(bool state_i) {
|
||||
furi_hal_subghz.dangerous_frequency_i = state_i;
|
||||
}
|
||||
|
||||
void furi_hal_subghz_set_async_mirror_pin(const GpioPin* pin) {
|
||||
furi_hal_subghz.async_mirror_pin = pin;
|
||||
}
|
||||
|
||||
void furi_hal_subghz_init(void) {
|
||||
furi_hal_subghz_init_check();
|
||||
const GpioPin* furi_hal_subghz_get_data_gpio() {
|
||||
return &gpio_cc1101_g0;
|
||||
}
|
||||
|
||||
bool furi_hal_subghz_enable_ext_power(void) {
|
||||
if(furi_hal_subghz.ext_module_power_disabled) {
|
||||
return false;
|
||||
}
|
||||
if(furi_hal_subghz.radio_type != SubGhzRadioInternal) {
|
||||
uint8_t attempts = 0;
|
||||
while(!furi_hal_power_is_otg_enabled() && attempts++ < 5) {
|
||||
furi_hal_power_enable_otg();
|
||||
//CC1101 power-up time
|
||||
furi_delay_ms(10);
|
||||
}
|
||||
}
|
||||
return furi_hal_power_is_otg_enabled();
|
||||
}
|
||||
|
||||
void furi_hal_subghz_disable_ext_power(void) {
|
||||
if(furi_hal_power_is_otg_enabled()) {
|
||||
furi_hal_power_disable_otg();
|
||||
}
|
||||
}
|
||||
|
||||
bool furi_hal_subghz_check_radio(void) {
|
||||
bool result = true;
|
||||
|
||||
furi_hal_subghz_init_radio_type(furi_hal_subghz.radio_type);
|
||||
|
||||
furi_hal_spi_acquire(furi_hal_subghz.spi_bus_handle);
|
||||
|
||||
uint8_t ver = cc1101_get_version(furi_hal_subghz.spi_bus_handle);
|
||||
furi_hal_spi_release(furi_hal_subghz.spi_bus_handle);
|
||||
|
||||
if((ver != 0) && (ver != 255)) {
|
||||
FURI_LOG_D(TAG, "Radio check ok");
|
||||
} else {
|
||||
FURI_LOG_D(TAG, "Radio check failed, revert to default");
|
||||
|
||||
result = false;
|
||||
}
|
||||
return result;
|
||||
}
|
||||
|
||||
bool furi_hal_subghz_init_check(void) {
|
||||
bool result = true;
|
||||
|
||||
void furi_hal_subghz_init() {
|
||||
furi_assert(furi_hal_subghz.state == SubGhzStateInit);
|
||||
furi_hal_subghz.state = SubGhzStateIdle;
|
||||
furi_hal_subghz.preset = FuriHalSubGhzPresetIDLE;
|
||||
|
||||
furi_hal_spi_acquire(furi_hal_subghz.spi_bus_handle);
|
||||
furi_hal_spi_acquire(&furi_hal_spi_bus_handle_subghz);
|
||||
|
||||
#ifdef FURI_HAL_SUBGHZ_TX_GPIO
|
||||
furi_hal_gpio_init(&FURI_HAL_SUBGHZ_TX_GPIO, GpioModeOutputPushPull, GpioPullNo, GpioSpeedLow);
|
||||
#endif
|
||||
|
||||
// Reset
|
||||
furi_hal_gpio_init(furi_hal_subghz.cc1101_g0_pin, GpioModeAnalog, GpioPullNo, GpioSpeedLow);
|
||||
cc1101_reset(furi_hal_subghz.spi_bus_handle);
|
||||
cc1101_write_reg(furi_hal_subghz.spi_bus_handle, CC1101_IOCFG0, CC1101IocfgHighImpedance);
|
||||
furi_hal_gpio_init(&gpio_cc1101_g0, GpioModeAnalog, GpioPullNo, GpioSpeedLow);
|
||||
cc1101_reset(&furi_hal_spi_bus_handle_subghz);
|
||||
cc1101_write_reg(&furi_hal_spi_bus_handle_subghz, CC1101_IOCFG0, CC1101IocfgHighImpedance);
|
||||
|
||||
// Prepare GD0 for power on self test
|
||||
furi_hal_gpio_init(furi_hal_subghz.cc1101_g0_pin, GpioModeInput, GpioPullNo, GpioSpeedLow);
|
||||
furi_hal_gpio_init(&gpio_cc1101_g0, GpioModeInput, GpioPullNo, GpioSpeedLow);
|
||||
|
||||
// GD0 low
|
||||
cc1101_write_reg(furi_hal_subghz.spi_bus_handle, CC1101_IOCFG0, CC1101IocfgHW);
|
||||
uint32_t test_start_time = furi_get_tick();
|
||||
while(furi_hal_gpio_read(furi_hal_subghz.cc1101_g0_pin) != false && result) {
|
||||
if(furi_get_tick() - test_start_time > INIT_TIMEOUT) {
|
||||
result = false;
|
||||
}
|
||||
}
|
||||
cc1101_write_reg(&furi_hal_spi_bus_handle_subghz, CC1101_IOCFG0, CC1101IocfgHW);
|
||||
while(furi_hal_gpio_read(&gpio_cc1101_g0) != false)
|
||||
;
|
||||
|
||||
// GD0 high
|
||||
cc1101_write_reg(
|
||||
furi_hal_subghz.spi_bus_handle, CC1101_IOCFG0, CC1101IocfgHW | CC1101_IOCFG_INV);
|
||||
test_start_time = furi_get_tick();
|
||||
while(furi_hal_gpio_read(furi_hal_subghz.cc1101_g0_pin) != true && result) {
|
||||
if(furi_get_tick() - test_start_time > INIT_TIMEOUT) {
|
||||
result = false;
|
||||
}
|
||||
}
|
||||
&furi_hal_spi_bus_handle_subghz, CC1101_IOCFG0, CC1101IocfgHW | CC1101_IOCFG_INV);
|
||||
while(furi_hal_gpio_read(&gpio_cc1101_g0) != true)
|
||||
;
|
||||
|
||||
// Reset GD0 to floating state
|
||||
cc1101_write_reg(furi_hal_subghz.spi_bus_handle, CC1101_IOCFG0, CC1101IocfgHighImpedance);
|
||||
furi_hal_gpio_init(furi_hal_subghz.cc1101_g0_pin, GpioModeAnalog, GpioPullNo, GpioSpeedLow);
|
||||
cc1101_write_reg(&furi_hal_spi_bus_handle_subghz, CC1101_IOCFG0, CC1101IocfgHighImpedance);
|
||||
furi_hal_gpio_init(&gpio_cc1101_g0, GpioModeAnalog, GpioPullNo, GpioSpeedLow);
|
||||
|
||||
// RF switches
|
||||
furi_hal_gpio_init(&gpio_rf_sw_0, GpioModeOutputPushPull, GpioPullNo, GpioSpeedLow);
|
||||
cc1101_write_reg(furi_hal_subghz.spi_bus_handle, CC1101_IOCFG2, CC1101IocfgHW);
|
||||
cc1101_write_reg(&furi_hal_spi_bus_handle_subghz, CC1101_IOCFG2, CC1101IocfgHW);
|
||||
|
||||
// Go to sleep
|
||||
cc1101_shutdown(furi_hal_subghz.spi_bus_handle);
|
||||
cc1101_shutdown(&furi_hal_spi_bus_handle_subghz);
|
||||
|
||||
furi_hal_spi_release(furi_hal_subghz.spi_bus_handle);
|
||||
|
||||
if(result) {
|
||||
FURI_LOG_I(TAG, "Init OK");
|
||||
} else {
|
||||
FURI_LOG_E(TAG, "Selected CC1101 module init failed, revert to default");
|
||||
}
|
||||
return result;
|
||||
furi_hal_spi_release(&furi_hal_spi_bus_handle_subghz);
|
||||
FURI_LOG_I(TAG, "Init OK");
|
||||
}
|
||||
|
||||
void furi_hal_subghz_sleep() {
|
||||
furi_assert(furi_hal_subghz.state == SubGhzStateIdle);
|
||||
furi_hal_spi_acquire(furi_hal_subghz.spi_bus_handle);
|
||||
furi_hal_spi_acquire(&furi_hal_spi_bus_handle_subghz);
|
||||
|
||||
cc1101_switch_to_idle(furi_hal_subghz.spi_bus_handle);
|
||||
cc1101_switch_to_idle(&furi_hal_spi_bus_handle_subghz);
|
||||
|
||||
cc1101_write_reg(furi_hal_subghz.spi_bus_handle, CC1101_IOCFG0, CC1101IocfgHighImpedance);
|
||||
furi_hal_gpio_init(furi_hal_subghz.cc1101_g0_pin, GpioModeAnalog, GpioPullNo, GpioSpeedLow);
|
||||
cc1101_write_reg(&furi_hal_spi_bus_handle_subghz, CC1101_IOCFG0, CC1101IocfgHighImpedance);
|
||||
furi_hal_gpio_init(&gpio_cc1101_g0, GpioModeAnalog, GpioPullNo, GpioSpeedLow);
|
||||
|
||||
cc1101_shutdown(furi_hal_subghz.spi_bus_handle);
|
||||
cc1101_shutdown(&furi_hal_spi_bus_handle_subghz);
|
||||
|
||||
furi_hal_spi_release(furi_hal_subghz.spi_bus_handle);
|
||||
|
||||
furi_hal_subghz.preset = FuriHalSubGhzPresetIDLE;
|
||||
furi_hal_spi_release(&furi_hal_spi_bus_handle_subghz);
|
||||
}
|
||||
|
||||
void furi_hal_subghz_dump_state() {
|
||||
furi_hal_spi_acquire(furi_hal_subghz.spi_bus_handle);
|
||||
furi_hal_spi_acquire(&furi_hal_spi_bus_handle_subghz);
|
||||
printf(
|
||||
"[furi_hal_subghz] cc1101 chip %d, version %d\r\n",
|
||||
cc1101_get_partnumber(furi_hal_subghz.spi_bus_handle),
|
||||
cc1101_get_version(furi_hal_subghz.spi_bus_handle));
|
||||
furi_hal_spi_release(furi_hal_subghz.spi_bus_handle);
|
||||
cc1101_get_partnumber(&furi_hal_spi_bus_handle_subghz),
|
||||
cc1101_get_version(&furi_hal_spi_bus_handle_subghz));
|
||||
furi_hal_spi_release(&furi_hal_spi_bus_handle_subghz);
|
||||
}
|
||||
|
||||
void furi_hal_subghz_load_preset(FuriHalSubGhzPreset preset) {
|
||||
@@ -257,15 +191,15 @@ void furi_hal_subghz_load_preset(FuriHalSubGhzPreset preset) {
|
||||
|
||||
void furi_hal_subghz_load_custom_preset(uint8_t* preset_data) {
|
||||
//load config
|
||||
furi_hal_spi_acquire(furi_hal_subghz.spi_bus_handle);
|
||||
cc1101_reset(furi_hal_subghz.spi_bus_handle);
|
||||
furi_hal_spi_acquire(&furi_hal_spi_bus_handle_subghz);
|
||||
cc1101_reset(&furi_hal_spi_bus_handle_subghz);
|
||||
uint32_t i = 0;
|
||||
uint8_t pa[8] = {0};
|
||||
while(preset_data[i]) {
|
||||
cc1101_write_reg(furi_hal_subghz.spi_bus_handle, preset_data[i], preset_data[i + 1]);
|
||||
cc1101_write_reg(&furi_hal_spi_bus_handle_subghz, preset_data[i], preset_data[i + 1]);
|
||||
i += 2;
|
||||
}
|
||||
furi_hal_spi_release(furi_hal_subghz.spi_bus_handle);
|
||||
furi_hal_spi_release(&furi_hal_spi_bus_handle_subghz);
|
||||
|
||||
//load pa table
|
||||
memcpy(&pa[0], &preset_data[i + 2], 8);
|
||||
@@ -286,49 +220,49 @@ void furi_hal_subghz_load_custom_preset(uint8_t* preset_data) {
|
||||
}
|
||||
}
|
||||
|
||||
void furi_hal_subghz_load_registers(uint8_t* data) {
|
||||
furi_hal_spi_acquire(furi_hal_subghz.spi_bus_handle);
|
||||
cc1101_reset(furi_hal_subghz.spi_bus_handle);
|
||||
void furi_hal_subghz_load_registers(const uint8_t* data) {
|
||||
furi_hal_spi_acquire(&furi_hal_spi_bus_handle_subghz);
|
||||
cc1101_reset(&furi_hal_spi_bus_handle_subghz);
|
||||
uint32_t i = 0;
|
||||
while(data[i]) {
|
||||
cc1101_write_reg(furi_hal_subghz.spi_bus_handle, data[i], data[i + 1]);
|
||||
cc1101_write_reg(&furi_hal_spi_bus_handle_subghz, data[i], data[i + 1]);
|
||||
i += 2;
|
||||
}
|
||||
furi_hal_spi_release(furi_hal_subghz.spi_bus_handle);
|
||||
furi_hal_spi_release(&furi_hal_spi_bus_handle_subghz);
|
||||
}
|
||||
|
||||
void furi_hal_subghz_load_patable(const uint8_t data[8]) {
|
||||
furi_hal_spi_acquire(furi_hal_subghz.spi_bus_handle);
|
||||
cc1101_set_pa_table(furi_hal_subghz.spi_bus_handle, data);
|
||||
furi_hal_spi_release(furi_hal_subghz.spi_bus_handle);
|
||||
furi_hal_spi_acquire(&furi_hal_spi_bus_handle_subghz);
|
||||
cc1101_set_pa_table(&furi_hal_spi_bus_handle_subghz, data);
|
||||
furi_hal_spi_release(&furi_hal_spi_bus_handle_subghz);
|
||||
}
|
||||
|
||||
void furi_hal_subghz_write_packet(const uint8_t* data, uint8_t size) {
|
||||
furi_hal_spi_acquire(furi_hal_subghz.spi_bus_handle);
|
||||
cc1101_flush_tx(furi_hal_subghz.spi_bus_handle);
|
||||
cc1101_write_reg(furi_hal_subghz.spi_bus_handle, CC1101_FIFO, size);
|
||||
cc1101_write_fifo(furi_hal_subghz.spi_bus_handle, data, size);
|
||||
furi_hal_spi_release(furi_hal_subghz.spi_bus_handle);
|
||||
furi_hal_spi_acquire(&furi_hal_spi_bus_handle_subghz);
|
||||
cc1101_flush_tx(&furi_hal_spi_bus_handle_subghz);
|
||||
cc1101_write_reg(&furi_hal_spi_bus_handle_subghz, CC1101_FIFO, size);
|
||||
cc1101_write_fifo(&furi_hal_spi_bus_handle_subghz, data, size);
|
||||
furi_hal_spi_release(&furi_hal_spi_bus_handle_subghz);
|
||||
}
|
||||
|
||||
void furi_hal_subghz_flush_rx() {
|
||||
furi_hal_spi_acquire(furi_hal_subghz.spi_bus_handle);
|
||||
cc1101_flush_rx(furi_hal_subghz.spi_bus_handle);
|
||||
furi_hal_spi_release(furi_hal_subghz.spi_bus_handle);
|
||||
furi_hal_spi_acquire(&furi_hal_spi_bus_handle_subghz);
|
||||
cc1101_flush_rx(&furi_hal_spi_bus_handle_subghz);
|
||||
furi_hal_spi_release(&furi_hal_spi_bus_handle_subghz);
|
||||
}
|
||||
|
||||
void furi_hal_subghz_flush_tx() {
|
||||
furi_hal_spi_acquire(furi_hal_subghz.spi_bus_handle);
|
||||
cc1101_flush_tx(furi_hal_subghz.spi_bus_handle);
|
||||
furi_hal_spi_release(furi_hal_subghz.spi_bus_handle);
|
||||
furi_hal_spi_acquire(&furi_hal_spi_bus_handle_subghz);
|
||||
cc1101_flush_tx(&furi_hal_spi_bus_handle_subghz);
|
||||
furi_hal_spi_release(&furi_hal_spi_bus_handle_subghz);
|
||||
}
|
||||
|
||||
bool furi_hal_subghz_rx_pipe_not_empty() {
|
||||
CC1101RxBytes status[1];
|
||||
furi_hal_spi_acquire(furi_hal_subghz.spi_bus_handle);
|
||||
furi_hal_spi_acquire(&furi_hal_spi_bus_handle_subghz);
|
||||
cc1101_read_reg(
|
||||
furi_hal_subghz.spi_bus_handle, (CC1101_STATUS_RXBYTES) | CC1101_BURST, (uint8_t*)status);
|
||||
furi_hal_spi_release(furi_hal_subghz.spi_bus_handle);
|
||||
&furi_hal_spi_bus_handle_subghz, (CC1101_STATUS_RXBYTES) | CC1101_BURST, (uint8_t*)status);
|
||||
furi_hal_spi_release(&furi_hal_spi_bus_handle_subghz);
|
||||
// TODO: you can add a buffer overflow flag if needed
|
||||
if(status->NUM_RXBYTES > 0) {
|
||||
return true;
|
||||
@@ -338,10 +272,10 @@ bool furi_hal_subghz_rx_pipe_not_empty() {
|
||||
}
|
||||
|
||||
bool furi_hal_subghz_is_rx_data_crc_valid() {
|
||||
furi_hal_spi_acquire(furi_hal_subghz.spi_bus_handle);
|
||||
furi_hal_spi_acquire(&furi_hal_spi_bus_handle_subghz);
|
||||
uint8_t data[1];
|
||||
cc1101_read_reg(furi_hal_subghz.spi_bus_handle, CC1101_STATUS_LQI | CC1101_BURST, data);
|
||||
furi_hal_spi_release(furi_hal_subghz.spi_bus_handle);
|
||||
cc1101_read_reg(&furi_hal_spi_bus_handle_subghz, CC1101_STATUS_LQI | CC1101_BURST, data);
|
||||
furi_hal_spi_release(&furi_hal_spi_bus_handle_subghz);
|
||||
if(((data[0] >> 7) & 0x01)) {
|
||||
return true;
|
||||
} else {
|
||||
@@ -350,51 +284,51 @@ bool furi_hal_subghz_is_rx_data_crc_valid() {
|
||||
}
|
||||
|
||||
void furi_hal_subghz_read_packet(uint8_t* data, uint8_t* size) {
|
||||
furi_hal_spi_acquire(furi_hal_subghz.spi_bus_handle);
|
||||
cc1101_read_fifo(furi_hal_subghz.spi_bus_handle, data, size);
|
||||
furi_hal_spi_release(furi_hal_subghz.spi_bus_handle);
|
||||
furi_hal_spi_acquire(&furi_hal_spi_bus_handle_subghz);
|
||||
cc1101_read_fifo(&furi_hal_spi_bus_handle_subghz, data, size);
|
||||
furi_hal_spi_release(&furi_hal_spi_bus_handle_subghz);
|
||||
}
|
||||
|
||||
void furi_hal_subghz_shutdown() {
|
||||
furi_hal_spi_acquire(furi_hal_subghz.spi_bus_handle);
|
||||
furi_hal_spi_acquire(&furi_hal_spi_bus_handle_subghz);
|
||||
// Reset and shutdown
|
||||
cc1101_shutdown(furi_hal_subghz.spi_bus_handle);
|
||||
furi_hal_spi_release(furi_hal_subghz.spi_bus_handle);
|
||||
cc1101_shutdown(&furi_hal_spi_bus_handle_subghz);
|
||||
furi_hal_spi_release(&furi_hal_spi_bus_handle_subghz);
|
||||
}
|
||||
|
||||
void furi_hal_subghz_reset() {
|
||||
furi_hal_spi_acquire(furi_hal_subghz.spi_bus_handle);
|
||||
furi_hal_gpio_init(furi_hal_subghz.cc1101_g0_pin, GpioModeAnalog, GpioPullNo, GpioSpeedLow);
|
||||
cc1101_switch_to_idle(furi_hal_subghz.spi_bus_handle);
|
||||
cc1101_reset(furi_hal_subghz.spi_bus_handle);
|
||||
cc1101_write_reg(furi_hal_subghz.spi_bus_handle, CC1101_IOCFG0, CC1101IocfgHighImpedance);
|
||||
furi_hal_spi_release(furi_hal_subghz.spi_bus_handle);
|
||||
furi_hal_spi_acquire(&furi_hal_spi_bus_handle_subghz);
|
||||
furi_hal_gpio_init(&gpio_cc1101_g0, GpioModeAnalog, GpioPullNo, GpioSpeedLow);
|
||||
cc1101_switch_to_idle(&furi_hal_spi_bus_handle_subghz);
|
||||
cc1101_reset(&furi_hal_spi_bus_handle_subghz);
|
||||
cc1101_write_reg(&furi_hal_spi_bus_handle_subghz, CC1101_IOCFG0, CC1101IocfgHighImpedance);
|
||||
furi_hal_spi_release(&furi_hal_spi_bus_handle_subghz);
|
||||
}
|
||||
|
||||
void furi_hal_subghz_idle() {
|
||||
furi_hal_spi_acquire(furi_hal_subghz.spi_bus_handle);
|
||||
cc1101_switch_to_idle(furi_hal_subghz.spi_bus_handle);
|
||||
furi_hal_spi_release(furi_hal_subghz.spi_bus_handle);
|
||||
furi_hal_spi_acquire(&furi_hal_spi_bus_handle_subghz);
|
||||
cc1101_switch_to_idle(&furi_hal_spi_bus_handle_subghz);
|
||||
furi_hal_spi_release(&furi_hal_spi_bus_handle_subghz);
|
||||
}
|
||||
|
||||
void furi_hal_subghz_rx() {
|
||||
furi_hal_spi_acquire(furi_hal_subghz.spi_bus_handle);
|
||||
cc1101_switch_to_rx(furi_hal_subghz.spi_bus_handle);
|
||||
furi_hal_spi_release(furi_hal_subghz.spi_bus_handle);
|
||||
furi_hal_spi_acquire(&furi_hal_spi_bus_handle_subghz);
|
||||
cc1101_switch_to_rx(&furi_hal_spi_bus_handle_subghz);
|
||||
furi_hal_spi_release(&furi_hal_spi_bus_handle_subghz);
|
||||
}
|
||||
|
||||
bool furi_hal_subghz_tx() {
|
||||
if(furi_hal_subghz.regulation != SubGhzRegulationTxRx) return false;
|
||||
furi_hal_spi_acquire(furi_hal_subghz.spi_bus_handle);
|
||||
cc1101_switch_to_tx(furi_hal_subghz.spi_bus_handle);
|
||||
furi_hal_spi_release(furi_hal_subghz.spi_bus_handle);
|
||||
furi_hal_spi_acquire(&furi_hal_spi_bus_handle_subghz);
|
||||
cc1101_switch_to_tx(&furi_hal_spi_bus_handle_subghz);
|
||||
furi_hal_spi_release(&furi_hal_spi_bus_handle_subghz);
|
||||
return true;
|
||||
}
|
||||
|
||||
float furi_hal_subghz_get_rssi() {
|
||||
furi_hal_spi_acquire(furi_hal_subghz.spi_bus_handle);
|
||||
int32_t rssi_dec = cc1101_get_rssi(furi_hal_subghz.spi_bus_handle);
|
||||
furi_hal_spi_release(furi_hal_subghz.spi_bus_handle);
|
||||
furi_hal_spi_acquire(&furi_hal_spi_bus_handle_subghz);
|
||||
int32_t rssi_dec = cc1101_get_rssi(&furi_hal_spi_bus_handle_subghz);
|
||||
furi_hal_spi_release(&furi_hal_spi_bus_handle_subghz);
|
||||
|
||||
float rssi = rssi_dec;
|
||||
if(rssi_dec >= 128) {
|
||||
@@ -407,10 +341,10 @@ float furi_hal_subghz_get_rssi() {
|
||||
}
|
||||
|
||||
uint8_t furi_hal_subghz_get_lqi() {
|
||||
furi_hal_spi_acquire(furi_hal_subghz.spi_bus_handle);
|
||||
furi_hal_spi_acquire(&furi_hal_spi_bus_handle_subghz);
|
||||
uint8_t data[1];
|
||||
cc1101_read_reg(furi_hal_subghz.spi_bus_handle, CC1101_STATUS_LQI | CC1101_BURST, data);
|
||||
furi_hal_spi_release(furi_hal_subghz.spi_bus_handle);
|
||||
cc1101_read_reg(&furi_hal_spi_bus_handle_subghz, CC1101_STATUS_LQI | CC1101_BURST, data);
|
||||
furi_hal_spi_release(&furi_hal_spi_bus_handle_subghz);
|
||||
return data[0] & 0x7F;
|
||||
}
|
||||
|
||||
@@ -456,10 +390,8 @@ bool furi_hal_subghz_is_tx_allowed(uint32_t value) {
|
||||
return false;
|
||||
} else if(
|
||||
(allow_extended_for_int) && //
|
||||
!(value >= 281000000 && value <= 361000000) &&
|
||||
!(value >= 378000000 && value <= 481000000) &&
|
||||
!(value >= 749000000 && value <= 962000000)) {
|
||||
FURI_LOG_I(TAG, "Frequency blocked - outside extended range");
|
||||
!furi_hal_subghz_is_frequency_valid(value)) {
|
||||
FURI_LOG_I(TAG, "Frequency blocked - outside dangerous range");
|
||||
return false;
|
||||
}
|
||||
|
||||
@@ -467,41 +399,45 @@ bool furi_hal_subghz_is_tx_allowed(uint32_t value) {
|
||||
}
|
||||
|
||||
uint32_t furi_hal_subghz_set_frequency(uint32_t value) {
|
||||
furi_hal_subghz.regulation = SubGhzRegulationTxRx;
|
||||
if(furi_hal_subghz_is_tx_allowed(value)) {
|
||||
furi_hal_subghz.regulation = SubGhzRegulationTxRx;
|
||||
} else {
|
||||
furi_hal_subghz.regulation = SubGhzRegulationOnlyRx;
|
||||
}
|
||||
|
||||
furi_hal_spi_acquire(furi_hal_subghz.spi_bus_handle);
|
||||
uint32_t real_frequency = cc1101_set_frequency(furi_hal_subghz.spi_bus_handle, value);
|
||||
cc1101_calibrate(furi_hal_subghz.spi_bus_handle);
|
||||
furi_hal_spi_acquire(&furi_hal_spi_bus_handle_subghz);
|
||||
uint32_t real_frequency = cc1101_set_frequency(&furi_hal_spi_bus_handle_subghz, value);
|
||||
cc1101_calibrate(&furi_hal_spi_bus_handle_subghz);
|
||||
|
||||
while(true) {
|
||||
CC1101Status status = cc1101_get_status(furi_hal_subghz.spi_bus_handle);
|
||||
CC1101Status status = cc1101_get_status(&furi_hal_spi_bus_handle_subghz);
|
||||
if(status.STATE == CC1101StateIDLE) break;
|
||||
}
|
||||
|
||||
furi_hal_spi_release(furi_hal_subghz.spi_bus_handle);
|
||||
furi_hal_spi_release(&furi_hal_spi_bus_handle_subghz);
|
||||
return real_frequency;
|
||||
}
|
||||
|
||||
void furi_hal_subghz_set_path(FuriHalSubGhzPath path) {
|
||||
furi_hal_spi_acquire(furi_hal_subghz.spi_bus_handle);
|
||||
furi_hal_spi_acquire(&furi_hal_spi_bus_handle_subghz);
|
||||
if(path == FuriHalSubGhzPath433) {
|
||||
furi_hal_gpio_write(&gpio_rf_sw_0, 0);
|
||||
cc1101_write_reg(
|
||||
furi_hal_subghz.spi_bus_handle, CC1101_IOCFG2, CC1101IocfgHW | CC1101_IOCFG_INV);
|
||||
&furi_hal_spi_bus_handle_subghz, CC1101_IOCFG2, CC1101IocfgHW | CC1101_IOCFG_INV);
|
||||
} else if(path == FuriHalSubGhzPath315) {
|
||||
furi_hal_gpio_write(&gpio_rf_sw_0, 1);
|
||||
cc1101_write_reg(furi_hal_subghz.spi_bus_handle, CC1101_IOCFG2, CC1101IocfgHW);
|
||||
cc1101_write_reg(&furi_hal_spi_bus_handle_subghz, CC1101_IOCFG2, CC1101IocfgHW);
|
||||
} else if(path == FuriHalSubGhzPath868) {
|
||||
furi_hal_gpio_write(&gpio_rf_sw_0, 1);
|
||||
cc1101_write_reg(
|
||||
furi_hal_subghz.spi_bus_handle, CC1101_IOCFG2, CC1101IocfgHW | CC1101_IOCFG_INV);
|
||||
&furi_hal_spi_bus_handle_subghz, CC1101_IOCFG2, CC1101IocfgHW | CC1101_IOCFG_INV);
|
||||
} else if(path == FuriHalSubGhzPathIsolate) {
|
||||
furi_hal_gpio_write(&gpio_rf_sw_0, 0);
|
||||
cc1101_write_reg(furi_hal_subghz.spi_bus_handle, CC1101_IOCFG2, CC1101IocfgHW);
|
||||
cc1101_write_reg(&furi_hal_spi_bus_handle_subghz, CC1101_IOCFG2, CC1101IocfgHW);
|
||||
} else {
|
||||
furi_crash("SubGhz: Incorrect path during set.");
|
||||
}
|
||||
furi_hal_spi_release(furi_hal_subghz.spi_bus_handle);
|
||||
furi_hal_spi_release(&furi_hal_spi_bus_handle_subghz);
|
||||
}
|
||||
|
||||
static bool furi_hal_subghz_start_debug() {
|
||||
@@ -531,7 +467,7 @@ volatile uint32_t furi_hal_subghz_capture_delta_duration = 0;
|
||||
volatile FuriHalSubGhzCaptureCallback furi_hal_subghz_capture_callback = NULL;
|
||||
volatile void* furi_hal_subghz_capture_callback_context = NULL;
|
||||
|
||||
static void furi_hal_subghz_capture_int_ISR() {
|
||||
static void furi_hal_subghz_capture_ISR() {
|
||||
// Channel 1
|
||||
if(LL_TIM_IsActiveFlag_CC1(TIM2)) {
|
||||
LL_TIM_ClearFlag_CC1(TIM2);
|
||||
@@ -561,27 +497,6 @@ static void furi_hal_subghz_capture_int_ISR() {
|
||||
}
|
||||
}
|
||||
|
||||
static void furi_hal_subghz_capture_ext_ISR() {
|
||||
if(!furi_hal_gpio_read(furi_hal_subghz.cc1101_g0_pin)) {
|
||||
if(furi_hal_subghz_capture_callback) {
|
||||
if(furi_hal_subghz.async_mirror_pin != NULL)
|
||||
furi_hal_gpio_write(furi_hal_subghz.async_mirror_pin, false);
|
||||
|
||||
furi_hal_subghz_capture_callback(
|
||||
true, TIM2->CNT, (void*)furi_hal_subghz_capture_callback_context);
|
||||
}
|
||||
} else {
|
||||
if(furi_hal_subghz_capture_callback) {
|
||||
if(furi_hal_subghz.async_mirror_pin != NULL)
|
||||
furi_hal_gpio_write(furi_hal_subghz.async_mirror_pin, true);
|
||||
|
||||
furi_hal_subghz_capture_callback(
|
||||
false, TIM2->CNT, (void*)furi_hal_subghz_capture_callback_context);
|
||||
}
|
||||
}
|
||||
TIM2->CNT = 6;
|
||||
}
|
||||
|
||||
void furi_hal_subghz_start_async_rx(FuriHalSubGhzCaptureCallback callback, void* context) {
|
||||
furi_assert(furi_hal_subghz.state == SubGhzStateIdle);
|
||||
furi_hal_subghz.state = SubGhzStateAsyncRx;
|
||||
@@ -589,6 +504,9 @@ void furi_hal_subghz_start_async_rx(FuriHalSubGhzCaptureCallback callback, void*
|
||||
furi_hal_subghz_capture_callback = callback;
|
||||
furi_hal_subghz_capture_callback_context = context;
|
||||
|
||||
furi_hal_gpio_init_ex(
|
||||
&gpio_cc1101_g0, GpioModeAltFunctionPushPull, GpioPullNo, GpioSpeedLow, GpioAltFn1TIM2);
|
||||
|
||||
furi_hal_bus_enable(FuriHalBusTIM2);
|
||||
|
||||
// Timer: base
|
||||
@@ -596,62 +514,42 @@ void furi_hal_subghz_start_async_rx(FuriHalSubGhzCaptureCallback callback, void*
|
||||
TIM_InitStruct.Prescaler = 64 - 1;
|
||||
TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP;
|
||||
TIM_InitStruct.Autoreload = 0x7FFFFFFE;
|
||||
// Clock division for capture filter (for internal radio)
|
||||
// Clock division for capture filter
|
||||
TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV4;
|
||||
LL_TIM_Init(TIM2, &TIM_InitStruct);
|
||||
|
||||
// Timer: advanced
|
||||
LL_TIM_SetClockSource(TIM2, LL_TIM_CLOCKSOURCE_INTERNAL);
|
||||
LL_TIM_DisableARRPreload(TIM2);
|
||||
LL_TIM_SetTriggerInput(TIM2, LL_TIM_TS_TI2FP2);
|
||||
LL_TIM_SetSlaveMode(TIM2, LL_TIM_SLAVEMODE_RESET);
|
||||
LL_TIM_SetTriggerOutput(TIM2, LL_TIM_TRGO_RESET);
|
||||
LL_TIM_EnableMasterSlaveMode(TIM2);
|
||||
LL_TIM_DisableDMAReq_TRIG(TIM2);
|
||||
LL_TIM_DisableIT_TRIG(TIM2);
|
||||
|
||||
if(furi_hal_subghz.radio_type == SubGhzRadioInternal) {
|
||||
LL_TIM_SetTriggerInput(TIM2, LL_TIM_TS_TI2FP2);
|
||||
LL_TIM_SetSlaveMode(TIM2, LL_TIM_SLAVEMODE_RESET);
|
||||
LL_TIM_SetTriggerOutput(TIM2, LL_TIM_TRGO_RESET);
|
||||
LL_TIM_EnableMasterSlaveMode(TIM2);
|
||||
// Timer: channel 1 indirect
|
||||
LL_TIM_IC_SetActiveInput(TIM2, LL_TIM_CHANNEL_CH1, LL_TIM_ACTIVEINPUT_INDIRECTTI);
|
||||
LL_TIM_IC_SetPrescaler(TIM2, LL_TIM_CHANNEL_CH1, LL_TIM_ICPSC_DIV1);
|
||||
LL_TIM_IC_SetPolarity(TIM2, LL_TIM_CHANNEL_CH1, LL_TIM_IC_POLARITY_FALLING);
|
||||
|
||||
// Timer: channel 1 indirect
|
||||
LL_TIM_IC_SetActiveInput(TIM2, LL_TIM_CHANNEL_CH1, LL_TIM_ACTIVEINPUT_INDIRECTTI);
|
||||
LL_TIM_IC_SetPrescaler(TIM2, LL_TIM_CHANNEL_CH1, LL_TIM_ICPSC_DIV1);
|
||||
LL_TIM_IC_SetPolarity(TIM2, LL_TIM_CHANNEL_CH1, LL_TIM_IC_POLARITY_FALLING);
|
||||
LL_TIM_IC_SetFilter(TIM2, LL_TIM_CHANNEL_CH1, LL_TIM_IC_FILTER_FDIV1);
|
||||
// Timer: channel 2 direct
|
||||
LL_TIM_IC_SetActiveInput(TIM2, LL_TIM_CHANNEL_CH2, LL_TIM_ACTIVEINPUT_DIRECTTI);
|
||||
LL_TIM_IC_SetPrescaler(TIM2, LL_TIM_CHANNEL_CH2, LL_TIM_ICPSC_DIV1);
|
||||
LL_TIM_IC_SetPolarity(TIM2, LL_TIM_CHANNEL_CH2, LL_TIM_IC_POLARITY_RISING);
|
||||
LL_TIM_IC_SetFilter(
|
||||
TIM2,
|
||||
LL_TIM_CHANNEL_CH2,
|
||||
LL_TIM_IC_FILTER_FDIV32_N8); // Capture filter: 1/(64000000/64/4/32*8) = 16us
|
||||
|
||||
// Timer: channel 2 direct
|
||||
LL_TIM_IC_SetActiveInput(TIM2, LL_TIM_CHANNEL_CH2, LL_TIM_ACTIVEINPUT_DIRECTTI);
|
||||
LL_TIM_IC_SetPrescaler(TIM2, LL_TIM_CHANNEL_CH2, LL_TIM_ICPSC_DIV1);
|
||||
LL_TIM_IC_SetPolarity(TIM2, LL_TIM_CHANNEL_CH2, LL_TIM_IC_POLARITY_RISING);
|
||||
LL_TIM_IC_SetFilter(TIM2, LL_TIM_CHANNEL_CH2, LL_TIM_IC_FILTER_FDIV32_N8);
|
||||
// ISR setup
|
||||
furi_hal_interrupt_set_isr(FuriHalInterruptIdTIM2, furi_hal_subghz_capture_ISR, NULL);
|
||||
|
||||
// ISR setup
|
||||
furi_hal_interrupt_set_isr(FuriHalInterruptIdTIM2, furi_hal_subghz_capture_int_ISR, NULL);
|
||||
|
||||
// Interrupts and channels
|
||||
LL_TIM_EnableIT_CC1(TIM2);
|
||||
LL_TIM_EnableIT_CC2(TIM2);
|
||||
LL_TIM_CC_EnableChannel(TIM2, LL_TIM_CHANNEL_CH1);
|
||||
LL_TIM_CC_EnableChannel(TIM2, LL_TIM_CHANNEL_CH2);
|
||||
|
||||
furi_hal_gpio_init_ex(
|
||||
furi_hal_subghz.cc1101_g0_pin,
|
||||
GpioModeAltFunctionPushPull,
|
||||
GpioPullNo,
|
||||
GpioSpeedLow,
|
||||
GpioAltFn1TIM2);
|
||||
} else {
|
||||
furi_hal_gpio_init(
|
||||
furi_hal_subghz.cc1101_g0_pin,
|
||||
GpioModeInterruptRiseFall,
|
||||
GpioPullUp,
|
||||
GpioSpeedVeryHigh);
|
||||
furi_hal_gpio_disable_int_callback(furi_hal_subghz.cc1101_g0_pin);
|
||||
furi_hal_gpio_remove_int_callback(furi_hal_subghz.cc1101_g0_pin);
|
||||
furi_hal_gpio_add_int_callback(
|
||||
furi_hal_subghz.cc1101_g0_pin,
|
||||
furi_hal_subghz_capture_ext_ISR,
|
||||
furi_hal_subghz_capture_callback);
|
||||
}
|
||||
// Interrupts and channels
|
||||
LL_TIM_EnableIT_CC1(TIM2);
|
||||
LL_TIM_EnableIT_CC2(TIM2);
|
||||
LL_TIM_CC_EnableChannel(TIM2, LL_TIM_CHANNEL_CH1);
|
||||
LL_TIM_CC_EnableChannel(TIM2, LL_TIM_CHANNEL_CH2);
|
||||
|
||||
// Start timer
|
||||
LL_TIM_SetCounter(TIM2, 0);
|
||||
@@ -681,14 +579,9 @@ void furi_hal_subghz_stop_async_rx() {
|
||||
furi_hal_subghz_stop_debug();
|
||||
|
||||
FURI_CRITICAL_EXIT();
|
||||
if(furi_hal_subghz.radio_type == SubGhzRadioInternal) {
|
||||
furi_hal_interrupt_set_isr(FuriHalInterruptIdTIM2, NULL, NULL);
|
||||
} else {
|
||||
furi_hal_gpio_disable_int_callback(furi_hal_subghz.cc1101_g0_pin);
|
||||
furi_hal_gpio_remove_int_callback(furi_hal_subghz.cc1101_g0_pin);
|
||||
}
|
||||
furi_hal_interrupt_set_isr(FuriHalInterruptIdTIM2, NULL, NULL);
|
||||
|
||||
furi_hal_gpio_init(furi_hal_subghz.cc1101_g0_pin, GpioModeAnalog, GpioPullNo, GpioSpeedLow);
|
||||
furi_hal_gpio_init(&gpio_cc1101_g0, GpioModeAnalog, GpioPullNo, GpioSpeedLow);
|
||||
}
|
||||
|
||||
typedef struct {
|
||||
@@ -792,8 +685,7 @@ static void furi_hal_subghz_async_tx_timer_isr() {
|
||||
} else if(furi_hal_subghz.state == SubGhzStateAsyncTxLast) {
|
||||
furi_hal_subghz.state = SubGhzStateAsyncTxEnd;
|
||||
//forcibly pulls the pin to the ground so that there is no carrier
|
||||
furi_hal_gpio_init(
|
||||
furi_hal_subghz.cc1101_g0_pin, GpioModeInput, GpioPullDown, GpioSpeedLow);
|
||||
furi_hal_gpio_init(&gpio_cc1101_g0, GpioModeInput, GpioPullDown, GpioSpeedLow);
|
||||
LL_TIM_DisableCounter(TIM2);
|
||||
} else {
|
||||
furi_crash(NULL);
|
||||
@@ -820,20 +712,9 @@ bool furi_hal_subghz_start_async_tx(FuriHalSubGhzAsyncTxCallback callback, void*
|
||||
furi_hal_subghz_async_tx.buffer =
|
||||
malloc(API_HAL_SUBGHZ_ASYNC_TX_BUFFER_FULL * sizeof(uint32_t));
|
||||
|
||||
if(furi_hal_subghz.radio_type == SubGhzRadioInternal) {
|
||||
// Connect CC1101_GD0 to TIM2 as output
|
||||
furi_hal_gpio_init_ex(
|
||||
furi_hal_subghz.cc1101_g0_pin,
|
||||
GpioModeAltFunctionPushPull,
|
||||
GpioPullDown,
|
||||
GpioSpeedLow,
|
||||
GpioAltFn1TIM2);
|
||||
} else {
|
||||
//Signal generation with mem-to-mem DMA
|
||||
furi_hal_gpio_write(furi_hal_subghz.cc1101_g0_pin, true);
|
||||
furi_hal_gpio_init(
|
||||
furi_hal_subghz.cc1101_g0_pin, GpioModeOutputPushPull, GpioPullNo, GpioSpeedVeryHigh);
|
||||
}
|
||||
// Connect CC1101_GD0 to TIM2 as output
|
||||
furi_hal_gpio_init_ex(
|
||||
&gpio_cc1101_g0, GpioModeAltFunctionPushPull, GpioPullDown, GpioSpeedLow, GpioAltFn1TIM2);
|
||||
|
||||
// Configure DMA
|
||||
LL_DMA_InitTypeDef dma_config = {0};
|
||||
@@ -896,27 +777,15 @@ bool furi_hal_subghz_start_async_tx(FuriHalSubGhzAsyncTxCallback callback, void*
|
||||
LL_TIM_EnableCounter(TIM2);
|
||||
|
||||
// Start debug
|
||||
if(furi_hal_subghz_start_debug() || furi_hal_subghz.radio_type == SubGhzRadioExternal) {
|
||||
const GpioPin* gpio = furi_hal_subghz.cc1101_g0_pin;
|
||||
//Preparing bit mask
|
||||
//Debug pin is may be only PORTB! (PB0, PB1, .., PB15)
|
||||
furi_hal_subghz_debug_gpio_buff[0] = 0;
|
||||
furi_hal_subghz_debug_gpio_buff[1] = 0;
|
||||
if(furi_hal_subghz_start_debug()) {
|
||||
const GpioPin* gpio = furi_hal_subghz.async_mirror_pin;
|
||||
// //Preparing bit mask
|
||||
// //Debug pin is may be only PORTB! (PB0, PB1, .., PB15)
|
||||
// furi_hal_subghz_debug_gpio_buff[0] = 0;
|
||||
// furi_hal_subghz_debug_gpio_buff[1] = 0;
|
||||
|
||||
//Mirror pin (for example, speaker)
|
||||
if(furi_hal_subghz.async_mirror_pin != NULL) {
|
||||
furi_hal_subghz_debug_gpio_buff[0] |= (uint32_t)furi_hal_subghz.async_mirror_pin->pin
|
||||
<< GPIO_NUMBER;
|
||||
furi_hal_subghz_debug_gpio_buff[1] |= furi_hal_subghz.async_mirror_pin->pin;
|
||||
gpio = furi_hal_subghz.async_mirror_pin;
|
||||
}
|
||||
|
||||
//G0 singnal generation for external radio
|
||||
if(furi_hal_subghz.radio_type == SubGhzRadioExternal) {
|
||||
furi_hal_subghz_debug_gpio_buff[0] |= (uint32_t)furi_hal_subghz.cc1101_g0_pin->pin
|
||||
<< GPIO_NUMBER;
|
||||
furi_hal_subghz_debug_gpio_buff[1] |= furi_hal_subghz.cc1101_g0_pin->pin;
|
||||
}
|
||||
furi_hal_subghz_debug_gpio_buff[0] = (uint32_t)gpio->pin << GPIO_NUMBER;
|
||||
furi_hal_subghz_debug_gpio_buff[1] = gpio->pin;
|
||||
|
||||
dma_config.MemoryOrM2MDstAddress = (uint32_t)furi_hal_subghz_debug_gpio_buff;
|
||||
dma_config.PeriphOrM2MSrcAddress = (uint32_t) & (gpio->port->BSRR);
|
||||
@@ -949,9 +818,9 @@ void furi_hal_subghz_stop_async_tx() {
|
||||
|
||||
// Shutdown radio
|
||||
furi_hal_subghz_idle();
|
||||
if(furi_hal_subghz.radio_type == SubGhzRadioExternal) {
|
||||
furi_hal_gpio_write(furi_hal_subghz.cc1101_g0_pin, false);
|
||||
}
|
||||
#ifdef FURI_HAL_SUBGHZ_TX_GPIO
|
||||
furi_hal_gpio_write(&FURI_HAL_SUBGHZ_TX_GPIO, false);
|
||||
#endif
|
||||
|
||||
// Deinitialize Timer
|
||||
FURI_CRITICAL_ENTER();
|
||||
@@ -964,14 +833,10 @@ void furi_hal_subghz_stop_async_tx() {
|
||||
furi_hal_interrupt_set_isr(SUBGHZ_DMA_CH1_IRQ, NULL, NULL);
|
||||
|
||||
// Deinitialize GPIO
|
||||
furi_hal_gpio_init(furi_hal_subghz.cc1101_g0_pin, GpioModeAnalog, GpioPullNo, GpioSpeedLow);
|
||||
furi_hal_gpio_init(&gpio_cc1101_g0, GpioModeAnalog, GpioPullNo, GpioSpeedLow);
|
||||
|
||||
// Stop debug
|
||||
furi_hal_subghz_stop_debug();
|
||||
|
||||
if(((furi_hal_subghz.async_mirror_pin != NULL) &&
|
||||
(furi_hal_subghz.radio_type == SubGhzRadioInternal)) ||
|
||||
(furi_hal_subghz.radio_type == SubGhzRadioExternal)) {
|
||||
if(furi_hal_subghz_stop_debug()) {
|
||||
LL_DMA_DisableChannel(SUBGHZ_DMA_CH2_DEF);
|
||||
}
|
||||
|
||||
|
||||
@@ -10,7 +10,7 @@
|
||||
#include <stddef.h>
|
||||
#include <toolbox/level_duration.h>
|
||||
#include <furi_hal_gpio.h>
|
||||
#include <furi_hal_spi_types.h>
|
||||
// #include <furi_hal_spi_types.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
@@ -41,50 +41,6 @@ typedef enum {
|
||||
FuriHalSubGhzPath868, /**< Center Frequency: 868MHz. Path 3: SW1RF3-SW2RF3, LCLC */
|
||||
} FuriHalSubGhzPath;
|
||||
|
||||
/** SubGhz state */
|
||||
typedef enum {
|
||||
SubGhzStateInit, /**< Init pending */
|
||||
|
||||
SubGhzStateIdle, /**< Idle, energy save mode */
|
||||
|
||||
SubGhzStateAsyncRx, /**< Async RX started */
|
||||
|
||||
SubGhzStateAsyncTx, /**< Async TX started, DMA and timer is on */
|
||||
SubGhzStateAsyncTxLast, /**< Async TX continue, DMA completed and timer got last value to go */
|
||||
SubGhzStateAsyncTxEnd, /**< Async TX complete, cleanup needed */
|
||||
|
||||
} SubGhzState;
|
||||
|
||||
/** SubGhz regulation, receive transmission on the current frequency for the
|
||||
* region */
|
||||
typedef enum {
|
||||
SubGhzRegulationOnlyRx, /**only Rx*/
|
||||
SubGhzRegulationTxRx, /**TxRx*/
|
||||
} SubGhzRegulation;
|
||||
|
||||
/** SubGhz radio types */
|
||||
typedef enum {
|
||||
SubGhzRadioInternal,
|
||||
SubGhzRadioExternal,
|
||||
} SubGhzRadioType;
|
||||
|
||||
/** Structure for accessing SubGhz settings*/
|
||||
typedef struct {
|
||||
volatile SubGhzState state;
|
||||
volatile SubGhzRegulation regulation;
|
||||
volatile FuriHalSubGhzPreset preset;
|
||||
const GpioPin* async_mirror_pin;
|
||||
SubGhzRadioType radio_type;
|
||||
FuriHalSpiBusHandle* spi_bus_handle;
|
||||
const GpioPin* cc1101_g0_pin;
|
||||
uint8_t rolling_counter_mult;
|
||||
bool ext_module_power_disabled : 1;
|
||||
bool timestamp_file_names : 1;
|
||||
bool extended_frequency_i : 1;
|
||||
} FuriHalSubGhz;
|
||||
|
||||
extern volatile FuriHalSubGhz furi_hal_subghz;
|
||||
|
||||
/* Mirror RX/TX async modulation signal to specified pin
|
||||
*
|
||||
* @warning Configures pin to output mode. Make sure it is not connected
|
||||
@@ -100,13 +56,6 @@ void furi_hal_subghz_set_async_mirror_pin(const GpioPin* pin);
|
||||
*/
|
||||
void furi_hal_subghz_init();
|
||||
|
||||
/** Initialize and switch to power save mode Used by internal API-HAL
|
||||
* initialization routine Can be used to reinitialize device to safe state and
|
||||
* send it to sleep
|
||||
* @return true if initialisation is successfully
|
||||
*/
|
||||
bool furi_hal_subghz_init_check(void);
|
||||
|
||||
/** Send device to sleep mode
|
||||
*/
|
||||
void furi_hal_subghz_sleep();
|
||||
@@ -234,6 +183,16 @@ uint32_t furi_hal_subghz_set_frequency_and_path(uint32_t value);
|
||||
*/
|
||||
bool furi_hal_subghz_is_tx_allowed(uint32_t value);
|
||||
|
||||
/** Get the current rolling protocols counter ++ value
|
||||
* @return uint8_t current value
|
||||
*/
|
||||
uint8_t furi_hal_subghz_get_rolling_counter_mult(void);
|
||||
|
||||
/** Set the current rolling protocols counter ++ value
|
||||
* @param mult uint8_t = 1, 2, 4, 8
|
||||
*/
|
||||
void furi_hal_subghz_set_rolling_counter_mult(uint8_t mult);
|
||||
|
||||
/** Set frequency
|
||||
*
|
||||
* @param value frequency in Hz
|
||||
@@ -289,52 +248,49 @@ bool furi_hal_subghz_is_async_tx_complete();
|
||||
*/
|
||||
void furi_hal_subghz_stop_async_tx();
|
||||
|
||||
/** Switching between internal and external radio
|
||||
* @param state SubGhzRadioInternal or SubGhzRadioExternal
|
||||
* @return true if switching is successful
|
||||
*/
|
||||
bool furi_hal_subghz_init_radio_type(SubGhzRadioType state);
|
||||
// /** Initialize and switch to power save mode Used by internal API-HAL
|
||||
// * initialization routine Can be used to reinitialize device to safe state and
|
||||
// * send it to sleep
|
||||
// * @return true if initialisation is successfully
|
||||
// */
|
||||
// bool furi_hal_subghz_init_check(void);
|
||||
|
||||
/** Get current radio
|
||||
* @return SubGhzRadioInternal or SubGhzRadioExternal
|
||||
*/
|
||||
SubGhzRadioType furi_hal_subghz_get_radio_type(void);
|
||||
// /** Switching between internal and external radio
|
||||
// * @param state SubGhzRadioInternal or SubGhzRadioExternal
|
||||
// * @return true if switching is successful
|
||||
// */
|
||||
// bool furi_hal_subghz_init_radio_type(SubGhzRadioType state);
|
||||
|
||||
/** Check for a radio module
|
||||
* @return true if check is successful
|
||||
*/
|
||||
bool furi_hal_subghz_check_radio(void);
|
||||
// /** Get current radio
|
||||
// * @return SubGhzRadioInternal or SubGhzRadioExternal
|
||||
// */
|
||||
// SubGhzRadioType furi_hal_subghz_get_radio_type(void);
|
||||
|
||||
/** Turn on the power of the external radio module
|
||||
* @return true if power-up is successful
|
||||
*/
|
||||
bool furi_hal_subghz_enable_ext_power(void);
|
||||
// /** Check for a radio module
|
||||
// * @return true if check is successful
|
||||
// */
|
||||
// bool furi_hal_subghz_check_radio(void);
|
||||
|
||||
/** Turn off the power of the external radio module
|
||||
*/
|
||||
void furi_hal_subghz_disable_ext_power(void);
|
||||
// /** Turn on the power of the external radio module
|
||||
// * @return true if power-up is successful
|
||||
// */
|
||||
// bool furi_hal_subghz_enable_ext_power(void);
|
||||
|
||||
/** Get the current rolling protocols counter ++ value
|
||||
* @return uint8_t current value
|
||||
*/
|
||||
uint8_t furi_hal_subghz_get_rolling_counter_mult(void);
|
||||
// /** Turn off the power of the external radio module
|
||||
// */
|
||||
// void furi_hal_subghz_disable_ext_power(void);
|
||||
|
||||
/** Set the current rolling protocols counter ++ value
|
||||
* @param mult uint8_t = 1, 2, 4, 8
|
||||
*/
|
||||
void furi_hal_subghz_set_rolling_counter_mult(uint8_t mult);
|
||||
// /** If true - disable 5v power of the external radio module
|
||||
// */
|
||||
// void furi_hal_subghz_set_external_power_disable(bool state);
|
||||
|
||||
/** If true - disable 5v power of the external radio module
|
||||
*/
|
||||
void furi_hal_subghz_set_external_power_disable(bool state);
|
||||
// /** Get the current state of the external power disable flag
|
||||
// */
|
||||
// bool furi_hal_subghz_get_external_power_disable(void);
|
||||
|
||||
/** Get the current state of the external power disable flag
|
||||
*/
|
||||
bool furi_hal_subghz_get_external_power_disable(void);
|
||||
|
||||
/** Set what radio module we will be using
|
||||
*/
|
||||
void furi_hal_subghz_select_radio_type(SubGhzRadioType state);
|
||||
// /** Set what radio module we will be using
|
||||
// */
|
||||
// void furi_hal_subghz_select_radio_type(SubGhzRadioType state);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
|
||||
@@ -1,304 +0,0 @@
|
||||
#pragma once
|
||||
|
||||
#include <cc1101.h>
|
||||
|
||||
static const uint8_t furi_hal_subghz_preset_ook_270khz_async_regs[][2] = {
|
||||
// https://e2e.ti.com/support/wireless-connectivity/sub-1-ghz-group/sub-1-ghz/f/sub-1-ghz-forum/382066/cc1101---don-t-know-the-correct-registers-configuration
|
||||
|
||||
/* GPIO GD0 */
|
||||
{CC1101_IOCFG0, 0x0D}, // GD0 as async serial data output/input
|
||||
|
||||
/* FIFO and internals */
|
||||
{CC1101_FIFOTHR, 0x47}, // The only important bit is ADC_RETENTION, FIFO Tx=33 Rx=32
|
||||
|
||||
/* Packet engine */
|
||||
{CC1101_PKTCTRL0, 0x32}, // Async, continious, no whitening
|
||||
|
||||
/* Frequency Synthesizer Control */
|
||||
{CC1101_FSCTRL1, 0x06}, // IF = (26*10^6) / (2^10) * 0x06 = 152343.75Hz
|
||||
|
||||
// Modem Configuration
|
||||
{CC1101_MDMCFG0, 0x00}, // Channel spacing is 25kHz
|
||||
{CC1101_MDMCFG1, 0x00}, // Channel spacing is 25kHz
|
||||
{CC1101_MDMCFG2, 0x30}, // Format ASK/OOK, No preamble/sync
|
||||
{CC1101_MDMCFG3, 0x32}, // Data rate is 3.79372 kBaud
|
||||
{CC1101_MDMCFG4, 0x67}, // Rx BW filter is 270.833333kHz
|
||||
|
||||
/* Main Radio Control State Machine */
|
||||
{CC1101_MCSM0, 0x18}, // Autocalibrate on idle-to-rx/tx, PO_TIMEOUT is 64 cycles(149-155us)
|
||||
|
||||
/* Frequency Offset Compensation Configuration */
|
||||
{CC1101_FOCCFG,
|
||||
0x18}, // no frequency offset compensation, POST_K same as PRE_K, PRE_K is 4K, GATE is off
|
||||
|
||||
/* Automatic Gain Control */
|
||||
{CC1101_AGCCTRL0,
|
||||
0x40}, // 01 - Low hysteresis, small asymmetric dead zone, medium gain; 00 - 8 samples agc; 00 - Normal AGC, 00 - 4dB boundary
|
||||
{CC1101_AGCCTRL1,
|
||||
0x00}, // 0; 0 - LNA 2 gain is decreased to minimum before decreasing LNA gain; 00 - Relative carrier sense threshold disabled; 0000 - RSSI to MAIN_TARGET
|
||||
{CC1101_AGCCTRL2, 0x03}, // 00 - DVGA all; 000 - MAX LNA+LNA2; 011 - MAIN_TARGET 24 dB
|
||||
|
||||
/* Wake on radio and timeouts control */
|
||||
{CC1101_WORCTRL, 0xFB}, // WOR_RES is 2^15 periods (0.91 - 0.94 s) 16.5 - 17.2 hours
|
||||
|
||||
/* Frontend configuration */
|
||||
{CC1101_FREND0, 0x11}, // Adjusts current TX LO buffer + high is PATABLE[1]
|
||||
{CC1101_FREND1, 0xB6}, //
|
||||
|
||||
/* End */
|
||||
{0, 0},
|
||||
};
|
||||
|
||||
static const uint8_t furi_hal_subghz_preset_ook_650khz_async_regs[][2] = {
|
||||
// https://e2e.ti.com/support/wireless-connectivity/sub-1-ghz-group/sub-1-ghz/f/sub-1-ghz-forum/382066/cc1101---don-t-know-the-correct-registers-configuration
|
||||
|
||||
/* GPIO GD0 */
|
||||
{CC1101_IOCFG0, 0x0D}, // GD0 as async serial data output/input
|
||||
|
||||
/* FIFO and internals */
|
||||
{CC1101_FIFOTHR, 0x07}, // The only important bit is ADC_RETENTION
|
||||
|
||||
/* Packet engine */
|
||||
{CC1101_PKTCTRL0, 0x32}, // Async, continious, no whitening
|
||||
|
||||
/* Frequency Synthesizer Control */
|
||||
{CC1101_FSCTRL1, 0x06}, // IF = (26*10^6) / (2^10) * 0x06 = 152343.75Hz
|
||||
|
||||
// Modem Configuration
|
||||
{CC1101_MDMCFG0, 0x00}, // Channel spacing is 25kHz
|
||||
{CC1101_MDMCFG1, 0x00}, // Channel spacing is 25kHz
|
||||
{CC1101_MDMCFG2, 0x30}, // Format ASK/OOK, No preamble/sync
|
||||
{CC1101_MDMCFG3, 0x32}, // Data rate is 3.79372 kBaud
|
||||
{CC1101_MDMCFG4, 0x17}, // Rx BW filter is 650.000kHz
|
||||
|
||||
/* Main Radio Control State Machine */
|
||||
{CC1101_MCSM0, 0x18}, // Autocalibrate on idle-to-rx/tx, PO_TIMEOUT is 64 cycles(149-155us)
|
||||
|
||||
/* Frequency Offset Compensation Configuration */
|
||||
{CC1101_FOCCFG,
|
||||
0x18}, // no frequency offset compensation, POST_K same as PRE_K, PRE_K is 4K, GATE is off
|
||||
|
||||
/* Automatic Gain Control */
|
||||
// {CC1101_AGCTRL0,0x40}, // 01 - Low hysteresis, small asymmetric dead zone, medium gain; 00 - 8 samples agc; 00 - Normal AGC, 00 - 4dB boundary
|
||||
// {CC1101_AGCTRL1,0x00}, // 0; 0 - LNA 2 gain is decreased to minimum before decreasing LNA gain; 00 - Relative carrier sense threshold disabled; 0000 - RSSI to MAIN_TARGET
|
||||
// {CC1101_AGCCTRL2, 0x03}, // 00 - DVGA all; 000 - MAX LNA+LNA2; 011 - MAIN_TARGET 24 dB
|
||||
//MAGN_TARGET for RX filter BW =< 100 kHz is 0x3. For higher RX filter BW's MAGN_TARGET is 0x7.
|
||||
{CC1101_AGCCTRL0,
|
||||
0x91}, // 10 - Medium hysteresis, medium asymmetric dead zone, medium gain ; 01 - 16 samples agc; 00 - Normal AGC, 01 - 8dB boundary
|
||||
{CC1101_AGCCTRL1,
|
||||
0x0}, // 0; 0 - LNA 2 gain is decreased to minimum before decreasing LNA gain; 00 - Relative carrier sense threshold disabled; 0000 - RSSI to MAIN_TARGET
|
||||
{CC1101_AGCCTRL2, 0x07}, // 00 - DVGA all; 000 - MAX LNA+LNA2; 111 - MAIN_TARGET 42 dB
|
||||
|
||||
/* Wake on radio and timeouts control */
|
||||
{CC1101_WORCTRL, 0xFB}, // WOR_RES is 2^15 periods (0.91 - 0.94 s) 16.5 - 17.2 hours
|
||||
|
||||
/* Frontend configuration */
|
||||
{CC1101_FREND0, 0x11}, // Adjusts current TX LO buffer + high is PATABLE[1]
|
||||
{CC1101_FREND1, 0xB6}, //
|
||||
|
||||
/* End */
|
||||
{0, 0},
|
||||
};
|
||||
|
||||
static const uint8_t furi_hal_subghz_preset_2fsk_dev2_38khz_async_regs[][2] = {
|
||||
|
||||
/* GPIO GD0 */
|
||||
{CC1101_IOCFG0, 0x0D}, // GD0 as async serial data output/input
|
||||
|
||||
/* Frequency Synthesizer Control */
|
||||
{CC1101_FSCTRL1, 0x06}, // IF = (26*10^6) / (2^10) * 0x06 = 152343.75Hz
|
||||
|
||||
/* Packet engine */
|
||||
{CC1101_PKTCTRL0, 0x32}, // Async, continious, no whitening
|
||||
{CC1101_PKTCTRL1, 0x04},
|
||||
|
||||
// // Modem Configuration
|
||||
{CC1101_MDMCFG0, 0x00},
|
||||
{CC1101_MDMCFG1, 0x02},
|
||||
{CC1101_MDMCFG2, 0x04}, // Format 2-FSK/FM, No preamble/sync, Disable (current optimized)
|
||||
{CC1101_MDMCFG3, 0x83}, // Data rate is 4.79794 kBaud
|
||||
{CC1101_MDMCFG4, 0x67}, //Rx BW filter is 270.833333 kHz
|
||||
{CC1101_DEVIATN, 0x04}, //Deviation 2.380371 kHz
|
||||
|
||||
/* Main Radio Control State Machine */
|
||||
{CC1101_MCSM0, 0x18}, // Autocalibrate on idle-to-rx/tx, PO_TIMEOUT is 64 cycles(149-155us)
|
||||
|
||||
/* Frequency Offset Compensation Configuration */
|
||||
{CC1101_FOCCFG,
|
||||
0x16}, // no frequency offset compensation, POST_K same as PRE_K, PRE_K is 4K, GATE is off
|
||||
|
||||
/* Automatic Gain Control */
|
||||
{CC1101_AGCCTRL0,
|
||||
0x91}, //10 - Medium hysteresis, medium asymmetric dead zone, medium gain ; 01 - 16 samples agc; 00 - Normal AGC, 01 - 8dB boundary
|
||||
{CC1101_AGCCTRL1,
|
||||
0x00}, // 0; 0 - LNA 2 gain is decreased to minimum before decreasing LNA gain; 00 - Relative carrier sense threshold disabled; 0000 - RSSI to MAIN_TARGET
|
||||
{CC1101_AGCCTRL2, 0x07}, // 00 - DVGA all; 000 - MAX LNA+LNA2; 111 - MAIN_TARGET 42 dB
|
||||
|
||||
/* Wake on radio and timeouts control */
|
||||
{CC1101_WORCTRL, 0xFB}, // WOR_RES is 2^15 periods (0.91 - 0.94 s) 16.5 - 17.2 hours
|
||||
|
||||
/* Frontend configuration */
|
||||
{CC1101_FREND0, 0x10}, // Adjusts current TX LO buffer
|
||||
{CC1101_FREND1, 0x56},
|
||||
|
||||
/* End */
|
||||
{0, 0},
|
||||
};
|
||||
|
||||
static const uint8_t furi_hal_subghz_preset_2fsk_dev47_6khz_async_regs[][2] = {
|
||||
|
||||
/* GPIO GD0 */
|
||||
{CC1101_IOCFG0, 0x0D}, // GD0 as async serial data output/input
|
||||
|
||||
/* Frequency Synthesizer Control */
|
||||
{CC1101_FSCTRL1, 0x06}, // IF = (26*10^6) / (2^10) * 0x06 = 152343.75Hz
|
||||
|
||||
/* Packet engine */
|
||||
{CC1101_PKTCTRL0, 0x32}, // Async, continious, no whitening
|
||||
{CC1101_PKTCTRL1, 0x04},
|
||||
|
||||
// // Modem Configuration
|
||||
{CC1101_MDMCFG0, 0x00},
|
||||
{CC1101_MDMCFG1, 0x02},
|
||||
{CC1101_MDMCFG2, 0x04}, // Format 2-FSK/FM, No preamble/sync, Disable (current optimized)
|
||||
{CC1101_MDMCFG3, 0x83}, // Data rate is 4.79794 kBaud
|
||||
{CC1101_MDMCFG4, 0x67}, //Rx BW filter is 270.833333 kHz
|
||||
{CC1101_DEVIATN, 0x47}, //Deviation 47.60742 kHz
|
||||
|
||||
/* Main Radio Control State Machine */
|
||||
{CC1101_MCSM0, 0x18}, // Autocalibrate on idle-to-rx/tx, PO_TIMEOUT is 64 cycles(149-155us)
|
||||
|
||||
/* Frequency Offset Compensation Configuration */
|
||||
{CC1101_FOCCFG,
|
||||
0x16}, // no frequency offset compensation, POST_K same as PRE_K, PRE_K is 4K, GATE is off
|
||||
|
||||
/* Automatic Gain Control */
|
||||
{CC1101_AGCCTRL0,
|
||||
0x91}, //10 - Medium hysteresis, medium asymmetric dead zone, medium gain ; 01 - 16 samples agc; 00 - Normal AGC, 01 - 8dB boundary
|
||||
{CC1101_AGCCTRL1,
|
||||
0x00}, // 0; 0 - LNA 2 gain is decreased to minimum before decreasing LNA gain; 00 - Relative carrier sense threshold disabled; 0000 - RSSI to MAIN_TARGET
|
||||
{CC1101_AGCCTRL2, 0x07}, // 00 - DVGA all; 000 - MAX LNA+LNA2; 111 - MAIN_TARGET 42 dB
|
||||
|
||||
/* Wake on radio and timeouts control */
|
||||
{CC1101_WORCTRL, 0xFB}, // WOR_RES is 2^15 periods (0.91 - 0.94 s) 16.5 - 17.2 hours
|
||||
|
||||
/* Frontend configuration */
|
||||
{CC1101_FREND0, 0x10}, // Adjusts current TX LO buffer
|
||||
{CC1101_FREND1, 0x56},
|
||||
|
||||
/* End */
|
||||
{0, 0},
|
||||
};
|
||||
|
||||
static const uint8_t furi_hal_subghz_preset_msk_99_97kb_async_regs[][2] = {
|
||||
/* GPIO GD0 */
|
||||
{CC1101_IOCFG0, 0x06},
|
||||
|
||||
{CC1101_FIFOTHR, 0x07}, // The only important bit is ADC_RETENTION
|
||||
{CC1101_SYNC1, 0x46},
|
||||
{CC1101_SYNC0, 0x4C},
|
||||
{CC1101_ADDR, 0x00},
|
||||
{CC1101_PKTLEN, 0x00},
|
||||
{CC1101_CHANNR, 0x00},
|
||||
|
||||
{CC1101_PKTCTRL0, 0x05},
|
||||
|
||||
{CC1101_FSCTRL0, 0x23},
|
||||
{CC1101_FSCTRL1, 0x06},
|
||||
|
||||
{CC1101_MDMCFG0, 0xF8},
|
||||
{CC1101_MDMCFG1, 0x22},
|
||||
{CC1101_MDMCFG2, 0x72},
|
||||
{CC1101_MDMCFG3, 0xF8},
|
||||
{CC1101_MDMCFG4, 0x5B},
|
||||
{CC1101_DEVIATN, 0x47},
|
||||
|
||||
{CC1101_MCSM0, 0x18},
|
||||
{CC1101_FOCCFG, 0x16},
|
||||
|
||||
{CC1101_AGCCTRL0, 0xB2},
|
||||
{CC1101_AGCCTRL1, 0x00},
|
||||
{CC1101_AGCCTRL2, 0xC7},
|
||||
|
||||
{CC1101_FREND0, 0x10},
|
||||
{CC1101_FREND1, 0x56},
|
||||
|
||||
{CC1101_BSCFG, 0x1C},
|
||||
{CC1101_FSTEST, 0x59},
|
||||
|
||||
/* End */
|
||||
{0, 0},
|
||||
};
|
||||
|
||||
static const uint8_t furi_hal_subghz_preset_gfsk_9_99kb_async_regs[][2] = {
|
||||
|
||||
{CC1101_IOCFG0, 0x06}, //GDO0 Output Pin Configuration
|
||||
{CC1101_FIFOTHR, 0x47}, //RX FIFO and TX FIFO Thresholds
|
||||
|
||||
//1 : CRC calculation in TX and CRC check in RX enabled,
|
||||
//1 : Variable packet length mode. Packet length configured by the first byte after sync word
|
||||
{CC1101_PKTCTRL0, 0x05},
|
||||
|
||||
{CC1101_FSCTRL1, 0x06}, //Frequency Synthesizer Control
|
||||
|
||||
{CC1101_SYNC1, 0x46},
|
||||
{CC1101_SYNC0, 0x4C},
|
||||
{CC1101_ADDR, 0x00},
|
||||
{CC1101_PKTLEN, 0x00},
|
||||
|
||||
{CC1101_MDMCFG4, 0xC8}, //Modem Configuration 9.99
|
||||
{CC1101_MDMCFG3, 0x93}, //Modem Configuration
|
||||
{CC1101_MDMCFG2, 0x12}, // 2: 16/16 sync word bits detected
|
||||
|
||||
{CC1101_DEVIATN, 0x34}, //Deviation = 19.042969
|
||||
{CC1101_MCSM0, 0x18}, //Main Radio Control State Machine Configuration
|
||||
{CC1101_FOCCFG, 0x16}, //Frequency Offset Compensation Configuration
|
||||
|
||||
{CC1101_AGCCTRL2, 0x43}, //AGC Control
|
||||
{CC1101_AGCCTRL1, 0x40},
|
||||
{CC1101_AGCCTRL0, 0x91},
|
||||
|
||||
{CC1101_WORCTRL, 0xFB}, //Wake On Radio Control
|
||||
/* End */
|
||||
{0, 0},
|
||||
};
|
||||
|
||||
static const uint8_t furi_hal_subghz_preset_ook_async_patable[8] = {
|
||||
0x00,
|
||||
0xC0, // 12dBm 0xC0, 10dBm 0xC5, 7dBm 0xCD, 5dBm 0x86, 0dBm 0x50, -6dBm 0x37, -10dBm 0x26, -15dBm 0x1D, -20dBm 0x17, -30dBm 0x03
|
||||
0x00,
|
||||
0x00,
|
||||
0x00,
|
||||
0x00,
|
||||
0x00,
|
||||
0x00};
|
||||
|
||||
static const uint8_t furi_hal_subghz_preset_2fsk_async_patable[8] = {
|
||||
0xC0, // 10dBm 0xC0, 7dBm 0xC8, 5dBm 0x84, 0dBm 0x60, -10dBm 0x34, -15dBm 0x1D, -20dBm 0x0E, -30dBm 0x12
|
||||
0x00,
|
||||
0x00,
|
||||
0x00,
|
||||
0x00,
|
||||
0x00,
|
||||
0x00,
|
||||
0x00};
|
||||
|
||||
static const uint8_t furi_hal_subghz_preset_msk_async_patable[8] = {
|
||||
0xC0, // 10dBm 0xC0, 7dBm 0xC8, 5dBm 0x84, 0dBm 0x60, -10dBm 0x34, -15dBm 0x1D, -20dBm 0x0E, -30dBm 0x12
|
||||
0x00,
|
||||
0x00,
|
||||
0x00,
|
||||
0x00,
|
||||
0x00,
|
||||
0x00,
|
||||
0x00};
|
||||
|
||||
static const uint8_t furi_hal_subghz_preset_gfsk_async_patable[8] = {
|
||||
0xC0, // 10dBm 0xC0, 7dBm 0xC8, 5dBm 0x84, 0dBm 0x60, -10dBm 0x34, -15dBm 0x1D, -20dBm 0x0E, -30dBm 0x12
|
||||
0x00,
|
||||
0x00,
|
||||
0x00,
|
||||
0x00,
|
||||
0x00,
|
||||
0x00,
|
||||
0x00};
|
||||
@@ -112,9 +112,9 @@ void furi_hal_version_set_name(const char* name) {
|
||||
|
||||
uint32_t company_id = LL_FLASH_GetSTCompanyID();
|
||||
// uint32_t device_id = LL_FLASH_GetDeviceID();
|
||||
// Somehow some new flippers return 0x27 instead of 0x26
|
||||
// Mobile apps expects it to return 0x26 (and clearly STM too)
|
||||
// Hardcoded here instead of the stupid "Flipper" name "fix"
|
||||
// Some flippers return 0x27 (flippers with chip revision 2003 6495) instead of 0x26 (flippers with chip revision 2001 6495)
|
||||
// Mobile apps expects it to return 0x26
|
||||
// Hardcoded here temporarily until mobile apps is updated to handle 0x27
|
||||
uint32_t device_id = 0x26;
|
||||
furi_hal_version.ble_mac[0] = (uint8_t)(udn & 0x000000FF);
|
||||
furi_hal_version.ble_mac[1] = (uint8_t)((udn & 0x0000FF00) >> 8);
|
||||
|
||||
@@ -19,3 +19,7 @@ const char* furi_hal_version_get_fcc_id() {
|
||||
const char* furi_hal_version_get_ic_id() {
|
||||
return "27624-FZ";
|
||||
}
|
||||
|
||||
const char* furi_hal_version_get_mic_id() {
|
||||
return "210-175991";
|
||||
}
|
||||
|
||||
@@ -1,3 +1,4 @@
|
||||
#pragma once
|
||||
#include <errno.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
|
||||
2
firmware/targets/f7/platform_specific/math_wrapper.h
Normal file
2
firmware/targets/f7/platform_specific/math_wrapper.h
Normal file
@@ -0,0 +1,2 @@
|
||||
#pragma once
|
||||
#include <math.h>
|
||||
Reference in New Issue
Block a user