mirror of
https://github.com/Next-Flip/Momentum-Firmware.git
synced 2026-04-24 03:29:57 -07:00
Api Symbols: replace asserts with checks (#3507)
* Api Symbols: replace asserts with checks * Api Symbols: replace asserts with checks part 2 * Update no args function signatures with void, to help compiler to track incorrect usage * More unavoidable void * Update PVS config and code to make it happy * Format sources * nfc: fix checks * dead code cleanup & include fixes Co-authored-by: gornekich <n.gorbadey@gmail.com> Co-authored-by: hedger <hedger@users.noreply.github.com> Co-authored-by: hedger <hedger@nanode.su>
This commit is contained in:
@@ -102,7 +102,7 @@ static void furi_hal_infrared_tim_rx_isr(void* context) {
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/* Timeout */
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if(LL_TIM_IsActiveFlag_CC3(INFRARED_RX_TIMER)) {
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LL_TIM_ClearFlag_CC3(INFRARED_RX_TIMER);
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furi_assert(furi_hal_infrared_state == InfraredStateAsyncRx);
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furi_check(furi_hal_infrared_state == InfraredStateAsyncRx);
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/* Timers CNT register starts to counting from 0 to ARR, but it is
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* reseted when Channel 1 catches interrupt. It is not reseted by
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@@ -119,7 +119,7 @@ static void furi_hal_infrared_tim_rx_isr(void* context) {
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/* Rising Edge */
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if(LL_TIM_IsActiveFlag_CC1(INFRARED_RX_TIMER)) {
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LL_TIM_ClearFlag_CC1(INFRARED_RX_TIMER);
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furi_assert(furi_hal_infrared_state == InfraredStateAsyncRx);
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furi_check(furi_hal_infrared_state == InfraredStateAsyncRx);
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if(READ_BIT(INFRARED_RX_TIMER->CCMR1, TIM_CCMR1_CC1S)) {
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/* Low pin level is a Mark state of INFRARED signal. Invert level for further processing. */
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@@ -134,7 +134,7 @@ static void furi_hal_infrared_tim_rx_isr(void* context) {
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/* Falling Edge */
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if(LL_TIM_IsActiveFlag_CC2(INFRARED_RX_TIMER)) {
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LL_TIM_ClearFlag_CC2(INFRARED_RX_TIMER);
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furi_assert(furi_hal_infrared_state == InfraredStateAsyncRx);
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furi_check(furi_hal_infrared_state == InfraredStateAsyncRx);
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if(READ_BIT(INFRARED_RX_TIMER->CCMR1, TIM_CCMR1_CC2S)) {
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/* High pin level is a Space state of INFRARED signal. Invert level for further processing. */
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@@ -149,7 +149,7 @@ static void furi_hal_infrared_tim_rx_isr(void* context) {
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}
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void furi_hal_infrared_async_rx_start(void) {
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furi_assert(furi_hal_infrared_state == InfraredStateIdle);
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furi_check(furi_hal_infrared_state == InfraredStateIdle);
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furi_hal_gpio_init_ex(
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&gpio_infrared_rx,
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@@ -198,7 +198,7 @@ void furi_hal_infrared_async_rx_start(void) {
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}
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void furi_hal_infrared_async_rx_stop(void) {
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furi_assert(furi_hal_infrared_state == InfraredStateAsyncRx);
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furi_check(furi_hal_infrared_state == InfraredStateAsyncRx);
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FURI_CRITICAL_ENTER();
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furi_hal_bus_disable(INFRARED_RX_TIMER_BUS);
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@@ -237,7 +237,7 @@ static void furi_hal_infrared_tx_dma_terminate(void) {
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LL_DMA_DisableIT_HT(INFRARED_DMA_CH2_DEF);
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LL_DMA_DisableIT_TC(INFRARED_DMA_CH2_DEF);
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furi_assert(furi_hal_infrared_state == InfraredStateAsyncTxStopInProgress);
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furi_check(furi_hal_infrared_state == InfraredStateAsyncTxStopInProgress);
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LL_DMA_DisableIT_TC(INFRARED_DMA_CH1_DEF);
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LL_DMA_DisableChannel(INFRARED_DMA_CH2_DEF);
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@@ -447,14 +447,14 @@ static void furi_hal_infrared_configure_tim_rcr_dma_tx(void) {
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}
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static void furi_hal_infrared_tx_fill_buffer_last(uint8_t buf_num) {
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furi_assert(buf_num < 2);
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furi_assert(furi_hal_infrared_state != InfraredStateAsyncRx);
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furi_assert(furi_hal_infrared_state < InfraredStateMAX);
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furi_assert(infrared_tim_tx.data_callback);
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furi_check(buf_num < 2);
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furi_check(furi_hal_infrared_state != InfraredStateAsyncRx);
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furi_check(furi_hal_infrared_state < InfraredStateMAX);
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furi_check(infrared_tim_tx.data_callback);
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InfraredTxBuf* buffer = &infrared_tim_tx.buffer[buf_num];
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furi_assert(buffer->data != NULL);
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furi_check(buffer->data != NULL);
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(void)buffer->data;
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furi_assert(buffer->polarity != NULL);
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furi_check(buffer->polarity != NULL);
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(void)buffer->polarity;
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infrared_tim_tx.buffer[buf_num].data[0] = 0; // 1 pulse
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@@ -467,13 +467,13 @@ static void furi_hal_infrared_tx_fill_buffer_last(uint8_t buf_num) {
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}
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static void furi_hal_infrared_tx_fill_buffer(uint8_t buf_num, uint8_t polarity_shift) {
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furi_assert(buf_num < 2);
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furi_assert(furi_hal_infrared_state != InfraredStateAsyncRx);
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furi_assert(furi_hal_infrared_state < InfraredStateMAX);
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furi_assert(infrared_tim_tx.data_callback);
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furi_check(buf_num < 2);
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furi_check(furi_hal_infrared_state != InfraredStateAsyncRx);
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furi_check(furi_hal_infrared_state < InfraredStateMAX);
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furi_check(infrared_tim_tx.data_callback);
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InfraredTxBuf* buffer = &infrared_tim_tx.buffer[buf_num];
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furi_assert(buffer->data != NULL);
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furi_assert(buffer->polarity != NULL);
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furi_check(buffer->data != NULL);
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furi_check(buffer->polarity != NULL);
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FuriHalInfraredTxGetDataState status = FuriHalInfraredTxGetDataStateOk;
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uint32_t duration = 0;
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@@ -539,10 +539,10 @@ static void furi_hal_infrared_tx_fill_buffer(uint8_t buf_num, uint8_t polarity_s
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}
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static void furi_hal_infrared_tx_dma_set_polarity(uint8_t buf_num, uint8_t polarity_shift) {
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furi_assert(buf_num < 2);
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furi_assert(furi_hal_infrared_state < InfraredStateMAX);
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furi_check(buf_num < 2);
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furi_check(furi_hal_infrared_state < InfraredStateMAX);
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InfraredTxBuf* buffer = &infrared_tim_tx.buffer[buf_num];
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furi_assert(buffer->polarity != NULL);
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furi_check(buffer->polarity != NULL);
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FURI_CRITICAL_ENTER();
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bool channel_enabled = LL_DMA_IsEnabledChannel(INFRARED_DMA_CH1_DEF);
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@@ -558,10 +558,10 @@ static void furi_hal_infrared_tx_dma_set_polarity(uint8_t buf_num, uint8_t polar
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}
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static void furi_hal_infrared_tx_dma_set_buffer(uint8_t buf_num) {
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furi_assert(buf_num < 2);
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furi_assert(furi_hal_infrared_state < InfraredStateMAX);
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furi_check(buf_num < 2);
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furi_check(furi_hal_infrared_state < InfraredStateMAX);
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InfraredTxBuf* buffer = &infrared_tim_tx.buffer[buf_num];
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furi_assert(buffer->data != NULL);
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furi_check(buffer->data != NULL);
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/* non-circular mode requires disabled channel before setup */
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FURI_CRITICAL_ENTER();
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@@ -578,7 +578,7 @@ static void furi_hal_infrared_tx_dma_set_buffer(uint8_t buf_num) {
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}
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static void furi_hal_infrared_async_tx_free_resources(void) {
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furi_assert(
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furi_check(
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(furi_hal_infrared_state == InfraredStateIdle) ||
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(furi_hal_infrared_state == InfraredStateAsyncTxStopped));
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@@ -606,11 +606,11 @@ void furi_hal_infrared_async_tx_start(uint32_t freq, float duty_cycle) {
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furi_crash();
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}
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furi_assert(furi_hal_infrared_state == InfraredStateIdle);
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furi_assert(infrared_tim_tx.buffer[0].data == NULL);
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furi_assert(infrared_tim_tx.buffer[1].data == NULL);
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furi_assert(infrared_tim_tx.buffer[0].polarity == NULL);
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furi_assert(infrared_tim_tx.buffer[1].polarity == NULL);
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furi_check(furi_hal_infrared_state == InfraredStateIdle);
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furi_check(infrared_tim_tx.buffer[0].data == NULL);
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furi_check(infrared_tim_tx.buffer[1].data == NULL);
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furi_check(infrared_tim_tx.buffer[0].polarity == NULL);
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furi_check(infrared_tim_tx.buffer[1].polarity == NULL);
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size_t alloc_size_data = INFRARED_TIM_TX_DMA_BUFFER_SIZE * sizeof(uint16_t);
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infrared_tim_tx.buffer[0].data = malloc(alloc_size_data);
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@@ -655,8 +655,8 @@ void furi_hal_infrared_async_tx_start(uint32_t freq, float duty_cycle) {
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}
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void furi_hal_infrared_async_tx_wait_termination(void) {
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furi_assert(furi_hal_infrared_state >= InfraredStateAsyncTx);
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furi_assert(furi_hal_infrared_state < InfraredStateMAX);
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furi_check(furi_hal_infrared_state >= InfraredStateAsyncTx);
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furi_check(furi_hal_infrared_state < InfraredStateMAX);
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FuriStatus status;
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status = furi_semaphore_acquire(infrared_tim_tx.stop_semaphore, FuriWaitForever);
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@@ -666,8 +666,8 @@ void furi_hal_infrared_async_tx_wait_termination(void) {
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}
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void furi_hal_infrared_async_tx_stop(void) {
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furi_assert(furi_hal_infrared_state >= InfraredStateAsyncTx);
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furi_assert(furi_hal_infrared_state < InfraredStateMAX);
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furi_check(furi_hal_infrared_state >= InfraredStateAsyncTx);
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furi_check(furi_hal_infrared_state < InfraredStateMAX);
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FURI_CRITICAL_ENTER();
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if(furi_hal_infrared_state == InfraredStateAsyncTx)
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@@ -680,7 +680,7 @@ void furi_hal_infrared_async_tx_stop(void) {
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void furi_hal_infrared_async_tx_set_data_isr_callback(
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FuriHalInfraredTxGetDataISRCallback callback,
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void* context) {
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furi_assert(furi_hal_infrared_state == InfraredStateIdle);
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furi_check(furi_hal_infrared_state == InfraredStateIdle);
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infrared_tim_tx.data_callback = callback;
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infrared_tim_tx.data_context = context;
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}
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