Merging OFW | Suffering | Part 1 | Wont build as is

I honestly dont even know anymore...

firmware/targets/f7/api_symbols.csv

@@ -1,5 +1,5 @@
 entry,status,name,type,params
-Version,+,12.8,,
+Version,+,14.0,,
 Header,+,applications/services/bt/bt_service/bt.h,,
 Header,+,applications/services/cli/cli.h,,
 Header,+,applications/services/cli/cli_vcp.h,,
@@ -1348,8 +1348,7 @@ Function,+,furi_hal_spi_bus_handle_deinit,void,FuriHalSpiBusHandle*
 Function,+,furi_hal_spi_bus_handle_init,void,FuriHalSpiBusHandle*
 Function,+,furi_hal_spi_bus_init,void,FuriHalSpiBus*
 Function,+,furi_hal_spi_bus_rx,_Bool,"FuriHalSpiBusHandle*, uint8_t*, size_t, uint32_t"
-Function,+,furi_hal_spi_bus_trx,_Bool,"FuriHalSpiBusHandle*, uint8_t*, uint8_t*, size_t, uint32_t"
-Function,+,furi_hal_spi_bus_tx,_Bool,"FuriHalSpiBusHandle*, uint8_t*, size_t, uint32_t"
+Function,+,furi_hal_spi_bus_trx_dma,_Bool,"FuriHalSpiBusHandle*, uint8_t*, uint8_t*, size_t, uint32_t"
 Function,-,furi_hal_spi_config_deinit_early,void,
 Function,-,furi_hal_spi_config_init,void,
 Function,-,furi_hal_spi_config_init_early,void,
@@ -2651,12 +2650,14 @@ Function,+,subghz_block_generic_get_preset_name,void,"const char*, FuriString*"
 Function,+,subghz_block_generic_serialize,_Bool,"SubGhzBlockGeneric*, FlipperFormat*, SubGhzRadioPreset*"
 Function,+,subghz_environment_alloc,SubGhzEnvironment*,
 Function,+,subghz_environment_free,void,SubGhzEnvironment*
+Function,+,subghz_environment_get_alutech_at_4n_rainbow_table_file_name,const char*,SubGhzEnvironment*
 Function,+,subghz_environment_get_came_atomo_rainbow_table_file_name,const char*,SubGhzEnvironment*
 Function,+,subghz_environment_get_keystore,SubGhzKeystore*,SubGhzEnvironment*
 Function,+,subghz_environment_get_nice_flor_s_rainbow_table_file_name,const char*,SubGhzEnvironment*
 Function,+,subghz_environment_get_protocol_name_registry,const char*,"SubGhzEnvironment*, size_t"
 Function,+,subghz_environment_get_protocol_registry,void*,SubGhzEnvironment*
 Function,+,subghz_environment_load_keystore,_Bool,"SubGhzEnvironment*, const char*"
+Function,+,subghz_environment_set_alutech_at_4n_rainbow_table_file_name,void,"SubGhzEnvironment*, const char*"
 Function,+,subghz_environment_set_came_atomo_rainbow_table_file_name,void,"SubGhzEnvironment*, const char*"
 Function,+,subghz_environment_set_nice_flor_s_rainbow_table_file_name,void,"SubGhzEnvironment*, const char*"
 Function,+,subghz_environment_set_protocol_registry,void,"SubGhzEnvironment*, void*"
@@ -2679,7 +2680,7 @@ Function,+,subghz_protocol_blocks_crc8le,uint8_t,"const uint8_t[], size_t, uint8
 Function,+,subghz_protocol_blocks_get_bit_array,_Bool,"uint8_t[], size_t"
 Function,+,subghz_protocol_blocks_get_hash_data,uint8_t,"SubGhzBlockDecoder*, size_t"
 Function,+,subghz_protocol_blocks_get_parity,uint8_t,"uint64_t, uint8_t"
-Function,+,subghz_protocol_blocks_get_upload,size_t,"uint8_t[], size_t, LevelDuration*, size_t, uint32_t"
+Function,+,subghz_protocol_blocks_get_upload_from_bit_array,size_t,"uint8_t[], size_t, LevelDuration*, size_t, uint32_t, SubGhzProtocolBlockAlignBit"
 Function,+,subghz_protocol_blocks_lfsr_digest16,uint16_t,"const uint8_t[], size_t, uint16_t, uint16_t"
 Function,+,subghz_protocol_blocks_lfsr_digest8,uint8_t,"const uint8_t[], size_t, uint8_t, uint8_t"
 Function,+,subghz_protocol_blocks_lfsr_digest8_reflect,uint8_t,"const uint8_t[], size_t, uint8_t, uint8_t"
@@ -2688,6 +2689,14 @@ Function,+,subghz_protocol_blocks_parity_bytes,uint8_t,"const uint8_t[], size_t"
 Function,+,subghz_protocol_blocks_reverse_key,uint64_t,"uint64_t, uint8_t"
 Function,+,subghz_protocol_blocks_set_bit_array,void,"_Bool, uint8_t[], size_t, size_t"
 Function,+,subghz_protocol_blocks_xor_bytes,uint8_t,"const uint8_t[], size_t"
+Function,+,subghz_protocol_decoder_alutech_at_4n_alloc,void*,SubGhzEnvironment*
+Function,+,subghz_protocol_decoder_alutech_at_4n_deserialize,_Bool,"void*, FlipperFormat*"
+Function,+,subghz_protocol_decoder_alutech_at_4n_feed,void,"void*, _Bool, uint32_t"
+Function,+,subghz_protocol_decoder_alutech_at_4n_free,void,void*
+Function,+,subghz_protocol_decoder_alutech_at_4n_get_hash_data,uint8_t,void*
+Function,+,subghz_protocol_decoder_alutech_at_4n_get_string,void,"void*, FuriString*"
+Function,+,subghz_protocol_decoder_alutech_at_4n_reset,void,void*
+Function,+,subghz_protocol_decoder_alutech_at_4n_serialize,_Bool,"void*, FlipperFormat*, SubGhzRadioPreset*"
 Function,-,subghz_protocol_decoder_ansonic_alloc,void*,SubGhzEnvironment*
 Function,-,subghz_protocol_decoder_ansonic_deserialize,_Bool,"void*, FlipperFormat*"
 Function,-,subghz_protocol_decoder_ansonic_feed,void,"void*, _Bool, uint32_t"
@@ -2757,6 +2766,14 @@ Function,-,subghz_protocol_decoder_doitrand_get_hash_data,uint8_t,void*
 Function,-,subghz_protocol_decoder_doitrand_get_string,void,"void*, FuriString*"
 Function,-,subghz_protocol_decoder_doitrand_reset,void,void*
 Function,-,subghz_protocol_decoder_doitrand_serialize,_Bool,"void*, FlipperFormat*, SubGhzRadioPreset*"
+Function,+,subghz_protocol_decoder_dooya_alloc,void*,SubGhzEnvironment*
+Function,+,subghz_protocol_decoder_dooya_deserialize,_Bool,"void*, FlipperFormat*"
+Function,+,subghz_protocol_decoder_dooya_feed,void,"void*, _Bool, uint32_t"
+Function,+,subghz_protocol_decoder_dooya_free,void,void*
+Function,+,subghz_protocol_decoder_dooya_get_hash_data,uint8_t,void*
+Function,+,subghz_protocol_decoder_dooya_get_string,void,"void*, FuriString*"
+Function,+,subghz_protocol_decoder_dooya_reset,void,void*
+Function,+,subghz_protocol_decoder_dooya_serialize,_Bool,"void*, FlipperFormat*, SubGhzRadioPreset*"
 Function,-,subghz_protocol_decoder_faac_slh_alloc,void*,SubGhzEnvironment*
 Function,-,subghz_protocol_decoder_faac_slh_deserialize,_Bool,"void*, FlipperFormat*"
 Function,-,subghz_protocol_decoder_faac_slh_feed,void,"void*, _Bool, uint32_t"
@@ -2837,7 +2854,23 @@ Function,-,subghz_protocol_decoder_kia_get_hash_data,uint8_t,void*
 Function,-,subghz_protocol_decoder_kia_get_string,void,"void*, FuriString*"
 Function,-,subghz_protocol_decoder_kia_reset,void,void*
 Function,-,subghz_protocol_decoder_kia_serialize,_Bool,"void*, FlipperFormat*, SubGhzRadioPreset*"
+Function,+,subghz_protocol_decoder_kinggates_stylo_4k_alloc,void*,SubGhzEnvironment*
+Function,+,subghz_protocol_decoder_kinggates_stylo_4k_deserialize,_Bool,"void*, FlipperFormat*"
+Function,+,subghz_protocol_decoder_kinggates_stylo_4k_feed,void,"void*, _Bool, uint32_t"
+Function,+,subghz_protocol_decoder_kinggates_stylo_4k_free,void,void*
+Function,+,subghz_protocol_decoder_kinggates_stylo_4k_get_hash_data,uint8_t,void*
+Function,+,subghz_protocol_decoder_kinggates_stylo_4k_get_string,void,"void*, FuriString*"
+Function,+,subghz_protocol_decoder_kinggates_stylo_4k_reset,void,void*
+Function,+,subghz_protocol_decoder_kinggates_stylo_4k_serialize,_Bool,"void*, FlipperFormat*, SubGhzRadioPreset*"
 Function,-,subghz_protocol_decoder_linear_alloc,void*,SubGhzEnvironment*
+Function,+,subghz_protocol_decoder_linear_delta3_alloc,void*,SubGhzEnvironment*
+Function,+,subghz_protocol_decoder_linear_delta3_deserialize,_Bool,"void*, FlipperFormat*"
+Function,+,subghz_protocol_decoder_linear_delta3_feed,void,"void*, _Bool, uint32_t"
+Function,+,subghz_protocol_decoder_linear_delta3_free,void,void*
+Function,+,subghz_protocol_decoder_linear_delta3_get_hash_data,uint8_t,void*
+Function,+,subghz_protocol_decoder_linear_delta3_get_string,void,"void*, FuriString*"
+Function,+,subghz_protocol_decoder_linear_delta3_reset,void,void*
+Function,+,subghz_protocol_decoder_linear_delta3_serialize,_Bool,"void*, FlipperFormat*, SubGhzRadioPreset*"
 Function,-,subghz_protocol_decoder_linear_deserialize,_Bool,"void*, FlipperFormat*"
 Function,-,subghz_protocol_decoder_linear_feed,void,"void*, _Bool, uint32_t"
 Function,-,subghz_protocol_decoder_linear_free,void,void*
@@ -3032,6 +3065,11 @@ Function,-,subghz_protocol_encoder_doitrand_deserialize,_Bool,"void*, FlipperFor
 Function,-,subghz_protocol_encoder_doitrand_free,void,void*
 Function,-,subghz_protocol_encoder_doitrand_stop,void,void*
 Function,-,subghz_protocol_encoder_doitrand_yield,LevelDuration,void*
+Function,+,subghz_protocol_encoder_dooya_alloc,void*,SubGhzEnvironment*
+Function,+,subghz_protocol_encoder_dooya_deserialize,_Bool,"void*, FlipperFormat*"
+Function,+,subghz_protocol_encoder_dooya_free,void,void*
+Function,+,subghz_protocol_encoder_dooya_stop,void,void*
+Function,+,subghz_protocol_encoder_dooya_yield,LevelDuration,void*
 Function,-,subghz_protocol_encoder_faac_slh_alloc,void*,SubGhzEnvironment*
 Function,-,subghz_protocol_encoder_faac_slh_deserialize,_Bool,"void*, FlipperFormat*"
 Function,-,subghz_protocol_encoder_faac_slh_free,void,void*
@@ -3074,6 +3112,11 @@ Function,-,subghz_protocol_encoder_keeloq_free,void,void*
 Function,-,subghz_protocol_encoder_keeloq_stop,void,void*
 Function,-,subghz_protocol_encoder_keeloq_yield,LevelDuration,void*
 Function,-,subghz_protocol_encoder_linear_alloc,void*,SubGhzEnvironment*
+Function,+,subghz_protocol_encoder_linear_delta3_alloc,void*,SubGhzEnvironment*
+Function,+,subghz_protocol_encoder_linear_delta3_deserialize,_Bool,"void*, FlipperFormat*"
+Function,+,subghz_protocol_encoder_linear_delta3_free,void,void*
+Function,+,subghz_protocol_encoder_linear_delta3_stop,void,void*
+Function,+,subghz_protocol_encoder_linear_delta3_yield,LevelDuration,void*
 Function,-,subghz_protocol_encoder_linear_deserialize,_Bool,"void*, FlipperFormat*"
 Function,-,subghz_protocol_encoder_linear_free,void,void*
 Function,-,subghz_protocol_encoder_linear_stop,void,void*
@@ -3148,6 +3191,16 @@ Function,-,subghz_protocol_encoder_smc5326_deserialize,_Bool,"void*, FlipperForm
 Function,-,subghz_protocol_encoder_smc5326_free,void,void*
 Function,-,subghz_protocol_encoder_smc5326_stop,void,void*
 Function,-,subghz_protocol_encoder_smc5326_yield,LevelDuration,void*
+Function,+,subghz_protocol_encoder_somfy_keytis_alloc,void*,SubGhzEnvironment*
+Function,+,subghz_protocol_encoder_somfy_keytis_deserialize,_Bool,"void*, FlipperFormat*"
+Function,+,subghz_protocol_encoder_somfy_keytis_free,void,void*
+Function,+,subghz_protocol_encoder_somfy_keytis_stop,void,void*
+Function,+,subghz_protocol_encoder_somfy_keytis_yield,LevelDuration,void*
+Function,+,subghz_protocol_encoder_somfy_telis_alloc,void*,SubGhzEnvironment*
+Function,+,subghz_protocol_encoder_somfy_telis_deserialize,_Bool,"void*, FlipperFormat*"
+Function,+,subghz_protocol_encoder_somfy_telis_free,void,void*
+Function,+,subghz_protocol_encoder_somfy_telis_stop,void,void*
+Function,+,subghz_protocol_encoder_somfy_telis_yield,LevelDuration,void*
 Function,-,subghz_protocol_encoder_star_line_alloc,void*,SubGhzEnvironment*
 Function,-,subghz_protocol_encoder_star_line_deserialize,_Bool,"void*, FlipperFormat*"
 Function,-,subghz_protocol_encoder_star_line_free,void,void*
@@ -3169,6 +3222,8 @@ Function,+,subghz_protocol_registry_get_by_index,const SubGhzProtocol*,"const Su
 Function,+,subghz_protocol_registry_get_by_name,const SubGhzProtocol*,"const SubGhzProtocolRegistry*, const char*"
 Function,-,subghz_protocol_secplus_v1_check_fixed,_Bool,uint32_t
 Function,-,subghz_protocol_secplus_v2_create_data,_Bool,"void*, FlipperFormat*, uint32_t, uint8_t, uint32_t, SubGhzRadioPreset*"
+Function,+,subghz_protocol_somfy_keytis_create_data,_Bool,"void*, FlipperFormat*, uint32_t, uint8_t, uint16_t, SubGhzRadioPreset*"
+Function,+,subghz_protocol_somfy_telis_create_data,_Bool,"void*, FlipperFormat*, uint32_t, uint8_t, uint16_t, SubGhzRadioPreset*"
 Function,-,subghz_protocol_star_line_create_data,_Bool,"void*, FlipperFormat*, uint32_t, uint8_t, uint16_t, const char*, SubGhzRadioPreset*"
 Function,+,subghz_receiver_alloc_init,SubGhzReceiver*,SubGhzEnvironment*
 Function,+,subghz_receiver_decode,void,"SubGhzReceiver*, _Bool, uint32_t"
@@ -4879,6 +4934,9 @@ Variable,+,sequence_set_vibro_on,const NotificationSequence,
 Variable,+,sequence_single_vibro,const NotificationSequence,
 Variable,+,sequence_solid_yellow,const NotificationSequence,
 Variable,+,sequence_success,const NotificationSequence,
+Variable,+,subghz_protocol_alutech_at_4n,const SubGhzProtocol,
+Variable,+,subghz_protocol_alutech_at_4n_decoder,const SubGhzProtocolDecoder,
+Variable,+,subghz_protocol_alutech_at_4n_encoder,const SubGhzProtocolEncoder,
 Variable,-,subghz_protocol_ansonic,const SubGhzProtocol,
 Variable,-,subghz_protocol_ansonic_decoder,const SubGhzProtocolDecoder,
 Variable,-,subghz_protocol_ansonic_encoder,const SubGhzProtocolEncoder,
@@ -4903,6 +4961,9 @@ Variable,-,subghz_protocol_clemsa_encoder,const SubGhzProtocolEncoder,
 Variable,-,subghz_protocol_doitrand,const SubGhzProtocol,
 Variable,-,subghz_protocol_doitrand_decoder,const SubGhzProtocolDecoder,
 Variable,-,subghz_protocol_doitrand_encoder,const SubGhzProtocolEncoder,
+Variable,+,subghz_protocol_dooya,const SubGhzProtocol,
+Variable,+,subghz_protocol_dooya_decoder,const SubGhzProtocolDecoder,
+Variable,+,subghz_protocol_dooya_encoder,const SubGhzProtocolEncoder,
 Variable,-,subghz_protocol_faac_slh,const SubGhzProtocol,
 Variable,-,subghz_protocol_faac_slh_decoder,const SubGhzProtocolDecoder,
 Variable,-,subghz_protocol_faac_slh_encoder,const SubGhzProtocolEncoder,
@@ -4933,8 +4994,14 @@ Variable,-,subghz_protocol_keeloq_encoder,const SubGhzProtocolEncoder,
 Variable,-,subghz_protocol_kia,const SubGhzProtocol,
 Variable,-,subghz_protocol_kia_decoder,const SubGhzProtocolDecoder,
 Variable,-,subghz_protocol_kia_encoder,const SubGhzProtocolEncoder,
+Variable,+,subghz_protocol_kinggates_stylo_4k,const SubGhzProtocol,
+Variable,+,subghz_protocol_kinggates_stylo_4k_decoder,const SubGhzProtocolDecoder,
+Variable,+,subghz_protocol_kinggates_stylo_4k_encoder,const SubGhzProtocolEncoder,
 Variable,-,subghz_protocol_linear,const SubGhzProtocol,
 Variable,-,subghz_protocol_linear_decoder,const SubGhzProtocolDecoder,
+Variable,+,subghz_protocol_linear_delta3,const SubGhzProtocol,
+Variable,+,subghz_protocol_linear_delta3_decoder,const SubGhzProtocolDecoder,
+Variable,+,subghz_protocol_linear_delta3_encoder,const SubGhzProtocolEncoder,
 Variable,-,subghz_protocol_linear_encoder,const SubGhzProtocolEncoder,
 Variable,-,subghz_protocol_magellan,const SubGhzProtocol,
 Variable,-,subghz_protocol_magellan_decoder,const SubGhzProtocolDecoder,

firmware/targets/f7/fatfs/sd_spi_io.c

@@ -0,0 +1,877 @@
+#include "sd_spi_io.h"
+#include "sector_cache.h"
+#include <furi.h>
+#include <furi_hal.h>
+#include <furi/core/core_defines.h>
+
+// #define SD_SPI_DEBUG 1
+#define TAG "SdSpi"
+
+#ifdef SD_SPI_DEBUG
+#define sd_spi_debug(...) FURI_LOG_I(TAG, __VA_ARGS__)
+#else
+#define sd_spi_debug(...)
+#endif
+
+#define SD_CMD_LENGTH 6
+#define SD_DUMMY_BYTE 0xFF
+#define SD_ANSWER_RETRY_COUNT 8
+#define SD_IDLE_RETRY_COUNT 100
+#define SD_BLOCK_SIZE 512
+
+#define FLAG_SET(x, y) (((x) & (y)) == (y))
+
+static bool sd_high_capacity = false;
+
+typedef enum {
+    SdSpiDataResponceOK = 0x05,
+    SdSpiDataResponceCRCError = 0x0B,
+    SdSpiDataResponceWriteError = 0x0D,
+    SdSpiDataResponceOtherError = 0xFF,
+} SdSpiDataResponce;
+
+typedef struct {
+    uint8_t r1;
+    uint8_t r2;
+    uint8_t r3;
+    uint8_t r4;
+    uint8_t r5;
+} SdSpiCmdAnswer;
+
+typedef enum {
+    SdSpiCmdAnswerTypeR1,
+    SdSpiCmdAnswerTypeR1B,
+    SdSpiCmdAnswerTypeR2,
+    SdSpiCmdAnswerTypeR3,
+    SdSpiCmdAnswerTypeR4R5,
+    SdSpiCmdAnswerTypeR7,
+} SdSpiCmdAnswerType;
+
+/*
+    SdSpiCmd and SdSpiToken use non-standard enum value names convention,
+    because it is more convenient to look for documentation on a specific command.
+    For example, to find out what the SD_CMD23_SET_BLOCK_COUNT command does, you need to look for
+    SET_BLOCK_COUNT or CMD23 in the "Part 1 Physical Layer Simplified Specification".
+
+    Do not use that naming convention in other places.
+*/
+
+typedef enum {
+    SD_CMD0_GO_IDLE_STATE = 0,
+    SD_CMD1_SEND_OP_COND = 1,
+    SD_CMD8_SEND_IF_COND = 8,
+    SD_CMD9_SEND_CSD = 9,
+    SD_CMD10_SEND_CID = 10,
+    SD_CMD12_STOP_TRANSMISSION = 12,
+    SD_CMD13_SEND_STATUS = 13,
+    SD_CMD16_SET_BLOCKLEN = 16,
+    SD_CMD17_READ_SINGLE_BLOCK = 17,
+    SD_CMD18_READ_MULT_BLOCK = 18,
+    SD_CMD23_SET_BLOCK_COUNT = 23,
+    SD_CMD24_WRITE_SINGLE_BLOCK = 24,
+    SD_CMD25_WRITE_MULT_BLOCK = 25,
+    SD_CMD27_PROG_CSD = 27,
+    SD_CMD28_SET_WRITE_PROT = 28,
+    SD_CMD29_CLR_WRITE_PROT = 29,
+    SD_CMD30_SEND_WRITE_PROT = 30,
+    SD_CMD32_SD_ERASE_GRP_START = 32,
+    SD_CMD33_SD_ERASE_GRP_END = 33,
+    SD_CMD34_UNTAG_SECTOR = 34,
+    SD_CMD35_ERASE_GRP_START = 35,
+    SD_CMD36_ERASE_GRP_END = 36,
+    SD_CMD37_UNTAG_ERASE_GROUP = 37,
+    SD_CMD38_ERASE = 38,
+    SD_CMD41_SD_APP_OP_COND = 41,
+    SD_CMD55_APP_CMD = 55,
+    SD_CMD58_READ_OCR = 58,
+} SdSpiCmd;
+
+/** Data tokens */
+typedef enum {
+    SD_TOKEN_START_DATA_SINGLE_BLOCK_READ = 0xFE,
+    SD_TOKEN_START_DATA_MULTIPLE_BLOCK_READ = 0xFE,
+    SD_TOKEN_START_DATA_SINGLE_BLOCK_WRITE = 0xFE,
+    SD_TOKEN_START_DATA_MULTIPLE_BLOCK_WRITE = 0xFC,
+    SD_TOKEN_STOP_DATA_MULTIPLE_BLOCK_WRITE = 0xFD,
+} SdSpiToken;
+
+/** R1 answer value */
+typedef enum {
+    SdSpi_R1_NO_ERROR = 0x00,
+    SdSpi_R1_IN_IDLE_STATE = 0x01,
+    SdSpi_R1_ERASE_RESET = 0x02,
+    SdSpi_R1_ILLEGAL_COMMAND = 0x04,
+    SdSpi_R1_COM_CRC_ERROR = 0x08,
+    SdSpi_R1_ERASE_SEQUENCE_ERROR = 0x10,
+    SdSpi_R1_ADDRESS_ERROR = 0x20,
+    SdSpi_R1_PARAMETER_ERROR = 0x40,
+} SdSpiR1;
+
+/** R2 answer value */
+typedef enum {
+    /* R2 answer value */
+    SdSpi_R2_NO_ERROR = 0x00,
+    SdSpi_R2_CARD_LOCKED = 0x01,
+    SdSpi_R2_LOCKUNLOCK_ERROR = 0x02,
+    SdSpi_R2_ERROR = 0x04,
+    SdSpi_R2_CC_ERROR = 0x08,
+    SdSpi_R2_CARD_ECC_FAILED = 0x10,
+    SdSpi_R2_WP_VIOLATION = 0x20,
+    SdSpi_R2_ERASE_PARAM = 0x40,
+    SdSpi_R2_OUTOFRANGE = 0x80,
+} SdSpiR2;
+
+static inline void sd_spi_select_card() {
+    furi_hal_gpio_write(furi_hal_sd_spi_handle->cs, false);
+    furi_delay_us(10); // Entry guard time for some SD cards
+}
+
+static inline void sd_spi_deselect_card() {
+    furi_delay_us(10); // Exit guard time for some SD cards
+    furi_hal_gpio_write(furi_hal_sd_spi_handle->cs, true);
+}
+
+static void sd_spi_bus_to_ground() {
+    furi_hal_gpio_init_ex(
+        furi_hal_sd_spi_handle->miso,
+        GpioModeOutputPushPull,
+        GpioPullNo,
+        GpioSpeedVeryHigh,
+        GpioAltFnUnused);
+    furi_hal_gpio_init_ex(
+        furi_hal_sd_spi_handle->mosi,
+        GpioModeOutputPushPull,
+        GpioPullNo,
+        GpioSpeedVeryHigh,
+        GpioAltFnUnused);
+    furi_hal_gpio_init_ex(
+        furi_hal_sd_spi_handle->sck,
+        GpioModeOutputPushPull,
+        GpioPullNo,
+        GpioSpeedVeryHigh,
+        GpioAltFnUnused);
+
+    sd_spi_select_card();
+    furi_hal_gpio_write(furi_hal_sd_spi_handle->miso, false);
+    furi_hal_gpio_write(furi_hal_sd_spi_handle->mosi, false);
+    furi_hal_gpio_write(furi_hal_sd_spi_handle->sck, false);
+}
+
+static void sd_spi_bus_rise_up() {
+    sd_spi_deselect_card();
+
+    furi_hal_gpio_init_ex(
+        furi_hal_sd_spi_handle->miso,
+        GpioModeAltFunctionPushPull,
+        GpioPullUp,
+        GpioSpeedVeryHigh,
+        GpioAltFn5SPI2);
+    furi_hal_gpio_init_ex(
+        furi_hal_sd_spi_handle->mosi,
+        GpioModeAltFunctionPushPull,
+        GpioPullUp,
+        GpioSpeedVeryHigh,
+        GpioAltFn5SPI2);
+    furi_hal_gpio_init_ex(
+        furi_hal_sd_spi_handle->sck,
+        GpioModeAltFunctionPushPull,
+        GpioPullUp,
+        GpioSpeedVeryHigh,
+        GpioAltFn5SPI2);
+}
+
+static inline uint8_t sd_spi_read_byte(void) {
+    uint8_t responce;
+    furi_check(furi_hal_spi_bus_trx(furi_hal_sd_spi_handle, NULL, &responce, 1, SD_TIMEOUT_MS));
+    return responce;
+}
+
+static inline void sd_spi_write_byte(uint8_t data) {
+    furi_check(furi_hal_spi_bus_trx(furi_hal_sd_spi_handle, &data, NULL, 1, SD_TIMEOUT_MS));
+}
+
+static inline uint8_t sd_spi_write_and_read_byte(uint8_t data) {
+    uint8_t responce;
+    furi_check(furi_hal_spi_bus_trx(furi_hal_sd_spi_handle, &data, &responce, 1, SD_TIMEOUT_MS));
+    return responce;
+}
+
+static inline void sd_spi_write_bytes(uint8_t* data, uint32_t size) {
+    furi_check(furi_hal_spi_bus_trx(furi_hal_sd_spi_handle, data, NULL, size, SD_TIMEOUT_MS));
+}
+
+static inline void sd_spi_read_bytes(uint8_t* data, uint32_t size) {
+    furi_check(furi_hal_spi_bus_trx(furi_hal_sd_spi_handle, NULL, data, size, SD_TIMEOUT_MS));
+}
+
+static inline void sd_spi_write_bytes_dma(uint8_t* data, uint32_t size) {
+    uint32_t timeout_mul = (size / 512) + 1;
+    furi_check(furi_hal_spi_bus_trx_dma(
+        furi_hal_sd_spi_handle, data, NULL, size, SD_TIMEOUT_MS * timeout_mul));
+}
+
+static inline void sd_spi_read_bytes_dma(uint8_t* data, uint32_t size) {
+    uint32_t timeout_mul = (size / 512) + 1;
+    furi_check(furi_hal_spi_bus_trx_dma(
+        furi_hal_sd_spi_handle, NULL, data, size, SD_TIMEOUT_MS * timeout_mul));
+}
+
+static uint8_t sd_spi_wait_for_data_and_read(void) {
+    uint8_t retry_count = SD_ANSWER_RETRY_COUNT;
+    uint8_t responce;
+
+    // Wait until we get a valid data
+    do {
+        responce = sd_spi_read_byte();
+        retry_count--;
+
+    } while((responce == SD_DUMMY_BYTE) && retry_count);
+
+    return responce;
+}
+
+static SdSpiStatus sd_spi_wait_for_data(uint8_t data, uint32_t timeout_ms) {
+    FuriHalCortexTimer timer = furi_hal_cortex_timer_get(timeout_ms * 1000);
+    uint8_t byte;
+
+    do {
+        byte = sd_spi_read_byte();
+        if(furi_hal_cortex_timer_is_expired(timer)) {
+            return SdSpiStatusTimeout;
+        }
+    } while((byte != data));
+
+    return SdSpiStatusOK;
+}
+
+static inline void sd_spi_deselect_card_and_purge() {
+    sd_spi_deselect_card();
+    sd_spi_read_byte();
+}
+
+static inline void sd_spi_purge_crc() {
+    sd_spi_read_byte();
+    sd_spi_read_byte();
+}
+
+static SdSpiCmdAnswer
+    sd_spi_send_cmd(SdSpiCmd cmd, uint32_t arg, uint8_t crc, SdSpiCmdAnswerType answer_type) {
+    uint8_t frame[SD_CMD_LENGTH];
+    SdSpiCmdAnswer cmd_answer = {
+        .r1 = SD_DUMMY_BYTE,
+        .r2 = SD_DUMMY_BYTE,
+        .r3 = SD_DUMMY_BYTE,
+        .r4 = SD_DUMMY_BYTE,
+        .r5 = SD_DUMMY_BYTE,
+    };
+
+    // R1 Length = NCS(0)+ 6 Bytes command + NCR(min1 max8) + 1 Bytes answer + NEC(0) = 15bytes
+    // R1b identical to R1 + Busy information
+    // R2 Length = NCS(0)+ 6 Bytes command + NCR(min1 max8) + 2 Bytes answer + NEC(0) = 16bytes
+
+    frame[0] = ((uint8_t)cmd | 0x40);
+    frame[1] = (uint8_t)(arg >> 24);
+    frame[2] = (uint8_t)(arg >> 16);
+    frame[3] = (uint8_t)(arg >> 8);
+    frame[4] = (uint8_t)(arg);
+    frame[5] = (crc | 0x01);
+
+    sd_spi_select_card();
+    sd_spi_write_bytes(frame, sizeof(frame));
+
+    switch(answer_type) {
+    case SdSpiCmdAnswerTypeR1:
+        cmd_answer.r1 = sd_spi_wait_for_data_and_read();
+        break;
+    case SdSpiCmdAnswerTypeR1B:
+        // TODO: can be wrong, at least for SD_CMD12_STOP_TRANSMISSION you need to purge one byte before reading R1
+        cmd_answer.r1 = sd_spi_wait_for_data_and_read();
+
+        // In general this shenenigans seems suspicious, please double check SD specs if you are using SdSpiCmdAnswerTypeR1B
+        // reassert card
+        sd_spi_deselect_card();
+        furi_delay_us(1000);
+        sd_spi_deselect_card();
+
+        // and wait for it to be ready
+        while(sd_spi_read_byte() != 0xFF) {
+        };
+
+        break;
+    case SdSpiCmdAnswerTypeR2:
+        cmd_answer.r1 = sd_spi_wait_for_data_and_read();
+        cmd_answer.r2 = sd_spi_read_byte();
+        break;
+    case SdSpiCmdAnswerTypeR3:
+    case SdSpiCmdAnswerTypeR7:
+        cmd_answer.r1 = sd_spi_wait_for_data_and_read();
+        cmd_answer.r2 = sd_spi_read_byte();
+        cmd_answer.r3 = sd_spi_read_byte();
+        cmd_answer.r4 = sd_spi_read_byte();
+        cmd_answer.r5 = sd_spi_read_byte();
+        break;
+    default:
+        break;
+    }
+    return cmd_answer;
+}
+
+static SdSpiDataResponce sd_spi_get_data_response(uint32_t timeout_ms) {
+    SdSpiDataResponce responce = sd_spi_read_byte();
+    // read busy response byte
+    sd_spi_read_byte();
+
+    switch(responce & 0x1F) {
+    case SdSpiDataResponceOK:
+        // TODO: check timings
+        sd_spi_deselect_card();
+        sd_spi_select_card();
+
+        // wait for 0xFF
+        if(sd_spi_wait_for_data(0xFF, timeout_ms) == SdSpiStatusOK) {
+            return SdSpiDataResponceOK;
+        } else {
+            return SdSpiDataResponceOtherError;
+        }
+    case SdSpiDataResponceCRCError:
+        return SdSpiDataResponceCRCError;
+    case SdSpiDataResponceWriteError:
+        return SdSpiDataResponceWriteError;
+    default:
+        return SdSpiDataResponceOtherError;
+    }
+}
+
+static SdSpiStatus sd_spi_init_spi_mode_v1(void) {
+    SdSpiCmdAnswer response;
+    uint8_t retry_count = 0;
+
+    sd_spi_debug("Init SD card in SPI mode v1");
+
+    do {
+        retry_count++;
+
+        // CMD55 (APP_CMD) before any ACMD command: R1 response (0x00: no errors)
+        sd_spi_send_cmd(SD_CMD55_APP_CMD, 0, 0xFF, SdSpiCmdAnswerTypeR1);
+        sd_spi_deselect_card_and_purge();
+
+        // ACMD41 (SD_APP_OP_COND) to initialize SDHC or SDXC cards: R1 response (0x00: no errors)
+        response = sd_spi_send_cmd(SD_CMD41_SD_APP_OP_COND, 0, 0xFF, SdSpiCmdAnswerTypeR1);
+        sd_spi_deselect_card_and_purge();
+
+        if(retry_count >= SD_IDLE_RETRY_COUNT) {
+            return SdSpiStatusError;
+        }
+    } while(response.r1 == SdSpi_R1_IN_IDLE_STATE);
+
+    sd_spi_debug("Init SD card in SPI mode v1 done");
+
+    return SdSpiStatusOK;
+}
+
+static SdSpiStatus sd_spi_init_spi_mode_v2(void) {
+    SdSpiCmdAnswer response;
+    uint8_t retry_count = 0;
+
+    sd_spi_debug("Init SD card in SPI mode v2");
+
+    do {
+        retry_count++;
+        // CMD55 (APP_CMD) before any ACMD command: R1 response (0x00: no errors)
+        sd_spi_send_cmd(SD_CMD55_APP_CMD, 0, 0xFF, SdSpiCmdAnswerTypeR1);
+        sd_spi_deselect_card_and_purge();
+
+        // ACMD41 (APP_OP_COND) to initialize SDHC or SDXC cards: R1 response (0x00: no errors)
+        response =
+            sd_spi_send_cmd(SD_CMD41_SD_APP_OP_COND, 0x40000000, 0xFF, SdSpiCmdAnswerTypeR1);
+        sd_spi_deselect_card_and_purge();
+
+        if(retry_count >= SD_IDLE_RETRY_COUNT) {
+            sd_spi_debug("ACMD41 failed");
+            return SdSpiStatusError;
+        }
+    } while(response.r1 == SdSpi_R1_IN_IDLE_STATE);
+
+    if(FLAG_SET(response.r1, SdSpi_R1_ILLEGAL_COMMAND)) {
+        sd_spi_debug("ACMD41 is illegal command");
+        retry_count = 0;
+        do {
+            retry_count++;
+            // CMD55 (APP_CMD) before any ACMD command: R1 response (0x00: no errors)
+            response = sd_spi_send_cmd(SD_CMD55_APP_CMD, 0, 0xFF, SdSpiCmdAnswerTypeR1);
+            sd_spi_deselect_card_and_purge();
+
+            if(response.r1 != SdSpi_R1_IN_IDLE_STATE) {
+                sd_spi_debug("CMD55 failed");
+                return SdSpiStatusError;
+            }
+            // ACMD41 (SD_APP_OP_COND) to initialize SDHC or SDXC cards: R1 response (0x00: no errors)
+            response = sd_spi_send_cmd(SD_CMD41_SD_APP_OP_COND, 0, 0xFF, SdSpiCmdAnswerTypeR1);
+            sd_spi_deselect_card_and_purge();
+
+            if(retry_count >= SD_IDLE_RETRY_COUNT) {
+                sd_spi_debug("ACMD41 failed");
+                return SdSpiStatusError;
+            }
+        } while(response.r1 == SdSpi_R1_IN_IDLE_STATE);
+    }
+
+    sd_spi_debug("Init SD card in SPI mode v2 done");
+
+    return SdSpiStatusOK;
+}
+
+static SdSpiStatus sd_spi_init_spi_mode(void) {
+    SdSpiCmdAnswer response;
+    uint8_t retry_count;
+
+    // CMD0 (GO_IDLE_STATE) to put SD in SPI mode and
+    // wait for In Idle State Response (R1 Format) equal to 0x01
+    retry_count = 0;
+    do {
+        retry_count++;
+        response = sd_spi_send_cmd(SD_CMD0_GO_IDLE_STATE, 0, 0x95, SdSpiCmdAnswerTypeR1);
+        sd_spi_deselect_card_and_purge();
+
+        if(retry_count >= SD_IDLE_RETRY_COUNT) {
+            sd_spi_debug("CMD0 failed");
+            return SdSpiStatusError;
+        }
+    } while(response.r1 != SdSpi_R1_IN_IDLE_STATE);
+
+    // CMD8 (SEND_IF_COND) to check the power supply status
+    // and wait until response (R7 Format) equal to 0xAA and
+    response = sd_spi_send_cmd(SD_CMD8_SEND_IF_COND, 0x1AA, 0x87, SdSpiCmdAnswerTypeR7);
+    sd_spi_deselect_card_and_purge();
+
+    if(FLAG_SET(response.r1, SdSpi_R1_ILLEGAL_COMMAND)) {
+        if(sd_spi_init_spi_mode_v1() != SdSpiStatusOK) {
+            sd_spi_debug("Init mode v1 failed");
+            return SdSpiStatusError;
+        }
+        sd_high_capacity = 0;
+    } else if(response.r1 == SdSpi_R1_IN_IDLE_STATE) {
+        if(sd_spi_init_spi_mode_v2() != SdSpiStatusOK) {
+            sd_spi_debug("Init mode v2 failed");
+            return SdSpiStatusError;
+        }
+
+        // CMD58 (READ_OCR) to initialize SDHC or SDXC cards: R3 response
+        response = sd_spi_send_cmd(SD_CMD58_READ_OCR, 0, 0xFF, SdSpiCmdAnswerTypeR3);
+        sd_spi_deselect_card_and_purge();
+
+        if(response.r1 != SdSpi_R1_NO_ERROR) {
+            sd_spi_debug("CMD58 failed");
+            return SdSpiStatusError;
+        }
+        sd_high_capacity = (response.r2 & 0x40) >> 6;
+    } else {
+        return SdSpiStatusError;
+    }
+
+    sd_spi_debug("SD card is %s", sd_high_capacity ? "SDHC or SDXC" : "SDSC");
+    return SdSpiStatusOK;
+}
+
+static SdSpiStatus sd_spi_get_csd(SD_CSD* csd) {
+    uint16_t counter = 0;
+    uint8_t csd_data[16];
+    SdSpiStatus ret = SdSpiStatusError;
+    SdSpiCmdAnswer response;
+
+    // CMD9 (SEND_CSD): R1 format (0x00 is no errors)
+    response = sd_spi_send_cmd(SD_CMD9_SEND_CSD, 0, 0xFF, SdSpiCmdAnswerTypeR1);
+
+    if(response.r1 == SdSpi_R1_NO_ERROR) {
+        if(sd_spi_wait_for_data(SD_TOKEN_START_DATA_SINGLE_BLOCK_READ, SD_TIMEOUT_MS) ==
+           SdSpiStatusOK) {
+            // read CSD data
+            for(counter = 0; counter < 16; counter++) {
+                csd_data[counter] = sd_spi_read_byte();
+            }
+
+            sd_spi_purge_crc();
+
+            /*************************************************************************
+            CSD header decoding 
+            *************************************************************************/
+
+            csd->CSDStruct = (csd_data[0] & 0xC0) >> 6;
+            csd->Reserved1 = csd_data[0] & 0x3F;
+            csd->TAAC = csd_data[1];
+            csd->NSAC = csd_data[2];
+            csd->MaxBusClkFrec = csd_data[3];
+            csd->CardComdClasses = (csd_data[4] << 4) | ((csd_data[5] & 0xF0) >> 4);
+            csd->RdBlockLen = csd_data[5] & 0x0F;
+            csd->PartBlockRead = (csd_data[6] & 0x80) >> 7;
+            csd->WrBlockMisalign = (csd_data[6] & 0x40) >> 6;
+            csd->RdBlockMisalign = (csd_data[6] & 0x20) >> 5;
+            csd->DSRImpl = (csd_data[6] & 0x10) >> 4;
+
+            /*************************************************************************
+            CSD v1/v2 decoding  
+            *************************************************************************/
+
+            if(sd_high_capacity == 0) {
+                csd->version.v1.Reserved1 = ((csd_data[6] & 0x0C) >> 2);
+                csd->version.v1.DeviceSize = ((csd_data[6] & 0x03) << 10) | (csd_data[7] << 2) |
+                                             ((csd_data[8] & 0xC0) >> 6);
+                csd->version.v1.MaxRdCurrentVDDMin = (csd_data[8] & 0x38) >> 3;
+                csd->version.v1.MaxRdCurrentVDDMax = (csd_data[8] & 0x07);
+                csd->version.v1.MaxWrCurrentVDDMin = (csd_data[9] & 0xE0) >> 5;
+                csd->version.v1.MaxWrCurrentVDDMax = (csd_data[9] & 0x1C) >> 2;
+                csd->version.v1.DeviceSizeMul = ((csd_data[9] & 0x03) << 1) |
+                                                ((csd_data[10] & 0x80) >> 7);
+            } else {
+                csd->version.v2.Reserved1 = ((csd_data[6] & 0x0F) << 2) |
+                                            ((csd_data[7] & 0xC0) >> 6);
+                csd->version.v2.DeviceSize = ((csd_data[7] & 0x3F) << 16) | (csd_data[8] << 8) |
+                                             csd_data[9];
+                csd->version.v2.Reserved2 = ((csd_data[10] & 0x80) >> 8);
+            }
+
+            csd->EraseSingleBlockEnable = (csd_data[10] & 0x40) >> 6;
+            csd->EraseSectorSize = ((csd_data[10] & 0x3F) << 1) | ((csd_data[11] & 0x80) >> 7);
+            csd->WrProtectGrSize = (csd_data[11] & 0x7F);
+            csd->WrProtectGrEnable = (csd_data[12] & 0x80) >> 7;
+            csd->Reserved2 = (csd_data[12] & 0x60) >> 5;
+            csd->WrSpeedFact = (csd_data[12] & 0x1C) >> 2;
+            csd->MaxWrBlockLen = ((csd_data[12] & 0x03) << 2) | ((csd_data[13] & 0xC0) >> 6);
+            csd->WriteBlockPartial = (csd_data[13] & 0x20) >> 5;
+            csd->Reserved3 = (csd_data[13] & 0x1F);
+            csd->FileFormatGrouop = (csd_data[14] & 0x80) >> 7;
+            csd->CopyFlag = (csd_data[14] & 0x40) >> 6;
+            csd->PermWrProtect = (csd_data[14] & 0x20) >> 5;
+            csd->TempWrProtect = (csd_data[14] & 0x10) >> 4;
+            csd->FileFormat = (csd_data[14] & 0x0C) >> 2;
+            csd->Reserved4 = (csd_data[14] & 0x03);
+            csd->crc = (csd_data[15] & 0xFE) >> 1;
+            csd->Reserved5 = (csd_data[15] & 0x01);
+
+            ret = SdSpiStatusOK;
+        }
+    }
+
+    sd_spi_deselect_card_and_purge();
+
+    return ret;
+}
+
+static SdSpiStatus sd_spi_get_cid(SD_CID* Cid) {
+    uint16_t counter = 0;
+    uint8_t cid_data[16];
+    SdSpiStatus ret = SdSpiStatusError;
+    SdSpiCmdAnswer response;
+
+    // CMD10 (SEND_CID): R1 format (0x00 is no errors)
+    response = sd_spi_send_cmd(SD_CMD10_SEND_CID, 0, 0xFF, SdSpiCmdAnswerTypeR1);
+
+    if(response.r1 == SdSpi_R1_NO_ERROR) {
+        if(sd_spi_wait_for_data(SD_TOKEN_START_DATA_SINGLE_BLOCK_READ, SD_TIMEOUT_MS) ==
+           SdSpiStatusOK) {
+            // read CID data
+            for(counter = 0; counter < 16; counter++) {
+                cid_data[counter] = sd_spi_read_byte();
+            }
+
+            sd_spi_purge_crc();
+
+            Cid->ManufacturerID = cid_data[0];
+            memcpy(Cid->OEM_AppliID, cid_data + 1, 2);
+            memcpy(Cid->ProdName, cid_data + 3, 5);
+            Cid->ProdRev = cid_data[8];
+            Cid->ProdSN = cid_data[9] << 24;
+            Cid->ProdSN |= cid_data[10] << 16;
+            Cid->ProdSN |= cid_data[11] << 8;
+            Cid->ProdSN |= cid_data[12];
+            Cid->Reserved1 = (cid_data[13] & 0xF0) >> 4;
+            Cid->ManufactYear = (cid_data[13] & 0x0F) << 4;
+            Cid->CID_CRC = (cid_data[15] & 0xFE) >> 1;
+            Cid->Reserved2 = 1;
+
+            ret = SdSpiStatusOK;
+        }
+    }
+
+    sd_spi_deselect_card_and_purge();
+
+    return ret;
+}
+
+static inline bool sd_cache_get(uint32_t address, uint32_t* data) {
+    uint8_t* cached_data = sector_cache_get(address);
+    if(cached_data) {
+        memcpy(data, cached_data, SD_BLOCK_SIZE);
+        return true;
+    }
+    return false;
+}
+
+static inline void sd_cache_put(uint32_t address, uint32_t* data) {
+    sector_cache_put(address, (uint8_t*)data);
+}
+
+static inline void sd_cache_invalidate_range(uint32_t start_sector, uint32_t end_sector) {
+    sector_cache_invalidate_range(start_sector, end_sector);
+}
+
+static SdSpiStatus
+    sd_spi_cmd_read_blocks(uint32_t* data, uint32_t address, uint32_t blocks, uint32_t timeout_ms) {
+    uint32_t block_address = address;
+    uint32_t offset = 0;
+
+    // CMD16 (SET_BLOCKLEN): R1 response (0x00: no errors)
+    SdSpiCmdAnswer response =
+        sd_spi_send_cmd(SD_CMD16_SET_BLOCKLEN, SD_BLOCK_SIZE, 0xFF, SdSpiCmdAnswerTypeR1);
+    sd_spi_deselect_card_and_purge();
+
+    if(response.r1 != SdSpi_R1_NO_ERROR) {
+        return SdSpiStatusError;
+    }
+
+    if(!sd_high_capacity) {
+        block_address = address * SD_BLOCK_SIZE;
+    }
+
+    while(blocks--) {
+        // CMD17 (READ_SINGLE_BLOCK): R1 response (0x00: no errors)
+        response =
+            sd_spi_send_cmd(SD_CMD17_READ_SINGLE_BLOCK, block_address, 0xFF, SdSpiCmdAnswerTypeR1);
+        if(response.r1 != SdSpi_R1_NO_ERROR) {
+            sd_spi_deselect_card_and_purge();
+            return SdSpiStatusError;
+        }
+
+        // Wait for the data start token
+        if(sd_spi_wait_for_data(SD_TOKEN_START_DATA_SINGLE_BLOCK_READ, timeout_ms) ==
+           SdSpiStatusOK) {
+            // Read the data block
+            sd_spi_read_bytes_dma((uint8_t*)data + offset, SD_BLOCK_SIZE);
+            sd_spi_purge_crc();
+
+            // increase offset
+            offset += SD_BLOCK_SIZE;
+
+            // increase block address
+            if(sd_high_capacity) {
+                block_address += 1;
+            } else {
+                block_address += SD_BLOCK_SIZE;
+            }
+        } else {
+            sd_spi_deselect_card_and_purge();
+            return SdSpiStatusError;
+        }
+
+        sd_spi_deselect_card_and_purge();
+    }
+
+    return SdSpiStatusOK;
+}
+
+static SdSpiStatus sd_spi_cmd_write_blocks(
+    uint32_t* data,
+    uint32_t address,
+    uint32_t blocks,
+    uint32_t timeout_ms) {
+    uint32_t block_address = address;
+    uint32_t offset = 0;
+
+    // CMD16 (SET_BLOCKLEN): R1 response (0x00: no errors)
+    SdSpiCmdAnswer response =
+        sd_spi_send_cmd(SD_CMD16_SET_BLOCKLEN, SD_BLOCK_SIZE, 0xFF, SdSpiCmdAnswerTypeR1);
+    sd_spi_deselect_card_and_purge();
+
+    if(response.r1 != SdSpi_R1_NO_ERROR) {
+        return SdSpiStatusError;
+    }
+
+    if(!sd_high_capacity) {
+        block_address = address * SD_BLOCK_SIZE;
+    }
+
+    while(blocks--) {
+        // CMD24 (WRITE_SINGLE_BLOCK): R1 response (0x00: no errors)
+        response = sd_spi_send_cmd(
+            SD_CMD24_WRITE_SINGLE_BLOCK, block_address, 0xFF, SdSpiCmdAnswerTypeR1);
+        if(response.r1 != SdSpi_R1_NO_ERROR) {
+            sd_spi_deselect_card_and_purge();
+            return SdSpiStatusError;
+        }
+
+        // Send dummy byte for NWR timing : one byte between CMD_WRITE and TOKEN
+        // TODO: check bytes count
+        sd_spi_write_byte(SD_DUMMY_BYTE);
+        sd_spi_write_byte(SD_DUMMY_BYTE);
+
+        // Send the data start token
+        sd_spi_write_byte(SD_TOKEN_START_DATA_SINGLE_BLOCK_WRITE);
+        sd_spi_write_bytes_dma((uint8_t*)data + offset, SD_BLOCK_SIZE);
+        sd_spi_purge_crc();
+
+        // Read data response
+        SdSpiDataResponce data_responce = sd_spi_get_data_response(timeout_ms);
+        sd_spi_deselect_card_and_purge();
+
+        if(data_responce != SdSpiDataResponceOK) {
+            return SdSpiStatusError;
+        }
+
+        // increase offset
+        offset += SD_BLOCK_SIZE;
+
+        // increase block address
+        if(sd_high_capacity) {
+            block_address += 1;
+        } else {
+            block_address += SD_BLOCK_SIZE;
+        }
+    }
+
+    return SdSpiStatusOK;
+}
+
+uint8_t sd_max_mount_retry_count() {
+    return 10;
+}
+
+SdSpiStatus sd_init(bool power_reset) {
+    // Slow speed init
+    furi_hal_spi_acquire(&furi_hal_spi_bus_handle_sd_slow);
+    furi_hal_sd_spi_handle = &furi_hal_spi_bus_handle_sd_slow;
+
+    // We reset card in spi_lock context, so it is safe to disturb spi bus
+    if(power_reset) {
+        sd_spi_debug("Power reset");
+
+        // disable power and set low on all bus pins
+        furi_hal_power_disable_external_3_3v();
+        sd_spi_bus_to_ground();
+        hal_sd_detect_set_low();
+        furi_delay_ms(250);
+
+        // reinit bus and enable power
+        sd_spi_bus_rise_up();
+        hal_sd_detect_init();
+        furi_hal_power_enable_external_3_3v();
+        furi_delay_ms(100);
+    }
+
+    SdSpiStatus status = SdSpiStatusError;
+
+    // Send 80 dummy clocks with CS high
+    sd_spi_deselect_card();
+    for(uint8_t i = 0; i < 80; i++) {
+        sd_spi_write_byte(SD_DUMMY_BYTE);
+    }
+
+    for(uint8_t i = 0; i < 128; i++) {
+        status = sd_spi_init_spi_mode();
+        if(status == SdSpiStatusOK) {
+            // SD initialized and init to SPI mode properly
+            sd_spi_debug("SD init OK after %d retries", i);
+            break;
+        }
+    }
+
+    furi_hal_sd_spi_handle = NULL;
+    furi_hal_spi_release(&furi_hal_spi_bus_handle_sd_slow);
+
+    // Init sector cache
+    sector_cache_init();
+
+    return status;
+}
+
+SdSpiStatus sd_get_card_state(void) {
+    SdSpiCmdAnswer response;
+
+    // Send CMD13 (SEND_STATUS) to get SD status
+    response = sd_spi_send_cmd(SD_CMD13_SEND_STATUS, 0, 0xFF, SdSpiCmdAnswerTypeR2);
+    sd_spi_deselect_card_and_purge();
+
+    // Return status OK if response is valid
+    if((response.r1 == SdSpi_R1_NO_ERROR) && (response.r2 == SdSpi_R2_NO_ERROR)) {
+        return SdSpiStatusOK;
+    }
+
+    return SdSpiStatusError;
+}
+
+SdSpiStatus sd_get_card_info(SD_CardInfo* card_info) {
+    SdSpiStatus status;
+
+    status = sd_spi_get_csd(&(card_info->Csd));
+
+    if(status != SdSpiStatusOK) {
+        return status;
+    }
+
+    status = sd_spi_get_cid(&(card_info->Cid));
+
+    if(status != SdSpiStatusOK) {
+        return status;
+    }
+
+    if(sd_high_capacity == 1) {
+        card_info->LogBlockSize = 512;
+        card_info->CardBlockSize = 512;
+        card_info->CardCapacity = ((uint64_t)card_info->Csd.version.v2.DeviceSize + 1UL) * 1024UL *
+                                  (uint64_t)card_info->LogBlockSize;
+        card_info->LogBlockNbr = (card_info->CardCapacity) / (card_info->LogBlockSize);
+    } else {
+        card_info->CardCapacity = (card_info->Csd.version.v1.DeviceSize + 1);
+        card_info->CardCapacity *= (1UL << (card_info->Csd.version.v1.DeviceSizeMul + 2));
+        card_info->LogBlockSize = 512;
+        card_info->CardBlockSize = 1UL << (card_info->Csd.RdBlockLen);
+        card_info->CardCapacity *= card_info->CardBlockSize;
+        card_info->LogBlockNbr = (card_info->CardCapacity) / (card_info->LogBlockSize);
+    }
+
+    return status;
+}
+
+SdSpiStatus
+    sd_read_blocks(uint32_t* data, uint32_t address, uint32_t blocks, uint32_t timeout_ms) {
+    SdSpiStatus status = SdSpiStatusError;
+
+    bool single_sector_read = (blocks == 1);
+
+    if(single_sector_read) {
+        if(sd_cache_get(address, data)) {
+            return SdSpiStatusOK;
+        }
+
+        status = sd_spi_cmd_read_blocks(data, address, blocks, timeout_ms);
+
+        if(status == SdSpiStatusOK) {
+            sd_cache_put(address, data);
+        }
+    } else {
+        status = sd_spi_cmd_read_blocks(data, address, blocks, timeout_ms);
+    }
+
+    return status;
+}
+
+SdSpiStatus
+    sd_write_blocks(uint32_t* data, uint32_t address, uint32_t blocks, uint32_t timeout_ms) {
+    sd_cache_invalidate_range(address, address + blocks);
+    SdSpiStatus status = sd_spi_cmd_write_blocks(data, address, blocks, timeout_ms);
+    return status;
+}
+
+SdSpiStatus sd_get_cid(SD_CID* cid) {
+    SdSpiStatus status;
+
+    furi_hal_spi_acquire(&furi_hal_spi_bus_handle_sd_fast);
+    furi_hal_sd_spi_handle = &furi_hal_spi_bus_handle_sd_fast;
+
+    memset(cid, 0, sizeof(SD_CID));
+    status = sd_spi_get_cid(cid);
+
+    furi_hal_sd_spi_handle = NULL;
+    furi_hal_spi_release(&furi_hal_spi_bus_handle_sd_fast);
+
+    return status;
+}

firmware/targets/f7/fatfs/sd_spi_io.h

@@ -0,0 +1,157 @@
+#pragma once
+#include <stdint.h>
+#include <stdbool.h>
+
+#define __IO volatile
+
+#define SD_TIMEOUT_MS (1000)
+
+typedef enum {
+    SdSpiStatusOK,
+    SdSpiStatusError,
+    SdSpiStatusTimeout,
+} SdSpiStatus;
+
+/**
+ * @brief Card Specific Data: CSD Register
+ */
+typedef struct {
+    /* Header part */
+    uint8_t CSDStruct : 2; /* CSD structure */
+    uint8_t Reserved1 : 6; /* Reserved */
+    uint8_t TAAC : 8; /* Data read access-time 1 */
+    uint8_t NSAC : 8; /* Data read access-time 2 in CLK cycles */
+    uint8_t MaxBusClkFrec : 8; /* Max. bus clock frequency */
+    uint16_t CardComdClasses : 12; /* Card command classes */
+    uint8_t RdBlockLen : 4; /* Max. read data block length */
+    uint8_t PartBlockRead : 1; /* Partial blocks for read allowed */
+    uint8_t WrBlockMisalign : 1; /* Write block misalignment */
+    uint8_t RdBlockMisalign : 1; /* Read block misalignment */
+    uint8_t DSRImpl : 1; /* DSR implemented */
+
+    /* v1 or v2 struct */
+    union csd_version {
+        struct {
+            uint8_t Reserved1 : 2; /* Reserved */
+            uint16_t DeviceSize : 12; /* Device Size */
+            uint8_t MaxRdCurrentVDDMin : 3; /* Max. read current @ VDD min */
+            uint8_t MaxRdCurrentVDDMax : 3; /* Max. read current @ VDD max */
+            uint8_t MaxWrCurrentVDDMin : 3; /* Max. write current @ VDD min */
+            uint8_t MaxWrCurrentVDDMax : 3; /* Max. write current @ VDD max */
+            uint8_t DeviceSizeMul : 3; /* Device size multiplier */
+        } v1;
+        struct {
+            uint8_t Reserved1 : 6; /* Reserved */
+            uint32_t DeviceSize : 22; /* Device Size */
+            uint8_t Reserved2 : 1; /* Reserved */
+        } v2;
+    } version;
+
+    uint8_t EraseSingleBlockEnable : 1; /* Erase single block enable */
+    uint8_t EraseSectorSize : 7; /* Erase group size multiplier */
+    uint8_t WrProtectGrSize : 7; /* Write protect group size */
+    uint8_t WrProtectGrEnable : 1; /* Write protect group enable */
+    uint8_t Reserved2 : 2; /* Reserved */
+    uint8_t WrSpeedFact : 3; /* Write speed factor */
+    uint8_t MaxWrBlockLen : 4; /* Max. write data block length */
+    uint8_t WriteBlockPartial : 1; /* Partial blocks for write allowed */
+    uint8_t Reserved3 : 5; /* Reserved */
+    uint8_t FileFormatGrouop : 1; /* File format group */
+    uint8_t CopyFlag : 1; /* Copy flag (OTP) */
+    uint8_t PermWrProtect : 1; /* Permanent write protection */
+    uint8_t TempWrProtect : 1; /* Temporary write protection */
+    uint8_t FileFormat : 2; /* File Format */
+    uint8_t Reserved4 : 2; /* Reserved */
+    uint8_t crc : 7; /* Reserved */
+    uint8_t Reserved5 : 1; /* always 1*/
+
+} SD_CSD;
+
+/**
+ * @brief Card Identification Data: CID Register
+ */
+typedef struct {
+    uint8_t ManufacturerID; /* ManufacturerID */
+    char OEM_AppliID[2]; /* OEM/Application ID */
+    char ProdName[5]; /* Product Name */
+    uint8_t ProdRev; /* Product Revision */
+    uint32_t ProdSN; /* Product Serial Number */
+    uint8_t Reserved1; /* Reserved1 */
+    uint8_t ManufactYear; /* Manufacturing Year */
+    uint8_t ManufactMonth; /* Manufacturing Month */
+    uint8_t CID_CRC; /* CID CRC */
+    uint8_t Reserved2; /* always 1 */
+} SD_CID;
+
+/**
+ * @brief SD Card information structure
+ */
+typedef struct {
+    SD_CSD Csd;
+    SD_CID Cid;
+    uint64_t CardCapacity; /*!< Card Capacity */
+    uint32_t CardBlockSize; /*!< Card Block Size */
+    uint32_t LogBlockNbr; /*!< Specifies the Card logical Capacity in blocks   */
+    uint32_t LogBlockSize; /*!< Specifies logical block size in bytes           */
+} SD_CardInfo;
+
+/**
+ * @brief SD card max mount retry count
+ * 
+ * @return uint8_t 
+ */
+uint8_t sd_max_mount_retry_count();
+
+/**
+ * @brief Init sd card
+ * 
+ * @param power_reset reset card power
+ * @return SdSpiStatus 
+ */
+SdSpiStatus sd_init(bool power_reset);
+
+/**
+ * @brief Get card state
+ * 
+ * @return SdSpiStatus 
+ */
+SdSpiStatus sd_get_card_state(void);
+
+/**
+ * @brief Get card info
+ * 
+ * @param card_info 
+ * @return SdSpiStatus 
+ */
+SdSpiStatus sd_get_card_info(SD_CardInfo* card_info);
+
+/**
+ * @brief Read blocks
+ * 
+ * @param data 
+ * @param address 
+ * @param blocks 
+ * @param timeout_ms 
+ * @return SdSpiStatus 
+ */
+SdSpiStatus sd_read_blocks(uint32_t* data, uint32_t address, uint32_t blocks, uint32_t timeout_ms);
+
+/**
+ * @brief Write blocks
+ * 
+ * @param data 
+ * @param address 
+ * @param blocks 
+ * @param timeout_ms 
+ * @return SdSpiStatus 
+ */
+SdSpiStatus
+    sd_write_blocks(uint32_t* data, uint32_t address, uint32_t blocks, uint32_t timeout_ms);
+
+/**
+ * @brief Get card CSD register
+ * 
+ * @param Cid 
+ * @return SdSpiStatus 
+ */
+SdSpiStatus sd_get_cid(SD_CID* cid);

firmware/targets/f7/furi_hal/furi_hal_spi.c

@@ -1,14 +1,33 @@
+#include <furi.h>
 #include <furi_hal_spi.h>
 #include <furi_hal_resources.h>
 #include <furi_hal_power.h>
+#include <furi_hal_interrupt.h>
 
-#include <stdbool.h>
-#include <string.h>
-
+#include <stm32wbxx_ll_dma.h>
 #include <stm32wbxx_ll_spi.h>
 #include <stm32wbxx_ll_utils.h>
 #include <stm32wbxx_ll_cortex.h>
 
+#define TAG "FuriHalSpi"
+
+#define SPI_DMA DMA2
+#define SPI_DMA_RX_CHANNEL LL_DMA_CHANNEL_3
+#define SPI_DMA_TX_CHANNEL LL_DMA_CHANNEL_4
+#define SPI_DMA_RX_IRQ FuriHalInterruptIdDma2Ch3
+#define SPI_DMA_TX_IRQ FuriHalInterruptIdDma2Ch4
+#define SPI_DMA_RX_DEF SPI_DMA, SPI_DMA_RX_CHANNEL
+#define SPI_DMA_TX_DEF SPI_DMA, SPI_DMA_TX_CHANNEL
+
+// For simplicity, I assume that only one SPI DMA transaction can occur at a time.
+static FuriSemaphore* spi_dma_lock = NULL;
+static FuriSemaphore* spi_dma_completed = NULL;
+
+void furi_hal_spi_dma_init() {
+    spi_dma_lock = furi_semaphore_alloc(1, 1);
+    spi_dma_completed = furi_semaphore_alloc(1, 1);
+}
+
 void furi_hal_spi_bus_init(FuriHalSpiBus* bus) {
     furi_assert(bus);
     bus->callback(bus, FuriHalSpiBusEventInit);
@@ -84,7 +103,7 @@ bool furi_hal_spi_bus_rx(
 
 bool furi_hal_spi_bus_tx(
     FuriHalSpiBusHandle* handle,
-    uint8_t* buffer,
+    const uint8_t* buffer,
     size_t size,
     uint32_t timeout) {
     furi_assert(handle);
@@ -109,7 +128,7 @@ bool furi_hal_spi_bus_tx(
 
 bool furi_hal_spi_bus_trx(
     FuriHalSpiBusHandle* handle,
-    uint8_t* tx_buffer,
+    const uint8_t* tx_buffer,
     uint8_t* rx_buffer,
     size_t size,
     uint32_t timeout) {
@@ -149,3 +168,209 @@ bool furi_hal_spi_bus_trx(
 
     return ret;
 }
+
+static void spi_dma_isr() {
+#if SPI_DMA_RX_CHANNEL == LL_DMA_CHANNEL_3
+    if(LL_DMA_IsActiveFlag_TC3(SPI_DMA) && LL_DMA_IsEnabledIT_TC(SPI_DMA_RX_DEF)) {
+        LL_DMA_ClearFlag_TC3(SPI_DMA);
+        furi_check(furi_semaphore_release(spi_dma_completed) == FuriStatusOk);
+    }
+#else
+#error Update this code. Would you kindly?
+#endif
+
+#if SPI_DMA_TX_CHANNEL == LL_DMA_CHANNEL_4
+    if(LL_DMA_IsActiveFlag_TC4(SPI_DMA) && LL_DMA_IsEnabledIT_TC(SPI_DMA_TX_DEF)) {
+        LL_DMA_ClearFlag_TC4(SPI_DMA);
+        furi_check(furi_semaphore_release(spi_dma_completed) == FuriStatusOk);
+    }
+#else
+#error Update this code. Would you kindly?
+#endif
+}
+
+bool furi_hal_spi_bus_trx_dma(
+    FuriHalSpiBusHandle* handle,
+    uint8_t* tx_buffer,
+    uint8_t* rx_buffer,
+    size_t size,
+    uint32_t timeout_ms) {
+    furi_assert(handle);
+    furi_assert(handle->bus->current_handle == handle);
+    furi_assert(size > 0);
+
+    // If scheduler is not running, use blocking mode
+    if(xTaskGetSchedulerState() != taskSCHEDULER_RUNNING) {
+        return furi_hal_spi_bus_trx(handle, tx_buffer, rx_buffer, size, timeout_ms);
+    }
+
+    // Lock DMA
+    furi_check(furi_semaphore_acquire(spi_dma_lock, FuriWaitForever) == FuriStatusOk);
+
+    const uint32_t dma_dummy_u32 = 0xFFFFFFFF;
+
+    bool ret = true;
+    SPI_TypeDef* spi = handle->bus->spi;
+    uint32_t dma_rx_req;
+    uint32_t dma_tx_req;
+
+    if(spi == SPI1) {
+        dma_rx_req = LL_DMAMUX_REQ_SPI1_RX;
+        dma_tx_req = LL_DMAMUX_REQ_SPI1_TX;
+    } else if(spi == SPI2) {
+        dma_rx_req = LL_DMAMUX_REQ_SPI2_RX;
+        dma_tx_req = LL_DMAMUX_REQ_SPI2_TX;
+    } else {
+        furi_crash(NULL);
+    }
+
+    if(rx_buffer == NULL) {
+        // Only TX mode, do not use RX channel
+
+        LL_DMA_InitTypeDef dma_config = {0};
+        dma_config.PeriphOrM2MSrcAddress = (uint32_t) & (spi->DR);
+        dma_config.MemoryOrM2MDstAddress = (uint32_t)tx_buffer;
+        dma_config.Direction = LL_DMA_DIRECTION_MEMORY_TO_PERIPH;
+        dma_config.Mode = LL_DMA_MODE_NORMAL;
+        dma_config.PeriphOrM2MSrcIncMode = LL_DMA_PERIPH_NOINCREMENT;
+        dma_config.MemoryOrM2MDstIncMode = LL_DMA_MEMORY_INCREMENT;
+        dma_config.PeriphOrM2MSrcDataSize = LL_DMA_PDATAALIGN_BYTE;
+        dma_config.MemoryOrM2MDstDataSize = LL_DMA_MDATAALIGN_BYTE;
+        dma_config.NbData = size;
+        dma_config.PeriphRequest = dma_tx_req;
+        dma_config.Priority = LL_DMA_PRIORITY_MEDIUM;
+        LL_DMA_Init(SPI_DMA_TX_DEF, &dma_config);
+
+#if SPI_DMA_TX_CHANNEL == LL_DMA_CHANNEL_4
+        LL_DMA_ClearFlag_TC4(SPI_DMA);
+#else
+#error Update this code. Would you kindly?
+#endif
+
+        furi_hal_interrupt_set_isr(SPI_DMA_TX_IRQ, spi_dma_isr, NULL);
+
+        bool dma_tx_was_enabled = LL_SPI_IsEnabledDMAReq_TX(spi);
+        if(!dma_tx_was_enabled) {
+            LL_SPI_EnableDMAReq_TX(spi);
+        }
+
+        // acquire semaphore before enabling DMA
+        furi_check(furi_semaphore_acquire(spi_dma_completed, timeout_ms) == FuriStatusOk);
+
+        LL_DMA_EnableIT_TC(SPI_DMA_TX_DEF);
+        LL_DMA_EnableChannel(SPI_DMA_TX_DEF);
+
+        // and wait for it to be released (DMA transfer complete)
+        if(furi_semaphore_acquire(spi_dma_completed, timeout_ms) != FuriStatusOk) {
+            ret = false;
+            FURI_LOG_E(TAG, "DMA timeout\r\n");
+        }
+        // release semaphore, because we are using it as a flag
+        furi_semaphore_release(spi_dma_completed);
+
+        LL_DMA_DisableIT_TC(SPI_DMA_TX_DEF);
+        LL_DMA_DisableChannel(SPI_DMA_TX_DEF);
+        if(!dma_tx_was_enabled) {
+            LL_SPI_DisableDMAReq_TX(spi);
+        }
+        furi_hal_interrupt_set_isr(SPI_DMA_TX_IRQ, NULL, NULL);
+
+        LL_DMA_DeInit(SPI_DMA_TX_DEF);
+    } else {
+        // TRX or RX mode, use both channels
+        uint32_t tx_mem_increase_mode;
+
+        if(tx_buffer == NULL) {
+            // RX mode, use dummy data instead of TX buffer
+            tx_buffer = (uint8_t*)&dma_dummy_u32;
+            tx_mem_increase_mode = LL_DMA_PERIPH_NOINCREMENT;
+        } else {
+            tx_mem_increase_mode = LL_DMA_MEMORY_INCREMENT;
+        }
+
+        LL_DMA_InitTypeDef dma_config = {0};
+        dma_config.PeriphOrM2MSrcAddress = (uint32_t) & (spi->DR);
+        dma_config.MemoryOrM2MDstAddress = (uint32_t)tx_buffer;
+        dma_config.Direction = LL_DMA_DIRECTION_MEMORY_TO_PERIPH;
+        dma_config.Mode = LL_DMA_MODE_NORMAL;
+        dma_config.PeriphOrM2MSrcIncMode = LL_DMA_PERIPH_NOINCREMENT;
+        dma_config.MemoryOrM2MDstIncMode = tx_mem_increase_mode;
+        dma_config.PeriphOrM2MSrcDataSize = LL_DMA_PDATAALIGN_BYTE;
+        dma_config.MemoryOrM2MDstDataSize = LL_DMA_MDATAALIGN_BYTE;
+        dma_config.NbData = size;
+        dma_config.PeriphRequest = dma_tx_req;
+        dma_config.Priority = LL_DMA_PRIORITY_MEDIUM;
+        LL_DMA_Init(SPI_DMA_TX_DEF, &dma_config);
+
+        dma_config.PeriphOrM2MSrcAddress = (uint32_t) & (spi->DR);
+        dma_config.MemoryOrM2MDstAddress = (uint32_t)rx_buffer;
+        dma_config.Direction = LL_DMA_DIRECTION_PERIPH_TO_MEMORY;
+        dma_config.Mode = LL_DMA_MODE_NORMAL;
+        dma_config.PeriphOrM2MSrcIncMode = LL_DMA_PERIPH_NOINCREMENT;
+        dma_config.MemoryOrM2MDstIncMode = LL_DMA_MEMORY_INCREMENT;
+        dma_config.PeriphOrM2MSrcDataSize = LL_DMA_PDATAALIGN_BYTE;
+        dma_config.MemoryOrM2MDstDataSize = LL_DMA_MDATAALIGN_BYTE;
+        dma_config.NbData = size;
+        dma_config.PeriphRequest = dma_rx_req;
+        dma_config.Priority = LL_DMA_PRIORITY_MEDIUM;
+        LL_DMA_Init(SPI_DMA_RX_DEF, &dma_config);
+
+#if SPI_DMA_RX_CHANNEL == LL_DMA_CHANNEL_3
+        LL_DMA_ClearFlag_TC3(SPI_DMA);
+#else
+#error Update this code. Would you kindly?
+#endif
+
+        furi_hal_interrupt_set_isr(SPI_DMA_RX_IRQ, spi_dma_isr, NULL);
+
+        bool dma_tx_was_enabled = LL_SPI_IsEnabledDMAReq_TX(spi);
+        bool dma_rx_was_enabled = LL_SPI_IsEnabledDMAReq_RX(spi);
+
+        if(!dma_tx_was_enabled) {
+            LL_SPI_EnableDMAReq_TX(spi);
+        }
+
+        if(!dma_rx_was_enabled) {
+            LL_SPI_EnableDMAReq_RX(spi);
+        }
+
+        // acquire semaphore before enabling DMA
+        furi_check(furi_semaphore_acquire(spi_dma_completed, timeout_ms) == FuriStatusOk);
+
+        LL_DMA_EnableIT_TC(SPI_DMA_RX_DEF);
+        LL_DMA_EnableChannel(SPI_DMA_RX_DEF);
+        LL_DMA_EnableChannel(SPI_DMA_TX_DEF);
+
+        // and wait for it to be released (DMA transfer complete)
+        if(furi_semaphore_acquire(spi_dma_completed, timeout_ms) != FuriStatusOk) {
+            ret = false;
+            FURI_LOG_E(TAG, "DMA timeout\r\n");
+        }
+        // release semaphore, because we are using it as a flag
+        furi_semaphore_release(spi_dma_completed);
+
+        LL_DMA_DisableIT_TC(SPI_DMA_RX_DEF);
+
+        LL_DMA_DisableChannel(SPI_DMA_TX_DEF);
+        LL_DMA_DisableChannel(SPI_DMA_RX_DEF);
+
+        if(!dma_tx_was_enabled) {
+            LL_SPI_DisableDMAReq_TX(spi);
+        }
+
+        if(!dma_rx_was_enabled) {
+            LL_SPI_DisableDMAReq_RX(spi);
+        }
+
+        furi_hal_interrupt_set_isr(SPI_DMA_RX_IRQ, NULL, NULL);
+
+        LL_DMA_DeInit(SPI_DMA_TX_DEF);
+        LL_DMA_DeInit(SPI_DMA_RX_DEF);
+    }
+
+    furi_hal_spi_bus_end_txrx(handle, timeout_ms);
+
+    furi_check(furi_semaphore_release(spi_dma_lock) == FuriStatusOk);
+
+    return ret;
+}