mirror of
https://github.com/Next-Flip/Momentum-Firmware.git
synced 2026-07-22 01:08:11 -07:00
Merge branch 'ofw-dev' into dev
This commit is contained in:
MX
+42
-41
@@ -1,14 +1,27 @@
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||||
#include "cc1101.h"
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#include <assert.h>
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#include <string.h>
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#include <furi_hal_cortex.h>
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static bool cc1101_spi_trx(FuriHalSpiBusHandle* handle, uint8_t* tx, uint8_t* rx, uint8_t size) {
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FuriHalCortexTimer timer = furi_hal_cortex_timer_get(CC1101_TIMEOUT * 1000);
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while(furi_hal_gpio_read(handle->miso)) {
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if(furi_hal_cortex_timer_is_expired(timer)) {
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//timeout
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return false;
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}
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}
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if(!furi_hal_spi_bus_trx(handle, tx, rx, size, CC1101_TIMEOUT)) return false;
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return true;
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}
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CC1101Status cc1101_strobe(FuriHalSpiBusHandle* handle, uint8_t strobe) {
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uint8_t tx[1] = {strobe};
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CC1101Status rx[1] = {0};
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rx[0].CHIP_RDYn = 1;
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while(furi_hal_gpio_read(handle->miso))
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;
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furi_hal_spi_bus_trx(handle, tx, (uint8_t*)rx, 1, CC1101_TIMEOUT);
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cc1101_spi_trx(handle, tx, (uint8_t*)rx, 1);
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assert(rx[0].CHIP_RDYn == 0);
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return rx[0];
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@@ -17,10 +30,10 @@ CC1101Status cc1101_strobe(FuriHalSpiBusHandle* handle, uint8_t strobe) {
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CC1101Status cc1101_write_reg(FuriHalSpiBusHandle* handle, uint8_t reg, uint8_t data) {
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uint8_t tx[2] = {reg, data};
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CC1101Status rx[2] = {0};
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rx[0].CHIP_RDYn = 1;
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rx[1].CHIP_RDYn = 1;
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while(furi_hal_gpio_read(handle->miso))
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;
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furi_hal_spi_bus_trx(handle, tx, (uint8_t*)rx, 2, CC1101_TIMEOUT);
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cc1101_spi_trx(handle, tx, (uint8_t*)rx, 2);
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assert((rx[0].CHIP_RDYn | rx[1].CHIP_RDYn) == 0);
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return rx[1];
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@@ -30,10 +43,9 @@ CC1101Status cc1101_read_reg(FuriHalSpiBusHandle* handle, uint8_t reg, uint8_t*
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assert(sizeof(CC1101Status) == 1);
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uint8_t tx[2] = {reg | CC1101_READ, 0};
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CC1101Status rx[2] = {0};
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rx[0].CHIP_RDYn = 1;
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while(furi_hal_gpio_read(handle->miso))
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;
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furi_hal_spi_bus_trx(handle, tx, (uint8_t*)rx, 2, CC1101_TIMEOUT);
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cc1101_spi_trx(handle, tx, (uint8_t*)rx, 2);
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assert((rx[0].CHIP_RDYn) == 0);
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*data = *(uint8_t*)&rx[1];
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@@ -58,40 +70,40 @@ uint8_t cc1101_get_rssi(FuriHalSpiBusHandle* handle) {
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return rssi;
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}
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void cc1101_reset(FuriHalSpiBusHandle* handle) {
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cc1101_strobe(handle, CC1101_STROBE_SRES);
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CC1101Status cc1101_reset(FuriHalSpiBusHandle* handle) {
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return cc1101_strobe(handle, CC1101_STROBE_SRES);
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}
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CC1101Status cc1101_get_status(FuriHalSpiBusHandle* handle) {
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return cc1101_strobe(handle, CC1101_STROBE_SNOP);
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}
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void cc1101_shutdown(FuriHalSpiBusHandle* handle) {
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cc1101_strobe(handle, CC1101_STROBE_SPWD);
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CC1101Status cc1101_shutdown(FuriHalSpiBusHandle* handle) {
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return cc1101_strobe(handle, CC1101_STROBE_SPWD);
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}
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void cc1101_calibrate(FuriHalSpiBusHandle* handle) {
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cc1101_strobe(handle, CC1101_STROBE_SCAL);
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CC1101Status cc1101_calibrate(FuriHalSpiBusHandle* handle) {
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return cc1101_strobe(handle, CC1101_STROBE_SCAL);
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||||
}
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void cc1101_switch_to_idle(FuriHalSpiBusHandle* handle) {
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cc1101_strobe(handle, CC1101_STROBE_SIDLE);
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||||
CC1101Status cc1101_switch_to_idle(FuriHalSpiBusHandle* handle) {
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return cc1101_strobe(handle, CC1101_STROBE_SIDLE);
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||||
}
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||||
|
||||
void cc1101_switch_to_rx(FuriHalSpiBusHandle* handle) {
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||||
cc1101_strobe(handle, CC1101_STROBE_SRX);
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||||
CC1101Status cc1101_switch_to_rx(FuriHalSpiBusHandle* handle) {
|
||||
return cc1101_strobe(handle, CC1101_STROBE_SRX);
|
||||
}
|
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void cc1101_switch_to_tx(FuriHalSpiBusHandle* handle) {
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cc1101_strobe(handle, CC1101_STROBE_STX);
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CC1101Status cc1101_switch_to_tx(FuriHalSpiBusHandle* handle) {
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||||
return cc1101_strobe(handle, CC1101_STROBE_STX);
|
||||
}
|
||||
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||||
void cc1101_flush_rx(FuriHalSpiBusHandle* handle) {
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cc1101_strobe(handle, CC1101_STROBE_SFRX);
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CC1101Status cc1101_flush_rx(FuriHalSpiBusHandle* handle) {
|
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return cc1101_strobe(handle, CC1101_STROBE_SFRX);
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}
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void cc1101_flush_tx(FuriHalSpiBusHandle* handle) {
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cc1101_strobe(handle, CC1101_STROBE_SFTX);
|
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CC1101Status cc1101_flush_tx(FuriHalSpiBusHandle* handle) {
|
||||
return cc1101_strobe(handle, CC1101_STROBE_SFTX);
|
||||
}
|
||||
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||||
uint32_t cc1101_set_frequency(FuriHalSpiBusHandle* handle, uint32_t value) {
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||||
@@ -123,12 +135,12 @@ uint32_t cc1101_set_intermediate_frequency(FuriHalSpiBusHandle* handle, uint32_t
|
||||
void cc1101_set_pa_table(FuriHalSpiBusHandle* handle, const uint8_t value[8]) {
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uint8_t tx[9] = {CC1101_PATABLE | CC1101_BURST}; //-V1009
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CC1101Status rx[9] = {0};
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rx[0].CHIP_RDYn = 1;
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rx[8].CHIP_RDYn = 1;
|
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|
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memcpy(&tx[1], &value[0], 8);
|
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|
||||
while(furi_hal_gpio_read(handle->miso))
|
||||
;
|
||||
furi_hal_spi_bus_trx(handle, tx, (uint8_t*)rx, sizeof(rx), CC1101_TIMEOUT);
|
||||
cc1101_spi_trx(handle, tx, (uint8_t*)rx, sizeof(rx));
|
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|
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assert((rx[0].CHIP_RDYn | rx[8].CHIP_RDYn) == 0);
|
||||
}
|
||||
@@ -139,12 +151,7 @@ uint8_t cc1101_write_fifo(FuriHalSpiBusHandle* handle, const uint8_t* data, uint
|
||||
buff_tx[0] = CC1101_FIFO | CC1101_BURST;
|
||||
memcpy(&buff_tx[1], data, size);
|
||||
|
||||
// Start transaction
|
||||
// Wait IC to become ready
|
||||
while(furi_hal_gpio_read(handle->miso))
|
||||
;
|
||||
// Tell IC what we want
|
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furi_hal_spi_bus_trx(handle, buff_tx, (uint8_t*)buff_rx, size + 1, CC1101_TIMEOUT);
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cc1101_spi_trx(handle, buff_tx, (uint8_t*)buff_rx, size + 1);
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||||
|
||||
return size;
|
||||
}
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@@ -153,13 +160,7 @@ uint8_t cc1101_read_fifo(FuriHalSpiBusHandle* handle, uint8_t* data, uint8_t* si
|
||||
uint8_t buff_trx[2];
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||||
buff_trx[0] = CC1101_FIFO | CC1101_READ | CC1101_BURST;
|
||||
|
||||
// Start transaction
|
||||
// Wait IC to become ready
|
||||
while(furi_hal_gpio_read(handle->miso))
|
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;
|
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|
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// First byte - packet length
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furi_hal_spi_bus_trx(handle, buff_trx, buff_trx, 2, CC1101_TIMEOUT);
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cc1101_spi_trx(handle, buff_trx, buff_trx, 2);
|
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// Check that the packet is placed in the receive buffer
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if(buff_trx[1] > 64) {
|
||||
|
||||
+20
-8
@@ -46,8 +46,10 @@ CC1101Status cc1101_read_reg(FuriHalSpiBusHandle* handle, uint8_t reg, uint8_t*
|
||||
/** Reset
|
||||
*
|
||||
* @param handle - pointer to FuriHalSpiHandle
|
||||
*
|
||||
* @return CC1101Status structure
|
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*/
|
||||
void cc1101_reset(FuriHalSpiBusHandle* handle);
|
||||
CC1101Status cc1101_reset(FuriHalSpiBusHandle* handle);
|
||||
|
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/** Get status
|
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*
|
||||
@@ -60,8 +62,10 @@ CC1101Status cc1101_get_status(FuriHalSpiBusHandle* handle);
|
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/** Enable shutdown mode
|
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*
|
||||
* @param handle - pointer to FuriHalSpiHandle
|
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*
|
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* @return CC1101Status structure
|
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*/
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void cc1101_shutdown(FuriHalSpiBusHandle* handle);
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CC1101Status cc1101_shutdown(FuriHalSpiBusHandle* handle);
|
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/** Get Partnumber
|
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*
|
||||
@@ -90,38 +94,46 @@ uint8_t cc1101_get_rssi(FuriHalSpiBusHandle* handle);
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/** Calibrate oscillator
|
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*
|
||||
* @param handle - pointer to FuriHalSpiHandle
|
||||
*
|
||||
* @return CC1101Status structure
|
||||
*/
|
||||
void cc1101_calibrate(FuriHalSpiBusHandle* handle);
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CC1101Status cc1101_calibrate(FuriHalSpiBusHandle* handle);
|
||||
|
||||
/** Switch to idle
|
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*
|
||||
* @param handle - pointer to FuriHalSpiHandle
|
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*/
|
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void cc1101_switch_to_idle(FuriHalSpiBusHandle* handle);
|
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CC1101Status cc1101_switch_to_idle(FuriHalSpiBusHandle* handle);
|
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|
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/** Switch to RX
|
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*
|
||||
* @param handle - pointer to FuriHalSpiHandle
|
||||
*
|
||||
* @return CC1101Status structure
|
||||
*/
|
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void cc1101_switch_to_rx(FuriHalSpiBusHandle* handle);
|
||||
CC1101Status cc1101_switch_to_rx(FuriHalSpiBusHandle* handle);
|
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|
||||
/** Switch to TX
|
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*
|
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* @param handle - pointer to FuriHalSpiHandle
|
||||
*
|
||||
* @return CC1101Status structure
|
||||
*/
|
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void cc1101_switch_to_tx(FuriHalSpiBusHandle* handle);
|
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CC1101Status cc1101_switch_to_tx(FuriHalSpiBusHandle* handle);
|
||||
|
||||
/** Flush RX FIFO
|
||||
*
|
||||
* @param handle - pointer to FuriHalSpiHandle
|
||||
*
|
||||
* @return CC1101Status structure
|
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*/
|
||||
void cc1101_flush_rx(FuriHalSpiBusHandle* handle);
|
||||
CC1101Status cc1101_flush_rx(FuriHalSpiBusHandle* handle);
|
||||
|
||||
/** Flush TX FIFO
|
||||
*
|
||||
* @param handle - pointer to FuriHalSpiHandle
|
||||
*/
|
||||
void cc1101_flush_tx(FuriHalSpiBusHandle* handle);
|
||||
CC1101Status cc1101_flush_tx(FuriHalSpiBusHandle* handle);
|
||||
|
||||
/** Set Frequency
|
||||
*
|
||||
|
||||
@@ -14,7 +14,7 @@ extern "C" {
|
||||
#define CC1101_IFDIV 0x400
|
||||
|
||||
/* IO Bus constants */
|
||||
#define CC1101_TIMEOUT 500
|
||||
#define CC1101_TIMEOUT 250
|
||||
|
||||
/* Bits and pieces */
|
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#define CC1101_READ (1 << 7) /** Read Bit */
|
||||
|
||||
@@ -852,16 +852,20 @@ bool mf_classic_emulator(
|
||||
bool is_reader_analyzer) {
|
||||
furi_assert(emulator);
|
||||
furi_assert(tx_rx);
|
||||
bool command_processed = false;
|
||||
bool is_encrypted = false;
|
||||
uint8_t plain_data[MF_CLASSIC_MAX_DATA_SIZE];
|
||||
MfClassicKey access_key = MfClassicKeyA;
|
||||
bool need_reset = false;
|
||||
bool need_nack = false;
|
||||
bool is_encrypted = false;
|
||||
uint8_t sector = 0;
|
||||
|
||||
// Used for decrement and increment - copy to block on transfer
|
||||
uint8_t transfer_buf[MF_CLASSIC_BLOCK_SIZE] = {};
|
||||
uint8_t transfer_buf[MF_CLASSIC_BLOCK_SIZE];
|
||||
bool transfer_buf_valid = false;
|
||||
|
||||
// Read command
|
||||
while(!command_processed) { //-V654
|
||||
// Process commands
|
||||
while(!need_reset && !need_nack) { //-V654
|
||||
memset(plain_data, 0, MF_CLASSIC_MAX_DATA_SIZE);
|
||||
if(!is_encrypted) {
|
||||
crypto1_reset(&emulator->crypto);
|
||||
memcpy(plain_data, tx_rx->rx_data, tx_rx->rx_bits / 8);
|
||||
@@ -872,6 +876,7 @@ bool mf_classic_emulator(
|
||||
"Error in tx rx. Tx: %d bits, Rx: %d bits",
|
||||
tx_rx->tx_bits,
|
||||
tx_rx->rx_bits);
|
||||
need_reset = true;
|
||||
break;
|
||||
}
|
||||
crypto1_decrypt(&emulator->crypto, tx_rx->rx_data, tx_rx->rx_bits, plain_data);
|
||||
@@ -880,17 +885,20 @@ bool mf_classic_emulator(
|
||||
// After increment, decrement or restore the only allowed command is transfer
|
||||
uint8_t cmd = plain_data[0];
|
||||
if(transfer_buf_valid && cmd != MF_CLASSIC_TRANSFER_CMD) {
|
||||
need_nack = true;
|
||||
break;
|
||||
}
|
||||
|
||||
if(cmd == NFCA_CMD_HALT && plain_data[1] == 0x00) {
|
||||
FURI_LOG_T(TAG, "Halt received");
|
||||
return false;
|
||||
need_reset = true;
|
||||
break;
|
||||
}
|
||||
|
||||
if(cmd == NFCA_CMD_RATS && !is_encrypted) {
|
||||
if(cmd == NFCA_CMD_RATS) {
|
||||
// Mifare Classic doesn't support ATS, NACK it and start listening again
|
||||
FURI_LOG_T(TAG, "RATS received");
|
||||
need_nack = true;
|
||||
break;
|
||||
}
|
||||
|
||||
@@ -898,6 +906,7 @@ bool mf_classic_emulator(
|
||||
uint8_t block = plain_data[1];
|
||||
uint64_t key = 0;
|
||||
uint8_t sector_trailer_block = mf_classic_get_sector_trailer_num_by_block(block);
|
||||
sector = mf_classic_get_sector_by_block(block);
|
||||
MfClassicSectorTrailer* sector_trailer =
|
||||
(MfClassicSectorTrailer*)emulator->data.block[sector_trailer_block].value;
|
||||
if(cmd == MF_CLASSIC_AUTH_KEY_A_CMD) {
|
||||
@@ -908,7 +917,8 @@ bool mf_classic_emulator(
|
||||
access_key = MfClassicKeyA;
|
||||
} else {
|
||||
FURI_LOG_D(TAG, "Key not known");
|
||||
return false;
|
||||
need_nack = true;
|
||||
break;
|
||||
}
|
||||
} else {
|
||||
if(mf_classic_is_key_found(
|
||||
@@ -918,7 +928,8 @@ bool mf_classic_emulator(
|
||||
access_key = MfClassicKeyB;
|
||||
} else {
|
||||
FURI_LOG_D(TAG, "Key not known");
|
||||
return false;
|
||||
need_nack = true;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
@@ -949,11 +960,13 @@ bool mf_classic_emulator(
|
||||
|
||||
if(!furi_hal_nfc_tx_rx(tx_rx, 500)) {
|
||||
FURI_LOG_E(TAG, "Error in NT exchange");
|
||||
return false;
|
||||
need_reset = true;
|
||||
break;
|
||||
}
|
||||
|
||||
if(tx_rx->rx_bits != 64) {
|
||||
return false;
|
||||
need_reset = true;
|
||||
break;
|
||||
}
|
||||
|
||||
uint32_t nr = nfc_util_bytes2num(tx_rx->rx_data, 4);
|
||||
@@ -962,9 +975,15 @@ bool mf_classic_emulator(
|
||||
crypto1_word(&emulator->crypto, nr, 1);
|
||||
uint32_t cardRr = ar ^ crypto1_word(&emulator->crypto, 0, 0);
|
||||
if(cardRr != prng_successor(nonce, 64)) {
|
||||
FURI_LOG_T(TAG, "Wrong AUTH! %08lX != %08lX", cardRr, prng_successor(nonce, 64));
|
||||
FURI_LOG_T(
|
||||
TAG,
|
||||
"Wrong AUTH on block %u! %08lX != %08lX",
|
||||
block,
|
||||
cardRr,
|
||||
prng_successor(nonce, 64));
|
||||
// Don't send NACK, as the tag doesn't send it
|
||||
return false;
|
||||
need_reset = true;
|
||||
break;
|
||||
}
|
||||
|
||||
uint32_t ans = prng_successor(nonce, 96);
|
||||
@@ -986,11 +1005,25 @@ bool mf_classic_emulator(
|
||||
|
||||
if(!is_encrypted) {
|
||||
FURI_LOG_T(TAG, "Invalid command before auth session established: %02X", cmd);
|
||||
need_nack = true;
|
||||
break;
|
||||
}
|
||||
|
||||
if(cmd == MF_CLASSIC_READ_BLOCK_CMD) {
|
||||
uint8_t block = plain_data[1];
|
||||
// Mifare Classic commands always have block number after command
|
||||
uint8_t block = plain_data[1];
|
||||
if(mf_classic_get_sector_by_block(block) != sector) {
|
||||
// Don't allow access to sectors other than authorized
|
||||
FURI_LOG_T(
|
||||
TAG,
|
||||
"Trying to access block %u from not authorized sector (command: %02X)",
|
||||
block,
|
||||
cmd);
|
||||
need_nack = true;
|
||||
break;
|
||||
}
|
||||
|
||||
switch(cmd) {
|
||||
case MF_CLASSIC_READ_BLOCK_CMD: {
|
||||
uint8_t block_data[MF_CLASSIC_BLOCK_SIZE + 2] = {};
|
||||
memcpy(block_data, emulator->data.block[block].value, MF_CLASSIC_BLOCK_SIZE);
|
||||
if(mf_classic_is_sector_trailer(block)) {
|
||||
@@ -1006,17 +1039,14 @@ bool mf_classic_emulator(
|
||||
emulator, block, access_key, MfClassicActionACRead)) {
|
||||
memset(&block_data[6], 0, 4);
|
||||
}
|
||||
} else if(!mf_classic_is_allowed_access(
|
||||
emulator, block, access_key, MfClassicActionDataRead)) {
|
||||
// Send NACK
|
||||
uint8_t nack = 0x04;
|
||||
crypto1_encrypt(
|
||||
&emulator->crypto, NULL, &nack, 4, tx_rx->tx_data, tx_rx->tx_parity);
|
||||
tx_rx->tx_rx_type = FuriHalNfcTxRxTransparent;
|
||||
tx_rx->tx_bits = 4;
|
||||
furi_hal_nfc_tx_rx(tx_rx, 300);
|
||||
} else if(
|
||||
!mf_classic_is_allowed_access(
|
||||
emulator, block, access_key, MfClassicActionDataRead) ||
|
||||
!mf_classic_is_block_read(&emulator->data, block)) {
|
||||
need_nack = true;
|
||||
break;
|
||||
}
|
||||
|
||||
nfca_append_crc16(block_data, 16);
|
||||
|
||||
crypto1_encrypt(
|
||||
@@ -1028,23 +1058,36 @@ bool mf_classic_emulator(
|
||||
tx_rx->tx_parity);
|
||||
tx_rx->tx_bits = (MF_CLASSIC_BLOCK_SIZE + 2) * 8;
|
||||
tx_rx->tx_rx_type = FuriHalNfcTxRxTransparent;
|
||||
} else if(cmd == MF_CLASSIC_WRITE_BLOCK_CMD) {
|
||||
uint8_t block = plain_data[1];
|
||||
if(block > mf_classic_get_total_block_num(emulator->data.type)) {
|
||||
break;
|
||||
}
|
||||
break;
|
||||
}
|
||||
|
||||
case MF_CLASSIC_WRITE_BLOCK_CMD: {
|
||||
// Send ACK
|
||||
uint8_t ack = MF_CLASSIC_ACK_CMD;
|
||||
crypto1_encrypt(&emulator->crypto, NULL, &ack, 4, tx_rx->tx_data, tx_rx->tx_parity);
|
||||
tx_rx->tx_rx_type = FuriHalNfcTxRxTransparent;
|
||||
tx_rx->tx_bits = 4;
|
||||
|
||||
if(!furi_hal_nfc_tx_rx(tx_rx, 300)) break;
|
||||
if(tx_rx->rx_bits != (MF_CLASSIC_BLOCK_SIZE + 2) * 8) break;
|
||||
if(!furi_hal_nfc_tx_rx(tx_rx, 300)) {
|
||||
need_reset = true;
|
||||
break;
|
||||
}
|
||||
|
||||
if(tx_rx->rx_bits != (MF_CLASSIC_BLOCK_SIZE + 2) * 8) {
|
||||
need_reset = true;
|
||||
break;
|
||||
}
|
||||
|
||||
crypto1_decrypt(&emulator->crypto, tx_rx->rx_data, tx_rx->rx_bits, plain_data);
|
||||
uint8_t block_data[MF_CLASSIC_BLOCK_SIZE] = {};
|
||||
memcpy(block_data, emulator->data.block[block].value, MF_CLASSIC_BLOCK_SIZE);
|
||||
|
||||
if(!mf_classic_is_block_read(&emulator->data, block)) {
|
||||
// Don't allow writing to the block for which we haven't read data yet
|
||||
need_nack = true;
|
||||
break;
|
||||
}
|
||||
|
||||
if(mf_classic_is_sector_trailer(block)) {
|
||||
if(mf_classic_is_allowed_access(
|
||||
emulator, block, access_key, MfClassicActionKeyAWrite)) {
|
||||
@@ -1063,38 +1106,39 @@ bool mf_classic_emulator(
|
||||
emulator, block, access_key, MfClassicActionDataWrite)) {
|
||||
memcpy(block_data, plain_data, MF_CLASSIC_BLOCK_SIZE);
|
||||
} else {
|
||||
need_nack = true;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
if(memcmp(block_data, emulator->data.block[block].value, MF_CLASSIC_BLOCK_SIZE) != 0) {
|
||||
memcpy(emulator->data.block[block].value, block_data, MF_CLASSIC_BLOCK_SIZE);
|
||||
emulator->data_changed = true;
|
||||
}
|
||||
|
||||
// Send ACK
|
||||
ack = MF_CLASSIC_ACK_CMD;
|
||||
crypto1_encrypt(&emulator->crypto, NULL, &ack, 4, tx_rx->tx_data, tx_rx->tx_parity);
|
||||
tx_rx->tx_rx_type = FuriHalNfcTxRxTransparent;
|
||||
tx_rx->tx_bits = 4;
|
||||
} else if(
|
||||
cmd == MF_CLASSIC_DECREMENT_CMD || cmd == MF_CLASSIC_INCREMENT_CMD ||
|
||||
cmd == MF_CLASSIC_RESTORE_CMD) {
|
||||
uint8_t block = plain_data[1];
|
||||
break;
|
||||
}
|
||||
|
||||
if(block > mf_classic_get_total_block_num(emulator->data.type)) {
|
||||
break;
|
||||
}
|
||||
case MF_CLASSIC_DECREMENT_CMD:
|
||||
case MF_CLASSIC_INCREMENT_CMD:
|
||||
case MF_CLASSIC_RESTORE_CMD: {
|
||||
MfClassicAction action = (cmd == MF_CLASSIC_INCREMENT_CMD) ? MfClassicActionDataInc :
|
||||
MfClassicActionDataDec;
|
||||
|
||||
MfClassicAction action = MfClassicActionDataDec;
|
||||
if(cmd == MF_CLASSIC_INCREMENT_CMD) {
|
||||
action = MfClassicActionDataInc;
|
||||
}
|
||||
if(!mf_classic_is_allowed_access(emulator, block, access_key, action)) {
|
||||
need_nack = true;
|
||||
break;
|
||||
}
|
||||
|
||||
int32_t prev_value;
|
||||
uint8_t addr;
|
||||
if(!mf_classic_block_to_value(emulator->data.block[block].value, &prev_value, &addr)) {
|
||||
need_nack = true;
|
||||
break;
|
||||
}
|
||||
|
||||
@@ -1104,8 +1148,15 @@ bool mf_classic_emulator(
|
||||
tx_rx->tx_rx_type = FuriHalNfcTxRxTransparent;
|
||||
tx_rx->tx_bits = 4;
|
||||
|
||||
if(!furi_hal_nfc_tx_rx(tx_rx, 300)) break;
|
||||
if(tx_rx->rx_bits != (sizeof(int32_t) + 2) * 8) break;
|
||||
if(!furi_hal_nfc_tx_rx(tx_rx, 300)) {
|
||||
need_reset = true;
|
||||
break;
|
||||
}
|
||||
|
||||
if(tx_rx->rx_bits != (sizeof(int32_t) + 2) * 8) {
|
||||
need_reset = true;
|
||||
break;
|
||||
}
|
||||
|
||||
crypto1_decrypt(&emulator->crypto, tx_rx->rx_data, tx_rx->rx_bits, plain_data);
|
||||
int32_t value = *(int32_t*)&plain_data[0];
|
||||
@@ -1122,9 +1173,12 @@ bool mf_classic_emulator(
|
||||
transfer_buf_valid = true;
|
||||
// Commands do not ACK
|
||||
tx_rx->tx_bits = 0;
|
||||
} else if(cmd == MF_CLASSIC_TRANSFER_CMD) {
|
||||
uint8_t block = plain_data[1];
|
||||
break;
|
||||
}
|
||||
|
||||
case MF_CLASSIC_TRANSFER_CMD: {
|
||||
if(!mf_classic_is_allowed_access(emulator, block, access_key, MfClassicActionDataDec)) {
|
||||
need_nack = true;
|
||||
break;
|
||||
}
|
||||
if(memcmp(transfer_buf, emulator->data.block[block].value, MF_CLASSIC_BLOCK_SIZE) !=
|
||||
@@ -1138,13 +1192,17 @@ bool mf_classic_emulator(
|
||||
crypto1_encrypt(&emulator->crypto, NULL, &ack, 4, tx_rx->tx_data, tx_rx->tx_parity);
|
||||
tx_rx->tx_rx_type = FuriHalNfcTxRxTransparent;
|
||||
tx_rx->tx_bits = 4;
|
||||
} else {
|
||||
break;
|
||||
}
|
||||
|
||||
default:
|
||||
FURI_LOG_T(TAG, "Unknown command: %02X", cmd);
|
||||
need_nack = true;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
if(!command_processed) {
|
||||
if(need_nack && !need_reset) {
|
||||
// Send NACK
|
||||
uint8_t nack = transfer_buf_valid ? MF_CLASSIC_NACK_BUF_VALID_CMD :
|
||||
MF_CLASSIC_NACK_BUF_INVALID_CMD;
|
||||
@@ -1156,10 +1214,10 @@ bool mf_classic_emulator(
|
||||
tx_rx->tx_rx_type = FuriHalNfcTxRxTransparent;
|
||||
tx_rx->tx_bits = 4;
|
||||
furi_hal_nfc_tx_rx(tx_rx, 300);
|
||||
return false;
|
||||
need_reset = true;
|
||||
}
|
||||
|
||||
return true;
|
||||
return !need_reset;
|
||||
}
|
||||
|
||||
void mf_classic_halt(FuriHalNfcTxRxContext* tx_rx, Crypto1* crypto) {
|
||||
|
||||
Reference in New Issue
Block a user