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FuriHal: always clock SMPS from HSI

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This commit is contained in:
Aleksandr Kutuzov
2023-05-06 22:23:37 +09:00
committed by Willy-JL
parent b28480623a
commit d4daa04609
1 changed files with 6 additions and 3 deletions
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9
firmware/targets/f7/furi_hal/furi_hal_clock.c
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@@ -76,6 +76,10 @@ void furi_hal_clock_init() {
LL_RCC_LSI1_Enable();
while(!LS_CLOCK_IS_READY())
;
/* RF wakeup */
LL_RCC_SetRFWKPClockSource(LL_RCC_RFWKP_CLKSOURCE_LSE);
LL_EXTI_EnableIT_0_31(
LL_EXTI_LINE_18); /* Why? Because that's why. See RM0434, Table 61. CPU1 vector table. */
LL_EXTI_EnableRisingTrig_0_31(LL_EXTI_LINE_18);
@@ -145,7 +149,7 @@ void furi_hal_clock_init() {
LL_RCC_SetUSBClockSource(LL_RCC_USB_CLKSOURCE_PLLSAI1);
LL_RCC_SetCLK48ClockSource(LL_RCC_CLK48_CLKSOURCE_PLLSAI1);
LL_RCC_HSI_EnableInStopMode(); // Ensure that MR is capable of work in STOP0
LL_RCC_SetSMPSClockSource(LL_RCC_SMPS_CLKSOURCE_HSE);
LL_RCC_SetSMPSClockSource(LL_RCC_SMPS_CLKSOURCE_HSI);
LL_RCC_SetSMPSPrescaler(LL_RCC_SMPS_DIV_1);
LL_RCC_SetRFWKPClockSource(LL_RCC_RFWKP_CLKSOURCE_LSE);
@@ -208,8 +212,8 @@ void furi_hal_clock_switch_to_hsi() {
while(!LL_RCC_HSI_IsReady())
;
LL_RCC_SetSMPSClockSource(LL_RCC_SMPS_CLKSOURCE_HSI);
LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_HSI);
furi_assert(LL_RCC_GetSMPSClockSource() == LL_RCC_SMPS_CLKSOURCE_HSI);
while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_HSI)
;
@@ -240,7 +244,6 @@ void furi_hal_clock_switch_to_pll() {
;
LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL);
LL_RCC_SetSMPSClockSource(LL_RCC_SMPS_CLKSOURCE_HSE);
while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL)
;