mirror of
https://github.com/Next-Flip/Momentum-Firmware.git
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SubGhz: add subghz tx_from_file CLI cmd, major TX flow refactoring, various improvements and bug fixes (#3302)
* SubGhz: add cmd CLI "subghz tx_from_file" * SubGhz: add sending raw.sub files * SubGhz: add load custom preset * SubGhz: remove unnecessary files * SubGhz: change message * SubGhz: fix printf formatting * SubGhz: Cli refactoring code * FuriHal: add furi_hal_subghz Tx Rx IDLE state switching test * SubGhz: remove debug code, fix ext driver compilation * SubGhz: cleanup code, move wait status routine to cc1101 driver * SubGhz: proper pin mode transition in tx stop isr routine, proper DMA and ISR priorities, fix issue with async tx stuck * SubGhz: simplify async tx stop flow, fix ISR ARR check condition race * SubGhz: check ARR only when we transmitting * SubGhz: check ARR only when we transmitting for ext cc1101 * SubGhz: lower ISR priorities to safe level * SubGhz: proper gpio config, comments update Co-authored-by: あく <alleteam@gmail.com>
This commit is contained in:
@@ -45,7 +45,6 @@ typedef enum {
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SubGhzDeviceCC1101ExtStateIdle, /**< Idle, energy save mode */
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SubGhzDeviceCC1101ExtStateAsyncRx, /**< Async RX started */
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SubGhzDeviceCC1101ExtStateAsyncTx, /**< Async TX started, DMA and timer is on */
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SubGhzDeviceCC1101ExtStateAsyncTxEnd, /**< Async TX complete, cleanup needed */
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} SubGhzDeviceCC1101ExtState;
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/** SubGhz regulation, receive transmission on the current frequency for the
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@@ -392,12 +391,18 @@ void subghz_device_cc1101_ext_reset() {
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void subghz_device_cc1101_ext_idle() {
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furi_hal_spi_acquire(subghz_device_cc1101_ext->spi_bus_handle);
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cc1101_switch_to_idle(subghz_device_cc1101_ext->spi_bus_handle);
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//waiting for the chip to switch to IDLE mode
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furi_check(cc1101_wait_status_state(
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subghz_device_cc1101_ext->spi_bus_handle, CC1101StateIDLE, 10000));
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furi_hal_spi_release(subghz_device_cc1101_ext->spi_bus_handle);
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}
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void subghz_device_cc1101_ext_rx() {
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furi_hal_spi_acquire(subghz_device_cc1101_ext->spi_bus_handle);
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cc1101_switch_to_rx(subghz_device_cc1101_ext->spi_bus_handle);
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//waiting for the chip to switch to Rx mode
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furi_check(
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cc1101_wait_status_state(subghz_device_cc1101_ext->spi_bus_handle, CC1101StateRX, 10000));
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furi_hal_spi_release(subghz_device_cc1101_ext->spi_bus_handle);
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}
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@@ -405,6 +410,9 @@ bool subghz_device_cc1101_ext_tx() {
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if(subghz_device_cc1101_ext->regulation != SubGhzDeviceCC1101ExtRegulationTxRx) return false;
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furi_hal_spi_acquire(subghz_device_cc1101_ext->spi_bus_handle);
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cc1101_switch_to_tx(subghz_device_cc1101_ext->spi_bus_handle);
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//waiting for the chip to switch to Tx mode
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furi_check(
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cc1101_wait_status_state(subghz_device_cc1101_ext->spi_bus_handle, CC1101StateTX, 10000));
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furi_hal_spi_release(subghz_device_cc1101_ext->spi_bus_handle);
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return true;
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}
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@@ -653,7 +661,6 @@ static void subghz_device_cc1101_ext_async_tx_refill(uint32_t* buffer, size_t sa
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if(LL_DMA_IsActiveFlag_TC3(SUBGHZ_DEVICE_CC1101_EXT_DMA)) {
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LL_DMA_ClearFlag_TC3(SUBGHZ_DEVICE_CC1101_EXT_DMA);
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}
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LL_TIM_EnableIT_UPDATE(TIM17);
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break;
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} else {
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// Lowest possible value is 4us
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@@ -689,22 +696,6 @@ static void subghz_device_cc1101_ext_async_tx_dma_isr() {
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#endif
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}
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static void subghz_device_cc1101_ext_async_tx_timer_isr() {
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if(LL_TIM_IsActiveFlag_UPDATE(TIM17)) {
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if(LL_TIM_GetAutoReload(TIM17) == 0) {
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if(subghz_device_cc1101_ext->state == SubGhzDeviceCC1101ExtStateAsyncTx) {
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LL_DMA_DisableChannel(SUBGHZ_DEVICE_CC1101_EXT_DMA_CH3_DEF);
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subghz_device_cc1101_ext->state = SubGhzDeviceCC1101ExtStateAsyncTxEnd;
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furi_hal_gpio_write(subghz_device_cc1101_ext->g0_pin, false);
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if(subghz_device_cc1101_ext->async_mirror_pin != NULL)
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furi_hal_gpio_write(subghz_device_cc1101_ext->async_mirror_pin, false);
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LL_TIM_DisableCounter(TIM17);
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}
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}
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LL_TIM_ClearFlag_UPDATE(TIM17);
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}
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}
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bool subghz_device_cc1101_ext_start_async_tx(SubGhzDeviceCC1101ExtCallback callback, void* context) {
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furi_assert(subghz_device_cc1101_ext->state == SubGhzDeviceCC1101ExtStateIdle);
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furi_assert(callback);
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@@ -733,7 +724,7 @@ bool subghz_device_cc1101_ext_start_async_tx(SubGhzDeviceCC1101ExtCallback callb
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SUBGHZ_DEVICE_CC1101_EXT_DMA_CH3_DEF,
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LL_DMA_DIRECTION_MEMORY_TO_PERIPH | LL_DMA_MODE_CIRCULAR | LL_DMA_PERIPH_NOINCREMENT |
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LL_DMA_MEMORY_INCREMENT | LL_DMA_PDATAALIGN_WORD | LL_DMA_MDATAALIGN_WORD |
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LL_DMA_MODE_NORMAL);
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LL_DMA_PRIORITY_VERYHIGH);
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LL_DMA_SetDataLength(
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SUBGHZ_DEVICE_CC1101_EXT_DMA_CH3_DEF, SUBGHZ_DEVICE_CC1101_EXT_ASYNC_TX_BUFFER_FULL);
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LL_DMA_SetPeriphRequest(SUBGHZ_DEVICE_CC1101_EXT_DMA_CH3_DEF, LL_DMAMUX_REQ_TIM17_UP);
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@@ -756,9 +747,6 @@ bool subghz_device_cc1101_ext_start_async_tx(SubGhzDeviceCC1101ExtCallback callb
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LL_TIM_SetClockSource(TIM17, LL_TIM_CLOCKSOURCE_INTERNAL);
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LL_TIM_DisableARRPreload(TIM17);
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furi_hal_interrupt_set_isr(
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FuriHalInterruptIdTim1TrgComTim17, subghz_device_cc1101_ext_async_tx_timer_isr, NULL);
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subghz_device_cc1101_ext_async_tx_middleware_idle(
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&subghz_device_cc1101_ext->async_tx.middleware);
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subghz_device_cc1101_ext_async_tx_refill(
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@@ -816,22 +804,21 @@ bool subghz_device_cc1101_ext_start_async_tx(SubGhzDeviceCC1101ExtCallback callb
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}
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bool subghz_device_cc1101_ext_is_async_tx_complete() {
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return subghz_device_cc1101_ext->state == SubGhzDeviceCC1101ExtStateAsyncTxEnd;
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return (
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(subghz_device_cc1101_ext->state == SubGhzDeviceCC1101ExtStateAsyncTx) &&
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(LL_TIM_GetAutoReload(TIM17) == 0));
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}
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void subghz_device_cc1101_ext_stop_async_tx() {
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furi_assert(
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subghz_device_cc1101_ext->state == SubGhzDeviceCC1101ExtStateAsyncTx ||
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subghz_device_cc1101_ext->state == SubGhzDeviceCC1101ExtStateAsyncTxEnd);
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// Deinitialize GPIO
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furi_hal_gpio_write(subghz_device_cc1101_ext->g0_pin, false);
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furi_hal_gpio_init(
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subghz_device_cc1101_ext->g0_pin, GpioModeAnalog, GpioPullDown, GpioSpeedLow);
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furi_assert(subghz_device_cc1101_ext->state == SubGhzDeviceCC1101ExtStateAsyncTx);
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// Shutdown radio
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subghz_device_cc1101_ext_idle();
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// Deinitialize GPIO
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furi_hal_gpio_write(subghz_device_cc1101_ext->g0_pin, false);
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furi_hal_gpio_init(subghz_device_cc1101_ext->g0_pin, GpioModeAnalog, GpioPullNo, GpioSpeedLow);
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// Deinitialize Timer
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furi_hal_bus_disable(FuriHalBusTIM17);
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furi_hal_interrupt_set_isr(FuriHalInterruptIdTim1TrgComTim17, NULL, NULL);
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