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Merge branch 'fz-dev' into dev

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This commit is contained in:
MX
2023-02-09 17:52:59 +03:00
parent 539c4e2dd0 67c2d1cf61
commit fe3862e113
2 changed files with 8 additions and 9 deletions
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15
lib/drivers/cc1101.c
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@@ -150,9 +150,8 @@ uint8_t cc1101_write_fifo(FuriHalSpiBusHandle* handle, const uint8_t* data, uint
} }
uint8_t cc1101_read_fifo(FuriHalSpiBusHandle* handle, uint8_t* data, uint8_t* size) { uint8_t cc1101_read_fifo(FuriHalSpiBusHandle* handle, uint8_t* data, uint8_t* size) {
uint8_t buff_tx[64]; uint8_t buff_trx[2];
buff_tx[0] = CC1101_FIFO | CC1101_READ | CC1101_BURST; buff_trx[0] = CC1101_FIFO | CC1101_READ | CC1101_BURST;
uint8_t buff_rx[2];
// Start transaction // Start transaction
// Wait IC to become ready // Wait IC to become ready
@@ -160,15 +159,15 @@ uint8_t cc1101_read_fifo(FuriHalSpiBusHandle* handle, uint8_t* data, uint8_t* si
; ;
// First byte - packet length // First byte - packet length
furi_hal_spi_bus_trx(handle, buff_tx, buff_rx, 2, CC1101_TIMEOUT); furi_hal_spi_bus_trx(handle, buff_trx, buff_trx, 2, CC1101_TIMEOUT);
// Check that the packet is placed in the receive buffer // Check that the packet is placed in the receive buffer
if(buff_rx[1] > 64) { if(buff_trx[1] > 64) {
*size = 64; *size = 64;
} else { } else {
*size = buff_rx[1]; *size = buff_trx[1];
} }
furi_hal_spi_bus_trx(handle, &buff_tx[1], data, *size, CC1101_TIMEOUT); furi_hal_spi_bus_trx(handle, NULL, data, *size, CC1101_TIMEOUT);
return *size; return *size;
} }

2
scripts/merge_report_qa.py
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@@ -17,7 +17,7 @@ def parse_args():
def checkCommitMessage(msg): def checkCommitMessage(msg):
regex = re.compile(r"^'?\[FL-\d+\]") regex = re.compile(r"^'?\[(FL-\d+,?\s?)+\]")
if regex.match(msg): if regex.match(msg):
return True return True
return False return False