mirror of
https://github.com/Next-Flip/Momentum-Firmware.git
synced 2026-05-13 03:48:35 -07:00
364 lines
11 KiB
C
364 lines
11 KiB
C
#include "digital_signal.h"
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#include <furi.h>
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#include <stm32wbxx_ll_dma.h>
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#include <stm32wbxx_ll_tim.h>
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#include <math.h>
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#define TAG "[DigitalSignal]"
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#pragma GCC optimize("O3,unroll-loops,Ofast")
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#define F_TIM (64000000.0)
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#define T_TIM 1562 //15.625 ns *100
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#define T_TIM_DIV2 781 //15.625 ns / 2 *100
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DigitalSignal* digital_signal_alloc(uint32_t max_edges_cnt) {
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DigitalSignal* signal = malloc(sizeof(DigitalSignal));
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signal->start_level = true;
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signal->edges_max_cnt = max_edges_cnt;
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signal->edge_timings = malloc(signal->edges_max_cnt * sizeof(uint32_t));
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signal->edge_cnt = 0;
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signal->reload_reg_buff = malloc(signal->edges_max_cnt * sizeof(uint32_t));
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signal->reload_reg_entries = 0;
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signal->reload_reg_remainder = 0;
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return signal;
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}
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void digital_signal_free(DigitalSignal* signal) {
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furi_assert(signal);
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free(signal->edge_timings);
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free(signal->reload_reg_buff);
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free(signal);
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}
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bool digital_signal_append(DigitalSignal* signal_a, DigitalSignal* signal_b) {
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furi_assert(signal_a);
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furi_assert(signal_b);
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if(signal_a->edges_max_cnt < signal_a->edge_cnt + signal_b->edge_cnt) {
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return false;
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}
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/* in case there are no edges in our target signal, the signal to append makes the rules */
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if(!signal_a->edge_cnt) {
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signal_a->start_level = signal_b->start_level;
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}
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bool end_level = signal_a->start_level;
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if(signal_a->edge_cnt) {
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end_level = signal_a->start_level ^ !(signal_a->edge_cnt % 2);
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}
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uint8_t start_copy = 0;
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if(end_level == signal_b->start_level) {
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if(signal_a->edge_cnt) {
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signal_a->edge_timings[signal_a->edge_cnt - 1] += signal_b->edge_timings[0];
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start_copy += 1;
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} else {
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signal_a->edge_timings[signal_a->edge_cnt] += signal_b->edge_timings[0];
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}
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}
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for(size_t i = 0; i < signal_b->edge_cnt - start_copy; i++) {
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signal_a->edge_timings[signal_a->edge_cnt + i] = signal_b->edge_timings[start_copy + i];
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}
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signal_a->edge_cnt += signal_b->edge_cnt - start_copy;
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return true;
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}
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bool digital_signal_get_start_level(DigitalSignal* signal) {
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furi_assert(signal);
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return signal->start_level;
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}
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uint32_t digital_signal_get_edges_cnt(DigitalSignal* signal) {
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furi_assert(signal);
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return signal->edge_cnt;
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}
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void digital_signal_add(DigitalSignal* signal, uint32_t ticks) {
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furi_assert(signal);
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furi_assert(signal->edge_cnt < signal->edges_max_cnt);
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signal->edge_timings[signal->edge_cnt++] = ticks;
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}
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uint32_t digital_signal_get_edge(DigitalSignal* signal, uint32_t edge_num) {
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furi_assert(signal);
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furi_assert(edge_num < signal->edge_cnt);
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return signal->edge_timings[edge_num];
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}
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void digital_signal_prepare(DigitalSignal* signal) {
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furi_assert(signal);
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/* set up signal polarities */
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uint32_t bit_set = signal->gpio->pin;
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uint32_t bit_reset = signal->gpio->pin << 16;
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if(signal->start_level) {
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signal->gpio_buff[0] = bit_set;
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signal->gpio_buff[1] = bit_reset;
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} else {
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signal->gpio_buff[0] = bit_reset;
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signal->gpio_buff[1] = bit_set;
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}
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/* set up edge timings */
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signal->reload_reg_entries = 0;
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for(size_t pos = 0; pos < signal->edge_cnt; pos++) {
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uint32_t pulse_duration = signal->edge_timings[pos] + signal->reload_reg_remainder;
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uint32_t pulse_ticks = (pulse_duration + T_TIM_DIV2) / T_TIM;
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signal->reload_reg_remainder = pulse_duration - (pulse_ticks * T_TIM);
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if(pulse_ticks > 1) {
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signal->reload_reg_buff[signal->reload_reg_entries++] = pulse_ticks - 1;
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}
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}
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}
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void digital_signal_stop_dma() {
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LL_DMA_DisableChannel(DMA1, LL_DMA_CHANNEL_1);
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LL_DMA_DisableChannel(DMA1, LL_DMA_CHANNEL_2);
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LL_DMA_ClearFlag_TC1(DMA1);
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LL_DMA_ClearFlag_TC2(DMA1);
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}
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void digital_signal_stop_timer() {
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LL_TIM_DisableCounter(TIM2);
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LL_TIM_SetCounter(TIM2, 0);
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}
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bool digital_signal_setup_dma(DigitalSignal* signal) {
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furi_assert(signal);
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if(!signal->reload_reg_entries) {
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return false;
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}
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LL_DMA_InitTypeDef dma_config_gpio = {};
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LL_DMA_InitTypeDef dma_config_timer = {};
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dma_config_gpio.MemoryOrM2MDstAddress = (uint32_t) signal->gpio_buff;
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dma_config_gpio.PeriphOrM2MSrcAddress = (uint32_t) &(signal->gpio->port->BSRR);
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dma_config_gpio.Direction = LL_DMA_DIRECTION_MEMORY_TO_PERIPH;
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dma_config_gpio.Mode = LL_DMA_MODE_CIRCULAR;
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dma_config_gpio.PeriphOrM2MSrcIncMode = LL_DMA_PERIPH_NOINCREMENT;
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dma_config_gpio.MemoryOrM2MDstIncMode = LL_DMA_MEMORY_INCREMENT;
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dma_config_gpio.PeriphOrM2MSrcDataSize = LL_DMA_PDATAALIGN_WORD;
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dma_config_gpio.MemoryOrM2MDstDataSize = LL_DMA_MDATAALIGN_WORD;
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dma_config_gpio.NbData = 2;
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dma_config_gpio.PeriphRequest = LL_DMAMUX_REQ_TIM2_UP;
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dma_config_gpio.Priority = LL_DMA_PRIORITY_VERYHIGH;
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// Init timer arr register buffer and DMA channel
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dma_config_timer.MemoryOrM2MDstAddress = (uint32_t)signal->reload_reg_buff;
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dma_config_timer.PeriphOrM2MSrcAddress = (uint32_t) &(TIM2->ARR);
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dma_config_timer.Direction = LL_DMA_DIRECTION_MEMORY_TO_PERIPH;
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dma_config_timer.Mode = LL_DMA_MODE_NORMAL;
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dma_config_timer.PeriphOrM2MSrcIncMode = LL_DMA_PERIPH_NOINCREMENT;
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dma_config_timer.MemoryOrM2MDstIncMode = LL_DMA_MEMORY_INCREMENT;
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dma_config_timer.PeriphOrM2MSrcDataSize = LL_DMA_PDATAALIGN_WORD;
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dma_config_timer.MemoryOrM2MDstDataSize = LL_DMA_MDATAALIGN_WORD;
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dma_config_timer.NbData = signal->reload_reg_entries;
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dma_config_timer.PeriphRequest = LL_DMAMUX_REQ_TIM2_UP;
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dma_config_timer.Priority = LL_DMA_PRIORITY_HIGH;
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digital_signal_stop_dma();
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/* set up DMA channel 1 and 2 for GPIO and timer copy operations */
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LL_DMA_Init(DMA1, LL_DMA_CHANNEL_1, &dma_config_gpio);
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LL_DMA_Init(DMA1, LL_DMA_CHANNEL_2, &dma_config_timer);
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/* enable both DMA channels */
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LL_DMA_EnableChannel(DMA1, LL_DMA_CHANNEL_1);
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LL_DMA_EnableChannel(DMA1, LL_DMA_CHANNEL_2);
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return true;
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}
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bool digital_signal_update_dma(DigitalSignal* signal) {
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furi_assert(signal);
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if(!signal->reload_reg_entries) {
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return false;
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}
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digital_signal_stop_dma();
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LL_DMA_SetMemoryAddress(DMA1, LL_DMA_CHANNEL_1, (uint32_t)signal->gpio_buff);
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LL_DMA_SetMemoryAddress(DMA1, LL_DMA_CHANNEL_2, (uint32_t)signal->reload_reg_buff);
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LL_DMA_SetDataLength(DMA1, LL_DMA_CHANNEL_1, 2);
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LL_DMA_SetDataLength(DMA1, LL_DMA_CHANNEL_2, signal->reload_reg_entries);
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LL_DMA_EnableChannel(DMA1, LL_DMA_CHANNEL_1);
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LL_DMA_EnableChannel(DMA1, LL_DMA_CHANNEL_2);
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return true;
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}
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void digital_signal_setup_timer() {
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digital_signal_stop_timer();
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LL_TIM_SetCounterMode(TIM2, LL_TIM_COUNTERMODE_UP);
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LL_TIM_SetClockDivision(TIM2, LL_TIM_CLOCKDIVISION_DIV1);
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LL_TIM_SetPrescaler(TIM2, 0);
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LL_TIM_SetAutoReload(TIM2, 10);
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LL_TIM_SetCounter(TIM2, 0);
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LL_TIM_EnableUpdateEvent(TIM2);
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LL_TIM_EnableDMAReq_UPDATE(TIM2);
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}
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void digital_signal_start_timer() {
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LL_TIM_GenerateEvent_UPDATE(TIM2);
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LL_TIM_EnableCounter(TIM2);
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}
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void digital_signal_send(DigitalSignal* signal, const GpioPin* gpio) {
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furi_assert(signal);
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/* if selected GPIO changed, force reconfiguration of buffers */
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if(gpio && (signal->gpio != gpio)) {
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signal->gpio = gpio;
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}
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/* Configure gpio as output */
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furi_hal_gpio_init(signal->gpio, GpioModeOutputPushPull, GpioPullNo, GpioSpeedVeryHigh);
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/* single signal, add a temporary, terminating edge at the end */
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signal->edge_timings[signal->edge_cnt++] = 10;
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digital_signal_prepare(signal);
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digital_signal_setup_dma(signal);
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digital_signal_setup_timer();
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digital_signal_start_timer();
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while(!LL_DMA_IsActiveFlag_TC2(DMA1)) {
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}
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digital_signal_stop_timer();
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digital_signal_stop_dma();
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signal->edge_cnt--;
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}
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DigitalSequence* digital_sequence_alloc(uint32_t size) {
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DigitalSequence* sequence = malloc(sizeof(DigitalSequence));
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sequence->signals_size = 32;
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sequence->signals = malloc(sequence->signals_size * sizeof(DigitalSignal*));
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sequence->sequence_used = 0;
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sequence->sequence_size = size;
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sequence->sequence = malloc(sequence->sequence_size);
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return sequence;
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}
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void digital_sequence_free(DigitalSequence* sequence) {
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furi_assert(sequence);
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free(sequence->signals);
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free(sequence->sequence);
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free(sequence);
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}
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void digital_sequence_set_signal(DigitalSequence* sequence, uint8_t signal_index, DigitalSignal* signal) {
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furi_assert(sequence);
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furi_assert(signal);
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furi_assert(signal_index < sequence->signals_size);
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sequence->signals[signal_index] = signal;
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/* all signals will use the sequence's GPIO */
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signal->gpio = sequence->gpio;
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digital_signal_prepare(signal);
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}
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void digital_sequence_add(DigitalSequence* sequence, uint8_t signal_index) {
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furi_assert(sequence);
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furi_assert(signal_index < sequence->signals_size);
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if(sequence->sequence_used >= sequence->sequence_size) {
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sequence->sequence_size += 256;
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sequence->sequence = realloc(sequence->sequence, sequence->sequence_size);
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}
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sequence->sequence[sequence->sequence_used++] = signal_index;
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}
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bool digital_sequence_send_signal(DigitalSignal* signal) {
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furi_assert(signal);
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/* the first iteration has to set up the whole machinery */
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if(!LL_DMA_IsEnabledChannel(DMA1, LL_DMA_CHANNEL_1)) {
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furi_hal_gpio_init(signal->gpio, GpioModeOutputPushPull, GpioPullNo, GpioSpeedVeryHigh);
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if(!digital_signal_setup_dma(signal)) {
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FURI_LOG_D(TAG, "Signal has no entries, aborting");
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return false;
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}
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digital_signal_setup_timer();
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digital_signal_start_timer();
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} else {
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/* transfer was already active, wait till DMA is done and the last timer ticks are running */
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while(!LL_DMA_IsActiveFlag_TC2(DMA1)) {
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}
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/* configure next polarities and timings */
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if(!digital_signal_update_dma(signal)) {
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FURI_LOG_D(TAG, "Signal has no entries, aborting");
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return false;
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}
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}
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return true;
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}
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bool digital_sequence_send(DigitalSequence* sequence, const GpioPin* gpio) {
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furi_assert(sequence);
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uint32_t remainder = 0;
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sequence->gpio = gpio;
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for(uint32_t pos = 0; pos < sequence->sequence_used; pos++) {
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DigitalSignal *sig = sequence->signals[sequence->sequence[pos]];
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/* take over previous remainder */
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sig->reload_reg_remainder = remainder;
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digital_signal_prepare(sig);
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if(!digital_sequence_send_signal(sig)) {
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digital_signal_stop_timer();
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digital_signal_stop_dma();
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return false;
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}
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}
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while(!LL_DMA_IsActiveFlag_TC2(DMA1)) {
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}
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digital_signal_stop_timer();
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digital_signal_stop_dma();
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return true;
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}
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void digital_sequence_clear(DigitalSequence* sequence) {
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furi_assert(sequence);
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sequence->sequence_used = 0;
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}
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