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https://github.com/jeremyd/ergo.git
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cloudfodder
eb43ff69c4
Rebuilt the nostr registration feature cleanly on top of current ergo mainline (origin/master), dropping the stale ergo reversions that were entangled in the original squashed branch. - New irc/nostr package: NIP-04/NIP-17 DMs, NIP-05 resolution, relay connect/auth, and identifier helpers. - Registration/verification via nostr: parseCallback auto-detects nostr identifiers (NIP-05, npub, hex pubkey) and dispatches a verification DM. - Nostr-based cloaked hostnames for accounts (opt-in via ip-cloaking.nostr-hostnames), applied at the account-cloak sites. - Config: accounts.registration.nostr-verification and the nostr-hostnames cloak option, with matching default.yaml and help text. - Adds github.com/nbd-wtf/go-nostr and vendored dependencies.
128 lines
2.0 KiB
ArmAsm
128 lines
2.0 KiB
ArmAsm
#include "textflag.h"
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// func maskAsm(b *byte, len int, key uint32)
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TEXT ·maskAsm(SB), NOSPLIT, $0-28
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// AX = b
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// CX = len (left length)
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// SI = key (uint32)
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// DI = uint64(SI) | uint64(SI)<<32
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MOVQ b+0(FP), AX
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MOVQ len+8(FP), CX
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MOVL key+16(FP), SI
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// calculate the DI
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// DI = SI<<32 | SI
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MOVL SI, DI
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MOVQ DI, DX
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SHLQ $32, DI
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ORQ DX, DI
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CMPQ CX, $15
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JLE less_than_16
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CMPQ CX, $63
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JLE less_than_64
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CMPQ CX, $128
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JLE sse
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TESTQ $31, AX
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JNZ unaligned
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unaligned_loop_1byte:
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XORB SI, (AX)
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INCQ AX
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DECQ CX
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ROLL $24, SI
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TESTQ $7, AX
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JNZ unaligned_loop_1byte
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// calculate DI again since SI was modified
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// DI = SI<<32 | SI
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MOVL SI, DI
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MOVQ DI, DX
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SHLQ $32, DI
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ORQ DX, DI
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TESTQ $31, AX
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JZ sse
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unaligned:
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TESTQ $7, AX // AND $7 & len, if not zero jump to loop_1b.
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JNZ unaligned_loop_1byte
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unaligned_loop:
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// we don't need to check the CX since we know it's above 128
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XORQ DI, (AX)
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ADDQ $8, AX
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SUBQ $8, CX
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TESTQ $31, AX
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JNZ unaligned_loop
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JMP sse
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sse:
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CMPQ CX, $0x40
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JL less_than_64
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MOVQ DI, X0
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PUNPCKLQDQ X0, X0
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sse_loop:
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MOVOU 0*16(AX), X1
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MOVOU 1*16(AX), X2
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MOVOU 2*16(AX), X3
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MOVOU 3*16(AX), X4
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PXOR X0, X1
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PXOR X0, X2
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PXOR X0, X3
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PXOR X0, X4
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MOVOU X1, 0*16(AX)
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MOVOU X2, 1*16(AX)
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MOVOU X3, 2*16(AX)
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MOVOU X4, 3*16(AX)
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ADDQ $0x40, AX
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SUBQ $0x40, CX
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CMPQ CX, $0x40
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JAE sse_loop
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less_than_64:
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TESTQ $32, CX
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JZ less_than_32
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XORQ DI, (AX)
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XORQ DI, 8(AX)
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XORQ DI, 16(AX)
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XORQ DI, 24(AX)
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ADDQ $32, AX
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less_than_32:
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TESTQ $16, CX
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JZ less_than_16
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XORQ DI, (AX)
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XORQ DI, 8(AX)
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ADDQ $16, AX
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less_than_16:
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TESTQ $8, CX
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JZ less_than_8
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XORQ DI, (AX)
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ADDQ $8, AX
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less_than_8:
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TESTQ $4, CX
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JZ less_than_4
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XORL SI, (AX)
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ADDQ $4, AX
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less_than_4:
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TESTQ $2, CX
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JZ less_than_2
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XORW SI, (AX)
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ROLL $16, SI
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ADDQ $2, AX
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less_than_2:
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TESTQ $1, CX
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JZ done
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XORB SI, (AX)
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ROLL $24, SI
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done:
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MOVL SI, ret+24(FP)
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RET
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