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MX
2026-01-26 12:46:30 +03:00
parent 7fa5624c50
commit 5564fe1f31
3 changed files with 12 additions and 8 deletions
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6
applications/drivers/subghz/cc1101_ext/cc1101_ext.c
View File

@@ -807,7 +807,7 @@ bool subghz_device_cc1101_ext_start_async_tx(SubGhzDeviceCC1101ExtCallback callb
// Configure DMA to update timer TIM17 ARR by durations from buffer
LL_DMA_SetMemoryAddress(
SUBGHZ_DEVICE_CC1101_EXT_DMA_CH3_DEF, (uint32_t)subghz_device_cc1101_ext->async_tx.buffer);
LL_DMA_SetPeriphAddress(SUBGHZ_DEVICE_CC1101_EXT_DMA_CH3_DEF, (uint32_t)&(TIM17->ARR));
LL_DMA_SetPeriphAddress(SUBGHZ_DEVICE_CC1101_EXT_DMA_CH3_DEF, (uint32_t) & (TIM17->ARR));
LL_DMA_ConfigTransfer(
SUBGHZ_DEVICE_CC1101_EXT_DMA_CH3_DEF,
LL_DMA_DIRECTION_MEMORY_TO_PERIPH | LL_DMA_MODE_CIRCULAR | LL_DMA_PERIPH_NOINCREMENT |
@@ -849,7 +849,7 @@ bool subghz_device_cc1101_ext_start_async_tx(SubGhzDeviceCC1101ExtCallback callb
LL_DMA_SetMemoryAddress(
SUBGHZ_DEVICE_CC1101_EXT_DMA_CH4_DEF,
(uint32_t)subghz_device_cc1101_ext->async_tx.gpio_tx_buff);
LL_DMA_SetPeriphAddress(SUBGHZ_DEVICE_CC1101_EXT_DMA_CH4_DEF, (uint32_t)&(gpio->port->BSRR));
LL_DMA_SetPeriphAddress(SUBGHZ_DEVICE_CC1101_EXT_DMA_CH4_DEF, (uint32_t) & (gpio->port->BSRR));
LL_DMA_ConfigTransfer(
SUBGHZ_DEVICE_CC1101_EXT_DMA_CH4_DEF,
LL_DMA_DIRECTION_MEMORY_TO_PERIPH | LL_DMA_MODE_CIRCULAR | LL_DMA_PERIPH_NOINCREMENT |
@@ -869,7 +869,7 @@ bool subghz_device_cc1101_ext_start_async_tx(SubGhzDeviceCC1101ExtCallback callb
SUBGHZ_DEVICE_CC1101_EXT_DMA_CH5_DEF,
(uint32_t)subghz_device_cc1101_ext->async_tx.debug_gpio_buff);
LL_DMA_SetPeriphAddress(
SUBGHZ_DEVICE_CC1101_EXT_DMA_CH5_DEF, (uint32_t)&(gpio->port->BSRR));
SUBGHZ_DEVICE_CC1101_EXT_DMA_CH5_DEF, (uint32_t) & (gpio->port->BSRR));
LL_DMA_ConfigTransfer(
SUBGHZ_DEVICE_CC1101_EXT_DMA_CH5_DEF,
LL_DMA_DIRECTION_MEMORY_TO_PERIPH | LL_DMA_MODE_CIRCULAR | LL_DMA_PERIPH_NOINCREMENT |

10
targets/f7/furi_hal/furi_hal_subghz.c
View File

@@ -771,7 +771,7 @@ bool furi_hal_subghz_start_async_tx(FuriHalSubGhzAsyncTxCallback callback, void*
// Configure DMA to update TIM2->ARR
LL_DMA_InitTypeDef dma_config = {0}; // DMA settings structure
dma_config.PeriphOrM2MSrcAddress = (uint32_t)&(TIM2->ARR); // DMA destination TIM2->ARR
dma_config.PeriphOrM2MSrcAddress = (uint32_t) & (TIM2->ARR); // DMA destination TIM2->ARR
dma_config.MemoryOrM2MDstAddress =
(uint32_t)furi_hal_subghz_async_tx.buffer; // DMA buffer with signals durations
dma_config.Direction =
@@ -838,7 +838,7 @@ bool furi_hal_subghz_start_async_tx(FuriHalSubGhzAsyncTxCallback callback, void*
furi_hal_subghz_debug_gpio_buff[1] = (uint32_t)gpio->pin << GPIO_NUMBER;
dma_config.MemoryOrM2MDstAddress = (uint32_t)furi_hal_subghz_debug_gpio_buff;
dma_config.PeriphOrM2MSrcAddress = (uint32_t)&(gpio->port->BSRR);
dma_config.PeriphOrM2MSrcAddress = (uint32_t) & (gpio->port->BSRR);
dma_config.Direction = LL_DMA_DIRECTION_MEMORY_TO_PERIPH;
dma_config.Mode = LL_DMA_MODE_CIRCULAR;
dma_config.PeriphOrM2MSrcIncMode = LL_DMA_PERIPH_NOINCREMENT;
@@ -867,7 +867,11 @@ bool furi_hal_subghz_start_async_tx(FuriHalSubGhzAsyncTxCallback callback, void*
bool furi_hal_subghz_is_async_tx_complete(void) {
return (furi_hal_subghz.state == SubGhzStateAsyncTx) && (LL_TIM_GetAutoReload(TIM2) == 0);
FURI_LOG_I(TAG, "SubGhzStateAsyncTx %d , TIM2-ARR %ld",furi_hal_subghz.state,LL_TIM_GetAutoReload(TIM2));
FURI_LOG_I(
TAG,
"SubGhzStateAsyncTx %d , TIM2-ARR %ld",
furi_hal_subghz.state,
LL_TIM_GetAutoReload(TIM2));
}
void furi_hal_subghz_stop_async_tx(void) {