prt2

firmware/targets/f7/api_symbols.csv

@@ -1,5 +1,5 @@
 entry,status,name,type,params
-Version,+,30.1,,
+Version,+,32.0,,
 Header,+,applications/services/bt/bt_service/bt.h,,
 Header,+,applications/services/cli/cli.h,,
 Header,+,applications/services/cli/cli_vcp.h,,
@@ -56,7 +56,6 @@ Header,+,firmware/targets/f7/furi_hal/furi_hal_rfid.h,,
 Header,+,firmware/targets/f7/furi_hal/furi_hal_spi_config.h,,
 Header,+,firmware/targets/f7/furi_hal/furi_hal_spi_types.h,,
 Header,+,firmware/targets/f7/furi_hal/furi_hal_subghz.h,,
-Header,+,firmware/targets/f7/furi_hal/furi_hal_subghz_configs.h,,
 Header,+,firmware/targets/f7/furi_hal/furi_hal_target_hw.h,,
 Header,+,firmware/targets/f7/furi_hal/furi_hal_uart.h,,
 Header,+,firmware/targets/f7/furi_hal/furi_hal_usb_cdc.h,,
@@ -316,6 +315,7 @@ Function,-,LL_mDelay,void,uint32_t
 Function,-,SystemCoreClockUpdate,void,
 Function,-,SystemInit,void,
 Function,-,_Exit,void,int
+Function,+,__aeabi_uldivmod,void*,"uint64_t, uint64_t"
 Function,-,__assert,void,"const char*, int, const char*"
 Function,+,__assert_func,void,"const char*, int, const char*, const char*"
 Function,+,__clear_cache,void,"void*, void*"
@@ -668,26 +668,6 @@ Function,+,canvas_width,uint8_t,const Canvas*
 Function,-,cbrt,double,double
 Function,-,cbrtf,float,float
 Function,-,cbrtl,long double,long double
-Function,+,cc1101_calibrate,void,FuriHalSpiBusHandle*
-Function,+,cc1101_flush_rx,void,FuriHalSpiBusHandle*
-Function,+,cc1101_flush_tx,void,FuriHalSpiBusHandle*
-Function,-,cc1101_get_partnumber,uint8_t,FuriHalSpiBusHandle*
-Function,+,cc1101_get_rssi,uint8_t,FuriHalSpiBusHandle*
-Function,+,cc1101_get_status,CC1101Status,FuriHalSpiBusHandle*
-Function,-,cc1101_get_version,uint8_t,FuriHalSpiBusHandle*
-Function,+,cc1101_read_fifo,uint8_t,"FuriHalSpiBusHandle*, uint8_t*, uint8_t*"
-Function,+,cc1101_read_reg,CC1101Status,"FuriHalSpiBusHandle*, uint8_t, uint8_t*"
-Function,+,cc1101_reset,void,FuriHalSpiBusHandle*
-Function,+,cc1101_set_frequency,uint32_t,"FuriHalSpiBusHandle*, uint32_t"
-Function,-,cc1101_set_intermediate_frequency,uint32_t,"FuriHalSpiBusHandle*, uint32_t"
-Function,+,cc1101_set_pa_table,void,"FuriHalSpiBusHandle*, const uint8_t[8]"
-Function,+,cc1101_shutdown,void,FuriHalSpiBusHandle*
-Function,+,cc1101_strobe,CC1101Status,"FuriHalSpiBusHandle*, uint8_t"
-Function,+,cc1101_switch_to_idle,void,FuriHalSpiBusHandle*
-Function,+,cc1101_switch_to_rx,void,FuriHalSpiBusHandle*
-Function,+,cc1101_switch_to_tx,void,FuriHalSpiBusHandle*
-Function,+,cc1101_write_fifo,uint8_t,"FuriHalSpiBusHandle*, const uint8_t*, uint8_t"
-Function,+,cc1101_write_reg,CC1101Status,"FuriHalSpiBusHandle*, uint8_t, uint8_t"
 Function,-,ceil,double,double
 Function,-,ceilf,float,float
 Function,-,ceill,long double,long double
@@ -1394,21 +1374,15 @@ Function,-,furi_hal_spi_config_init,void,
 Function,-,furi_hal_spi_config_init_early,void,
 Function,-,furi_hal_spi_dma_init,void,
 Function,+,furi_hal_spi_release,void,FuriHalSpiBusHandle*
-Function,+,furi_hal_subghz_check_radio,_Bool,
-Function,+,furi_hal_subghz_disable_ext_power,void,
 Function,-,furi_hal_subghz_dump_state,void,
-Function,+,furi_hal_subghz_enable_ext_power,_Bool,
 Function,+,furi_hal_subghz_flush_rx,void,
 Function,+,furi_hal_subghz_flush_tx,void,
-Function,+,furi_hal_subghz_get_external_power_disable,_Bool,
+Function,+,furi_hal_subghz_get_data_gpio,const GpioPin*,
 Function,+,furi_hal_subghz_get_lqi,uint8_t,
-Function,+,furi_hal_subghz_get_radio_type,SubGhzRadioType,
 Function,+,furi_hal_subghz_get_rolling_counter_mult,uint8_t,
 Function,+,furi_hal_subghz_get_rssi,float,
 Function,+,furi_hal_subghz_idle,void,
 Function,-,furi_hal_subghz_init,void,
-Function,-,furi_hal_subghz_init_check,_Bool,
-Function,+,furi_hal_subghz_init_radio_type,_Bool,SubGhzRadioType
 Function,+,furi_hal_subghz_is_async_tx_complete,_Bool,
 Function,+,furi_hal_subghz_is_frequency_valid,_Bool,uint32_t
 Function,+,furi_hal_subghz_is_rx_data_crc_valid,_Bool,
@@ -1421,9 +1395,7 @@ Function,+,furi_hal_subghz_read_packet,void,"uint8_t*, uint8_t*"
 Function,+,furi_hal_subghz_reset,void,
 Function,+,furi_hal_subghz_rx,void,
 Function,+,furi_hal_subghz_rx_pipe_not_empty,_Bool,
-Function,+,furi_hal_subghz_select_radio_type,void,SubGhzRadioType
 Function,+,furi_hal_subghz_set_async_mirror_pin,void,const GpioPin*
-Function,+,furi_hal_subghz_set_external_power_disable,void,_Bool
 Function,+,furi_hal_subghz_set_frequency,uint32_t,uint32_t
 Function,+,furi_hal_subghz_set_frequency_and_path,uint32_t,uint32_t
 Function,+,furi_hal_subghz_set_path,void,FuriHalSubGhzPath
@@ -2706,6 +2678,36 @@ Function,+,subghz_block_generic_deserialize,SubGhzProtocolStatus,"SubGhzBlockGen
 Function,+,subghz_block_generic_deserialize_check_count_bit,SubGhzProtocolStatus,"SubGhzBlockGeneric*, FlipperFormat*, uint16_t"
 Function,+,subghz_block_generic_get_preset_name,void,"const char*, FuriString*"
 Function,+,subghz_block_generic_serialize,SubGhzProtocolStatus,"SubGhzBlockGeneric*, FlipperFormat*, SubGhzRadioPreset*"
+Function,+,subghz_devices_begin,_Bool,const SubGhzDevice*
+Function,+,subghz_devices_deinit,void,
+Function,+,subghz_devices_end,void,const SubGhzDevice*
+Function,+,subghz_devices_flush_rx,void,const SubGhzDevice*
+Function,+,subghz_devices_flush_tx,void,const SubGhzDevice*
+Function,+,subghz_devices_get_by_name,const SubGhzDevice*,const char*
+Function,+,subghz_devices_get_data_gpio,const GpioPin*,const SubGhzDevice*
+Function,+,subghz_devices_get_lqi,uint8_t,const SubGhzDevice*
+Function,+,subghz_devices_get_name,const char*,const SubGhzDevice*
+Function,+,subghz_devices_get_rssi,float,const SubGhzDevice*
+Function,+,subghz_devices_idle,void,const SubGhzDevice*
+Function,+,subghz_devices_init,void,
+Function,+,subghz_devices_is_async_complete_tx,_Bool,const SubGhzDevice*
+Function,+,subghz_devices_is_connect,_Bool,const SubGhzDevice*
+Function,+,subghz_devices_is_frequency_valid,_Bool,"const SubGhzDevice*, uint32_t"
+Function,+,subghz_devices_is_rx_data_crc_valid,_Bool,const SubGhzDevice*
+Function,+,subghz_devices_load_preset,void,"const SubGhzDevice*, FuriHalSubGhzPreset, uint8_t*"
+Function,+,subghz_devices_read_packet,void,"const SubGhzDevice*, uint8_t*, uint8_t*"
+Function,+,subghz_devices_reset,void,const SubGhzDevice*
+Function,+,subghz_devices_rx_pipe_not_empty,_Bool,const SubGhzDevice*
+Function,+,subghz_devices_set_async_mirror_pin,void,"const SubGhzDevice*, const GpioPin*"
+Function,+,subghz_devices_set_frequency,uint32_t,"const SubGhzDevice*, uint32_t"
+Function,+,subghz_devices_set_rx,void,const SubGhzDevice*
+Function,+,subghz_devices_set_tx,_Bool,const SubGhzDevice*
+Function,+,subghz_devices_sleep,void,const SubGhzDevice*
+Function,+,subghz_devices_start_async_rx,void,"const SubGhzDevice*, void*, void*"
+Function,+,subghz_devices_start_async_tx,_Bool,"const SubGhzDevice*, void*, void*"
+Function,+,subghz_devices_stop_async_rx,void,const SubGhzDevice*
+Function,+,subghz_devices_stop_async_tx,void,const SubGhzDevice*
+Function,+,subghz_devices_write_packet,void,"const SubGhzDevice*, const uint8_t*, uint8_t"
 Function,+,subghz_environment_alloc,SubGhzEnvironment*,
 Function,+,subghz_environment_free,void,SubGhzEnvironment*
 Function,+,subghz_environment_get_alutech_at_4n_rainbow_table_file_name,const char*,SubGhzEnvironment*
@@ -2766,7 +2768,7 @@ Function,+,subghz_protocol_encoder_raw_free,void,void*
 Function,+,subghz_protocol_encoder_raw_stop,void,void*
 Function,+,subghz_protocol_encoder_raw_yield,LevelDuration,void*
 Function,+,subghz_protocol_raw_file_encoder_worker_set_callback_end,void,"SubGhzProtocolEncoderRAW*, SubGhzProtocolEncoderRAWCallbackEnd, void*"
-Function,+,subghz_protocol_raw_gen_fff_data,void,"FlipperFormat*, const char*"
+Function,+,subghz_protocol_raw_gen_fff_data,void,"FlipperFormat*, const char*, const char*"
 Function,+,subghz_protocol_raw_get_sample_write,size_t,SubGhzProtocolDecoderRAW*
 Function,+,subghz_protocol_raw_save_to_file_init,_Bool,"SubGhzProtocolDecoderRAW*, const char*, SubGhzRadioPreset*"
 Function,+,subghz_protocol_raw_save_to_file_pause,void,"SubGhzProtocolDecoderRAW*, _Bool"
@@ -2811,7 +2813,7 @@ Function,+,subghz_tx_rx_worker_free,void,SubGhzTxRxWorker*
 Function,+,subghz_tx_rx_worker_is_running,_Bool,SubGhzTxRxWorker*
 Function,+,subghz_tx_rx_worker_read,size_t,"SubGhzTxRxWorker*, uint8_t*, size_t"
 Function,+,subghz_tx_rx_worker_set_callback_have_read,void,"SubGhzTxRxWorker*, SubGhzTxRxWorkerCallbackHaveRead, void*"
-Function,+,subghz_tx_rx_worker_start,_Bool,"SubGhzTxRxWorker*, uint32_t"
+Function,+,subghz_tx_rx_worker_start,_Bool,"SubGhzTxRxWorker*, const SubGhzDevice*, uint32_t"
 Function,+,subghz_tx_rx_worker_stop,void,SubGhzTxRxWorker*
 Function,+,subghz_tx_rx_worker_write,_Bool,"SubGhzTxRxWorker*, uint8_t*, size_t"
 Function,+,subghz_worker_alloc,SubGhzWorker*,
@@ -3165,15 +3167,12 @@ Variable,+,furi_hal_spi_bus_handle_nfc,FuriHalSpiBusHandle,
 Variable,+,furi_hal_spi_bus_handle_sd_fast,FuriHalSpiBusHandle,
 Variable,+,furi_hal_spi_bus_handle_sd_slow,FuriHalSpiBusHandle,
 Variable,+,furi_hal_spi_bus_handle_subghz,FuriHalSpiBusHandle,
-Variable,+,furi_hal_spi_bus_handle_subghz_ext,FuriHalSpiBusHandle,
-Variable,+,furi_hal_spi_bus_handle_subghz_int,FuriHalSpiBusHandle,
 Variable,+,furi_hal_spi_bus_r,FuriHalSpiBus,
 Variable,+,furi_hal_spi_preset_1edge_low_16m,const LL_SPI_InitTypeDef,
 Variable,+,furi_hal_spi_preset_1edge_low_2m,const LL_SPI_InitTypeDef,
 Variable,+,furi_hal_spi_preset_1edge_low_4m,const LL_SPI_InitTypeDef,
 Variable,+,furi_hal_spi_preset_1edge_low_8m,const LL_SPI_InitTypeDef,
 Variable,+,furi_hal_spi_preset_2edge_low_8m,const LL_SPI_InitTypeDef,
-Variable,+,furi_hal_subghz,volatile FuriHalSubGhz,
 Variable,+,gpio_button_back,const GpioPin,
 Variable,+,gpio_button_down,const GpioPin,
 Variable,+,gpio_button_left,const GpioPin,
@@ -3181,7 +3180,6 @@ Variable,+,gpio_button_ok,const GpioPin,
 Variable,+,gpio_button_right,const GpioPin,
 Variable,+,gpio_button_up,const GpioPin,
 Variable,+,gpio_cc1101_g0,const GpioPin,
-Variable,+,gpio_cc1101_g0_ext,const GpioPin,
 Variable,+,gpio_display_cs,const GpioPin,
 Variable,+,gpio_display_di,const GpioPin,
 Variable,+,gpio_display_rst_n,const GpioPin,
@@ -3214,13 +3212,9 @@ Variable,+,gpio_spi_d_miso,const GpioPin,
 Variable,+,gpio_spi_d_mosi,const GpioPin,
 Variable,+,gpio_spi_d_sck,const GpioPin,
 Variable,+,gpio_spi_r_miso,const GpioPin,
-Variable,+,gpio_spi_r_miso_ext,const GpioPin,
 Variable,+,gpio_spi_r_mosi,const GpioPin,
-Variable,+,gpio_spi_r_mosi_ext,const GpioPin,
 Variable,+,gpio_spi_r_sck,const GpioPin,
-Variable,+,gpio_spi_r_sck_ext,const GpioPin,
 Variable,+,gpio_subghz_cs,const GpioPin,
-Variable,+,gpio_subghz_cs_ext,const GpioPin,
 Variable,+,gpio_swclk,const GpioPin,
 Variable,+,gpio_swdio,const GpioPin,
 Variable,+,gpio_usart_rx,const GpioPin,

firmware/targets/f7/furi_hal/furi_hal_resources.c

@@ -14,11 +14,9 @@ const GpioPin gpio_vibro = {.port = VIBRO_GPIO_Port, .pin = VIBRO_Pin};
 const GpioPin gpio_ibutton = {.port = iBTN_GPIO_Port, .pin = iBTN_Pin};
 
 const GpioPin gpio_cc1101_g0 = {.port = CC1101_G0_GPIO_Port, .pin = CC1101_G0_Pin};
-const GpioPin gpio_cc1101_g0_ext = {.port = GPIOB, .pin = LL_GPIO_PIN_2};
 const GpioPin gpio_rf_sw_0 = {.port = RF_SW_0_GPIO_Port, .pin = RF_SW_0_Pin};
 
 const GpioPin gpio_subghz_cs = {.port = CC1101_CS_GPIO_Port, .pin = CC1101_CS_Pin};
-const GpioPin gpio_subghz_cs_ext = {.port = GPIOA, .pin = LL_GPIO_PIN_4};
 const GpioPin gpio_display_cs = {.port = DISPLAY_CS_GPIO_Port, .pin = DISPLAY_CS_Pin};
 const GpioPin gpio_display_rst_n = {.port = DISPLAY_RST_GPIO_Port, .pin = DISPLAY_RST_Pin};
 const GpioPin gpio_display_di = {.port = DISPLAY_DI_GPIO_Port, .pin = DISPLAY_DI_Pin};
@@ -39,9 +37,6 @@ const GpioPin gpio_spi_d_sck = {.port = SPI_D_SCK_GPIO_Port, .pin = SPI_D_SCK_Pi
 const GpioPin gpio_spi_r_miso = {.port = SPI_R_MISO_GPIO_Port, .pin = SPI_R_MISO_Pin};
 const GpioPin gpio_spi_r_mosi = {.port = SPI_R_MOSI_GPIO_Port, .pin = SPI_R_MOSI_Pin};
 const GpioPin gpio_spi_r_sck = {.port = SPI_R_SCK_GPIO_Port, .pin = SPI_R_SCK_Pin};
-const GpioPin gpio_spi_r_miso_ext = {.port = GPIOA, .pin = LL_GPIO_PIN_6};
-const GpioPin gpio_spi_r_mosi_ext = {.port = GPIOA, .pin = LL_GPIO_PIN_7};
-const GpioPin gpio_spi_r_sck_ext = {.port = GPIOB, .pin = LL_GPIO_PIN_3};
 
 const GpioPin gpio_ext_pc0 = {.port = GPIOC, .pin = LL_GPIO_PIN_0};
 const GpioPin gpio_ext_pc1 = {.port = GPIOC, .pin = LL_GPIO_PIN_1};

firmware/targets/f7/furi_hal/furi_hal_resources.h

@@ -57,11 +57,9 @@ extern const GpioPin gpio_vibro;
 extern const GpioPin gpio_ibutton;
 
 extern const GpioPin gpio_cc1101_g0;
-extern const GpioPin gpio_cc1101_g0_ext;
 extern const GpioPin gpio_rf_sw_0;
 
 extern const GpioPin gpio_subghz_cs;
-extern const GpioPin gpio_subghz_cs_ext;
 extern const GpioPin gpio_display_cs;
 extern const GpioPin gpio_display_rst_n;
 extern const GpioPin gpio_display_di;
@@ -82,9 +80,6 @@ extern const GpioPin gpio_spi_d_sck;
 extern const GpioPin gpio_spi_r_miso;
 extern const GpioPin gpio_spi_r_mosi;
 extern const GpioPin gpio_spi_r_sck;
-extern const GpioPin gpio_spi_r_miso_ext;
-extern const GpioPin gpio_spi_r_mosi_ext;
-extern const GpioPin gpio_spi_r_sck_ext;
 
 extern const GpioPin gpio_ext_pc0;
 extern const GpioPin gpio_ext_pc1;

firmware/targets/f7/furi_hal/furi_hal_spi_config.c

@@ -3,7 +3,6 @@
 #include <furi_hal_spi.h>
 #include <furi_hal_bus.h>
 #include <furi.h>
-#include <furi_hal_subghz.h>
 
 #define TAG "FuriHalSpiConfig"
 
@@ -91,7 +90,7 @@ void furi_hal_spi_config_deinit_early() {
 void furi_hal_spi_config_init() {
     furi_hal_spi_bus_init(&furi_hal_spi_bus_r);
 
-    furi_hal_spi_bus_handle_init(furi_hal_subghz.spi_bus_handle);
+    furi_hal_spi_bus_handle_init(&furi_hal_spi_bus_handle_subghz);
     furi_hal_spi_bus_handle_init(&furi_hal_spi_bus_handle_nfc);
     furi_hal_spi_bus_handle_init(&furi_hal_spi_bus_handle_sd_fast);
     furi_hal_spi_bus_handle_init(&furi_hal_spi_bus_handle_sd_slow);
@@ -265,15 +264,6 @@ static void furi_hal_spi_bus_handle_subghz_event_callback(
     furi_hal_spi_bus_r_handle_event_callback(handle, event, &furi_hal_spi_preset_1edge_low_8m);
 }
 
-FuriHalSpiBusHandle furi_hal_spi_bus_handle_subghz_int = {
-    .bus = &furi_hal_spi_bus_r,
-    .callback = furi_hal_spi_bus_handle_subghz_event_callback,
-    .miso = &gpio_spi_r_miso,
-    .mosi = &gpio_spi_r_mosi,
-    .sck = &gpio_spi_r_sck,
-    .cs = &gpio_subghz_cs,
-};
-
 FuriHalSpiBusHandle furi_hal_spi_bus_handle_subghz = {
     .bus = &furi_hal_spi_bus_r,
     .callback = furi_hal_spi_bus_handle_subghz_event_callback,
@@ -283,15 +273,6 @@ FuriHalSpiBusHandle furi_hal_spi_bus_handle_subghz = {
     .cs = &gpio_subghz_cs,
 };
 
-FuriHalSpiBusHandle furi_hal_spi_bus_handle_subghz_ext = {
-    .bus = &furi_hal_spi_bus_r,
-    .callback = furi_hal_spi_bus_handle_subghz_event_callback,
-    .miso = &gpio_ext_pa6,
-    .mosi = &gpio_ext_pa7,
-    .sck = &gpio_ext_pb3,
-    .cs = &gpio_ext_pa4,
-};
-
 static void furi_hal_spi_bus_handle_nfc_event_callback(
     FuriHalSpiBusHandle* handle,
     FuriHalSpiBusHandleEvent event) {

firmware/targets/f7/furi_hal/furi_hal_spi_config.h

@@ -27,12 +27,8 @@ extern FuriHalSpiBus furi_hal_spi_bus_r;
 /** Furi Hal Spi Bus D (Display, SdCard) */
 extern FuriHalSpiBus furi_hal_spi_bus_d;
 
-/** CC1101 on current SPI bus */
-extern FuriHalSpiBusHandle furi_hal_spi_bus_handle_subghz;
 /** CC1101 on `furi_hal_spi_bus_r` */
-extern FuriHalSpiBusHandle furi_hal_spi_bus_handle_subghz_int;
-/** CC1101 on external `furi_hal_spi_bus_r` */
-extern FuriHalSpiBusHandle furi_hal_spi_bus_handle_subghz_ext;
+extern FuriHalSpiBusHandle furi_hal_spi_bus_handle_subghz;
 
 /** ST25R3916 on `furi_hal_spi_bus_r` */
 extern FuriHalSpiBusHandle furi_hal_spi_bus_handle_nfc;

firmware/targets/f7/furi_hal/furi_hal_subghz.c

@@ -1,25 +1,22 @@
 #include <furi_hal_subghz.h>
-#include <furi_hal_subghz_configs.h>
+#include <lib/subghz/devices/cc1101_configs.h>
 
 #include <furi_hal_version.h>
 #include <furi_hal_rtc.h>
 #include <furi_hal_spi.h>
 #include <furi_hal_interrupt.h>
 #include <furi_hal_resources.h>
-#include <furi_hal_power.h>
 #include <furi_hal_bus.h>
 
 #include <stm32wbxx_ll_dma.h>
 
-#include <lib/flipper_format/flipper_format.h>
+#include <lib/flipper_format/flipper_format.h> // TODO
 
 #include <furi.h>
 #include <cc1101.h>
 #include <stdio.h>
 
 #define TAG "FuriHalSubGhz"
-//Initialisation timeout (ms)
-#define INIT_TIMEOUT 10
 
 static uint32_t furi_hal_subghz_debug_gpio_buff[2];
 
@@ -31,48 +28,47 @@ static uint32_t furi_hal_subghz_debug_gpio_buff[2];
 #define SUBGHZ_DMA_CH1_DEF SUBGHZ_DMA, SUBGHZ_DMA_CH1_CHANNEL
 #define SUBGHZ_DMA_CH2_DEF SUBGHZ_DMA, SUBGHZ_DMA_CH2_CHANNEL
 
+/** SubGhz state */
+typedef enum {
+    SubGhzStateInit, /**< Init pending */
+
+    SubGhzStateIdle, /**< Idle, energy save mode */
+
+    SubGhzStateAsyncRx, /**< Async RX started */
+
+    SubGhzStateAsyncTx, /**< Async TX started, DMA and timer is on */
+    SubGhzStateAsyncTxLast, /**< Async TX continue, DMA completed and timer got last value to go */
+    SubGhzStateAsyncTxEnd, /**< Async TX complete, cleanup needed */
+
+} SubGhzState;
+
+/** SubGhz regulation, receive transmission on the current frequency for the
+ * region */
+typedef enum {
+    SubGhzRegulationOnlyRx, /**only Rx*/
+    SubGhzRegulationTxRx, /**TxRx*/
+} SubGhzRegulation;
+
+typedef struct {
+    volatile SubGhzState state;
+    volatile SubGhzRegulation regulation;
+    volatile FuriHalSubGhzPreset preset;
+    const GpioPin* async_mirror_pin;
+
+    uint8_t rolling_counter_mult;
+    bool timestamp_file_names : 1;
+    bool dangerous_frequency_i : 1;
+} FuriHalSubGhz;
+
 volatile FuriHalSubGhz furi_hal_subghz = {
     .state = SubGhzStateInit,
     .regulation = SubGhzRegulationTxRx,
     .preset = FuriHalSubGhzPresetIDLE,
     .async_mirror_pin = NULL,
-    .radio_type = SubGhzRadioInternal,
-    .spi_bus_handle = &furi_hal_spi_bus_handle_subghz,
-    .cc1101_g0_pin = &gpio_cc1101_g0,
     .rolling_counter_mult = 1,
-    .ext_module_power_disabled = false,
     .dangerous_frequency_i = false,
 };
 
-void furi_hal_subghz_select_radio_type(SubGhzRadioType state) {
-    furi_hal_subghz.radio_type = state;
-}
-
-bool furi_hal_subghz_init_radio_type(SubGhzRadioType state) {
-    if(state == SubGhzRadioInternal && furi_hal_subghz.cc1101_g0_pin == &gpio_cc1101_g0) {
-        return true;
-    } else if(state == SubGhzRadioExternal && furi_hal_subghz.cc1101_g0_pin == &gpio_cc1101_g0_ext) {
-        return true;
-    }
-    furi_hal_spi_bus_handle_deinit(furi_hal_subghz.spi_bus_handle);
-
-    if(state == SubGhzRadioInternal) {
-        furi_hal_subghz.spi_bus_handle = &furi_hal_spi_bus_handle_subghz;
-        furi_hal_subghz.cc1101_g0_pin = &gpio_cc1101_g0;
-    } else {
-        furi_hal_subghz.spi_bus_handle = &furi_hal_spi_bus_handle_subghz_ext;
-        furi_hal_subghz.cc1101_g0_pin = &gpio_cc1101_g0_ext;
-    }
-
-    furi_hal_spi_bus_handle_init(furi_hal_subghz.spi_bus_handle);
-    furi_hal_subghz_init_check();
-    return true;
-}
-
-SubGhzRadioType furi_hal_subghz_get_radio_type(void) {
-    return furi_hal_subghz.radio_type;
-}
-
 uint8_t furi_hal_subghz_get_rolling_counter_mult(void) {
     return furi_hal_subghz.rolling_counter_mult;
 }
@@ -81,14 +77,6 @@ void furi_hal_subghz_set_rolling_counter_mult(uint8_t mult) {
     furi_hal_subghz.rolling_counter_mult = mult;
 }
 
-void furi_hal_subghz_set_external_power_disable(bool state) {
-    furi_hal_subghz.ext_module_power_disabled = state;
-}
-
-bool furi_hal_subghz_get_external_power_disable(void) {
-    return furi_hal_subghz.ext_module_power_disabled;
-}
-
 void furi_hal_subghz_set_dangerous_frequency(bool state_i) {
     furi_hal_subghz.dangerous_frequency_i = state_i;
 }
@@ -97,158 +85,105 @@ void furi_hal_subghz_set_async_mirror_pin(const GpioPin* pin) {
     furi_hal_subghz.async_mirror_pin = pin;
 }
 
-void furi_hal_subghz_init(void) {
-    furi_hal_subghz_init_check();
+const GpioPin* furi_hal_subghz_get_data_gpio() {
+    return &gpio_cc1101_g0;
 }
 
-bool furi_hal_subghz_enable_ext_power(void) {
-    if(furi_hal_subghz.ext_module_power_disabled) {
-        return false;
-    }
-    if(furi_hal_subghz.radio_type != SubGhzRadioInternal) {
-        uint8_t attempts = 0;
-        while(!furi_hal_power_is_otg_enabled() && attempts++ < 5) {
-            furi_hal_power_enable_otg();
-            //CC1101 power-up time
-            furi_delay_ms(10);
-        }
-    }
-    return furi_hal_power_is_otg_enabled();
-}
-
-void furi_hal_subghz_disable_ext_power(void) {
-    if(furi_hal_power_is_otg_enabled()) {
-        furi_hal_power_disable_otg();
-    }
-}
-
-bool furi_hal_subghz_check_radio(void) {
-    bool result = true;
-
-    furi_hal_subghz_init_radio_type(furi_hal_subghz.radio_type);
-
-    furi_hal_spi_acquire(furi_hal_subghz.spi_bus_handle);
-
-    uint8_t ver = cc1101_get_version(furi_hal_subghz.spi_bus_handle);
-    furi_hal_spi_release(furi_hal_subghz.spi_bus_handle);
-
-    if((ver != 0) && (ver != 255)) {
-        FURI_LOG_D(TAG, "Radio check ok");
-    } else {
-        FURI_LOG_D(TAG, "Radio check failed, revert to default");
-
-        result = false;
-    }
-    return result;
-}
-
-bool furi_hal_subghz_init_check(void) {
-    bool result = true;
-
+void furi_hal_subghz_init() {
     furi_assert(furi_hal_subghz.state == SubGhzStateInit);
     furi_hal_subghz.state = SubGhzStateIdle;
     furi_hal_subghz.preset = FuriHalSubGhzPresetIDLE;
 
-    furi_hal_spi_acquire(furi_hal_subghz.spi_bus_handle);
+    furi_hal_spi_acquire(&furi_hal_spi_bus_handle_subghz);
 
 #ifdef FURI_HAL_SUBGHZ_TX_GPIO
     furi_hal_gpio_init(&FURI_HAL_SUBGHZ_TX_GPIO, GpioModeOutputPushPull, GpioPullNo, GpioSpeedLow);
 #endif
 
     // Reset
-    furi_hal_gpio_init(furi_hal_subghz.cc1101_g0_pin, GpioModeAnalog, GpioPullNo, GpioSpeedLow);
-    cc1101_reset(furi_hal_subghz.spi_bus_handle);
-    cc1101_write_reg(furi_hal_subghz.spi_bus_handle, CC1101_IOCFG0, CC1101IocfgHighImpedance);
+    furi_hal_gpio_init(&gpio_cc1101_g0, GpioModeAnalog, GpioPullNo, GpioSpeedLow);
+    cc1101_reset(&furi_hal_spi_bus_handle_subghz);
+    cc1101_write_reg(&furi_hal_spi_bus_handle_subghz, CC1101_IOCFG0, CC1101IocfgHighImpedance);
 
     // Prepare GD0 for power on self test
-    furi_hal_gpio_init(furi_hal_subghz.cc1101_g0_pin, GpioModeInput, GpioPullNo, GpioSpeedLow);
+    furi_hal_gpio_init(&gpio_cc1101_g0, GpioModeInput, GpioPullNo, GpioSpeedLow);
 
     // GD0 low
-    cc1101_write_reg(furi_hal_subghz.spi_bus_handle, CC1101_IOCFG0, CC1101IocfgHW);
-    uint32_t test_start_time = furi_get_tick();
-    while(furi_hal_gpio_read(furi_hal_subghz.cc1101_g0_pin) != false && result) {
-        if(furi_get_tick() - test_start_time > INIT_TIMEOUT) {
-            result = false;
-        }
-    }
+    cc1101_write_reg(&furi_hal_spi_bus_handle_subghz, CC1101_IOCFG0, CC1101IocfgHW);
+    while(furi_hal_gpio_read(&gpio_cc1101_g0) != false)
+        ;
 
     // GD0 high
     cc1101_write_reg(
-        furi_hal_subghz.spi_bus_handle, CC1101_IOCFG0, CC1101IocfgHW | CC1101_IOCFG_INV);
-    test_start_time = furi_get_tick();
-    while(furi_hal_gpio_read(furi_hal_subghz.cc1101_g0_pin) != true && result) {
-        if(furi_get_tick() - test_start_time > INIT_TIMEOUT) {
-            result = false;
-        }
-    }
+        &furi_hal_spi_bus_handle_subghz, CC1101_IOCFG0, CC1101IocfgHW | CC1101_IOCFG_INV);
+    while(furi_hal_gpio_read(&gpio_cc1101_g0) != true)
+        ;
 
     // Reset GD0 to floating state
-    cc1101_write_reg(furi_hal_subghz.spi_bus_handle, CC1101_IOCFG0, CC1101IocfgHighImpedance);
-    furi_hal_gpio_init(furi_hal_subghz.cc1101_g0_pin, GpioModeAnalog, GpioPullNo, GpioSpeedLow);
+    cc1101_write_reg(&furi_hal_spi_bus_handle_subghz, CC1101_IOCFG0, CC1101IocfgHighImpedance);
+    furi_hal_gpio_init(&gpio_cc1101_g0, GpioModeAnalog, GpioPullNo, GpioSpeedLow);
 
     // RF switches
     furi_hal_gpio_init(&gpio_rf_sw_0, GpioModeOutputPushPull, GpioPullNo, GpioSpeedLow);
-    cc1101_write_reg(furi_hal_subghz.spi_bus_handle, CC1101_IOCFG2, CC1101IocfgHW);
+    cc1101_write_reg(&furi_hal_spi_bus_handle_subghz, CC1101_IOCFG2, CC1101IocfgHW);
 
     // Go to sleep
-    cc1101_shutdown(furi_hal_subghz.spi_bus_handle);
+    cc1101_shutdown(&furi_hal_spi_bus_handle_subghz);
 
-    furi_hal_spi_release(furi_hal_subghz.spi_bus_handle);
-
-    if(result) {
-        FURI_LOG_I(TAG, "Init OK");
-    } else {
-        FURI_LOG_E(TAG, "Selected CC1101 module init failed, revert to default");
-    }
-    return result;
+    furi_hal_spi_release(&furi_hal_spi_bus_handle_subghz);
+    FURI_LOG_I(TAG, "Init OK");
 }
 
 void furi_hal_subghz_sleep() {
     furi_assert(furi_hal_subghz.state == SubGhzStateIdle);
-    furi_hal_spi_acquire(furi_hal_subghz.spi_bus_handle);
+    furi_hal_spi_acquire(&furi_hal_spi_bus_handle_subghz);
 
-    cc1101_switch_to_idle(furi_hal_subghz.spi_bus_handle);
+    cc1101_switch_to_idle(&furi_hal_spi_bus_handle_subghz);
 
-    cc1101_write_reg(furi_hal_subghz.spi_bus_handle, CC1101_IOCFG0, CC1101IocfgHighImpedance);
-    furi_hal_gpio_init(furi_hal_subghz.cc1101_g0_pin, GpioModeAnalog, GpioPullNo, GpioSpeedLow);
+    cc1101_write_reg(&furi_hal_spi_bus_handle_subghz, CC1101_IOCFG0, CC1101IocfgHighImpedance);
+    furi_hal_gpio_init(&gpio_cc1101_g0, GpioModeAnalog, GpioPullNo, GpioSpeedLow);
 
-    cc1101_shutdown(furi_hal_subghz.spi_bus_handle);
+    cc1101_shutdown(&furi_hal_spi_bus_handle_subghz);
 
-    furi_hal_spi_release(furi_hal_subghz.spi_bus_handle);
+    furi_hal_spi_release(&furi_hal_spi_bus_handle_subghz);
 
     furi_hal_subghz.preset = FuriHalSubGhzPresetIDLE;
 }
 
 void furi_hal_subghz_dump_state() {
-    furi_hal_spi_acquire(furi_hal_subghz.spi_bus_handle);
+    furi_hal_spi_acquire(&furi_hal_spi_bus_handle_subghz);
     printf(
         "[furi_hal_subghz] cc1101 chip %d, version %d\r\n",
-        cc1101_get_partnumber(furi_hal_subghz.spi_bus_handle),
-        cc1101_get_version(furi_hal_subghz.spi_bus_handle));
-    furi_hal_spi_release(furi_hal_subghz.spi_bus_handle);
+        cc1101_get_partnumber(&furi_hal_spi_bus_handle_subghz),
+        cc1101_get_version(&furi_hal_spi_bus_handle_subghz));
+    furi_hal_spi_release(&furi_hal_spi_bus_handle_subghz);
 }
 
 void furi_hal_subghz_load_preset(FuriHalSubGhzPreset preset) {
     if(preset == FuriHalSubGhzPresetOok650Async) {
-        furi_hal_subghz_load_registers((uint8_t*)furi_hal_subghz_preset_ook_650khz_async_regs);
-        furi_hal_subghz_load_patable(furi_hal_subghz_preset_ook_async_patable);
+        furi_hal_subghz_load_registers(
+            (uint8_t*)subghz_device_cc1101_preset_ook_650khz_async_regs);
+        furi_hal_subghz_load_patable(subghz_device_cc1101_preset_ook_async_patable);
     } else if(preset == FuriHalSubGhzPresetOok270Async) {
-        furi_hal_subghz_load_registers((uint8_t*)furi_hal_subghz_preset_ook_270khz_async_regs);
-        furi_hal_subghz_load_patable(furi_hal_subghz_preset_ook_async_patable);
+        furi_hal_subghz_load_registers(
+            (uint8_t*)subghz_device_cc1101_preset_ook_270khz_async_regs);
+        furi_hal_subghz_load_patable(subghz_device_cc1101_preset_ook_async_patable);
     } else if(preset == FuriHalSubGhzPreset2FSKDev238Async) {
         furi_hal_subghz_load_registers(
-            (uint8_t*)furi_hal_subghz_preset_2fsk_dev2_38khz_async_regs);
-        furi_hal_subghz_load_patable(furi_hal_subghz_preset_2fsk_async_patable);
+            (uint8_t*)subghz_device_cc1101_preset_2fsk_dev2_38khz_async_regs);
+        furi_hal_subghz_load_patable(subghz_device_cc1101_preset_2fsk_async_patable);
     } else if(preset == FuriHalSubGhzPreset2FSKDev476Async) {
         furi_hal_subghz_load_registers(
-            (uint8_t*)furi_hal_subghz_preset_2fsk_dev47_6khz_async_regs);
-        furi_hal_subghz_load_patable(furi_hal_subghz_preset_2fsk_async_patable);
+            (uint8_t*)subghz_device_cc1101_preset_2fsk_dev47_6khz_async_regs);
+        furi_hal_subghz_load_patable(subghz_device_cc1101_preset_2fsk_async_patable);
     } else if(preset == FuriHalSubGhzPresetMSK99_97KbAsync) {
-        furi_hal_subghz_load_registers((uint8_t*)furi_hal_subghz_preset_msk_99_97kb_async_regs);
-        furi_hal_subghz_load_patable(furi_hal_subghz_preset_msk_async_patable);
+        furi_hal_subghz_load_registers(
+            (uint8_t*)subghz_device_cc1101_preset_msk_99_97kb_async_regs);
+        furi_hal_subghz_load_patable(subghz_device_cc1101_preset_msk_async_patable);
     } else if(preset == FuriHalSubGhzPresetGFSK9_99KbAsync) {
-        furi_hal_subghz_load_registers((uint8_t*)furi_hal_subghz_preset_gfsk_9_99kb_async_regs);
-        furi_hal_subghz_load_patable(furi_hal_subghz_preset_gfsk_async_patable);
+        furi_hal_subghz_load_registers(
+            (uint8_t*)subghz_device_cc1101_preset_gfsk_9_99kb_async_regs);
+        furi_hal_subghz_load_patable(subghz_device_cc1101_preset_gfsk_async_patable);
     } else {
         furi_crash("SubGhz: Missing config.");
     }
@@ -257,15 +192,15 @@ void furi_hal_subghz_load_preset(FuriHalSubGhzPreset preset) {
 
 void furi_hal_subghz_load_custom_preset(uint8_t* preset_data) {
     //load config
-    furi_hal_spi_acquire(furi_hal_subghz.spi_bus_handle);
-    cc1101_reset(furi_hal_subghz.spi_bus_handle);
+    furi_hal_spi_acquire(&furi_hal_spi_bus_handle_subghz);
+    cc1101_reset(&furi_hal_spi_bus_handle_subghz);
     uint32_t i = 0;
     uint8_t pa[8] = {0};
     while(preset_data[i]) {
-        cc1101_write_reg(furi_hal_subghz.spi_bus_handle, preset_data[i], preset_data[i + 1]);
+        cc1101_write_reg(&furi_hal_spi_bus_handle_subghz, preset_data[i], preset_data[i + 1]);
         i += 2;
     }
-    furi_hal_spi_release(furi_hal_subghz.spi_bus_handle);
+    furi_hal_spi_release(&furi_hal_spi_bus_handle_subghz);
 
     //load pa table
     memcpy(&pa[0], &preset_data[i + 2], 8);
@@ -287,48 +222,48 @@ void furi_hal_subghz_load_custom_preset(uint8_t* preset_data) {
 }
 
 void furi_hal_subghz_load_registers(uint8_t* data) {
-    furi_hal_spi_acquire(furi_hal_subghz.spi_bus_handle);
-    cc1101_reset(furi_hal_subghz.spi_bus_handle);
+    furi_hal_spi_acquire(&furi_hal_spi_bus_handle_subghz);
+    cc1101_reset(&furi_hal_spi_bus_handle_subghz);
     uint32_t i = 0;
     while(data[i]) {
-        cc1101_write_reg(furi_hal_subghz.spi_bus_handle, data[i], data[i + 1]);
+        cc1101_write_reg(&furi_hal_spi_bus_handle_subghz, data[i], data[i + 1]);
         i += 2;
     }
-    furi_hal_spi_release(furi_hal_subghz.spi_bus_handle);
+    furi_hal_spi_release(&furi_hal_spi_bus_handle_subghz);
 }
 
 void furi_hal_subghz_load_patable(const uint8_t data[8]) {
-    furi_hal_spi_acquire(furi_hal_subghz.spi_bus_handle);
-    cc1101_set_pa_table(furi_hal_subghz.spi_bus_handle, data);
-    furi_hal_spi_release(furi_hal_subghz.spi_bus_handle);
+    furi_hal_spi_acquire(&furi_hal_spi_bus_handle_subghz);
+    cc1101_set_pa_table(&furi_hal_spi_bus_handle_subghz, data);
+    furi_hal_spi_release(&furi_hal_spi_bus_handle_subghz);
 }
 
 void furi_hal_subghz_write_packet(const uint8_t* data, uint8_t size) {
-    furi_hal_spi_acquire(furi_hal_subghz.spi_bus_handle);
-    cc1101_flush_tx(furi_hal_subghz.spi_bus_handle);
-    cc1101_write_reg(furi_hal_subghz.spi_bus_handle, CC1101_FIFO, size);
-    cc1101_write_fifo(furi_hal_subghz.spi_bus_handle, data, size);
-    furi_hal_spi_release(furi_hal_subghz.spi_bus_handle);
+    furi_hal_spi_acquire(&furi_hal_spi_bus_handle_subghz);
+    cc1101_flush_tx(&furi_hal_spi_bus_handle_subghz);
+    cc1101_write_reg(&furi_hal_spi_bus_handle_subghz, CC1101_FIFO, size);
+    cc1101_write_fifo(&furi_hal_spi_bus_handle_subghz, data, size);
+    furi_hal_spi_release(&furi_hal_spi_bus_handle_subghz);
 }
 
 void furi_hal_subghz_flush_rx() {
-    furi_hal_spi_acquire(furi_hal_subghz.spi_bus_handle);
-    cc1101_flush_rx(furi_hal_subghz.spi_bus_handle);
-    furi_hal_spi_release(furi_hal_subghz.spi_bus_handle);
+    furi_hal_spi_acquire(&furi_hal_spi_bus_handle_subghz);
+    cc1101_flush_rx(&furi_hal_spi_bus_handle_subghz);
+    furi_hal_spi_release(&furi_hal_spi_bus_handle_subghz);
 }
 
 void furi_hal_subghz_flush_tx() {
-    furi_hal_spi_acquire(furi_hal_subghz.spi_bus_handle);
-    cc1101_flush_tx(furi_hal_subghz.spi_bus_handle);
-    furi_hal_spi_release(furi_hal_subghz.spi_bus_handle);
+    furi_hal_spi_acquire(&furi_hal_spi_bus_handle_subghz);
+    cc1101_flush_tx(&furi_hal_spi_bus_handle_subghz);
+    furi_hal_spi_release(&furi_hal_spi_bus_handle_subghz);
 }
 
 bool furi_hal_subghz_rx_pipe_not_empty() {
     CC1101RxBytes status[1];
-    furi_hal_spi_acquire(furi_hal_subghz.spi_bus_handle);
+    furi_hal_spi_acquire(&furi_hal_spi_bus_handle_subghz);
     cc1101_read_reg(
-        furi_hal_subghz.spi_bus_handle, (CC1101_STATUS_RXBYTES) | CC1101_BURST, (uint8_t*)status);
-    furi_hal_spi_release(furi_hal_subghz.spi_bus_handle);
+        &furi_hal_spi_bus_handle_subghz, (CC1101_STATUS_RXBYTES) | CC1101_BURST, (uint8_t*)status);
+    furi_hal_spi_release(&furi_hal_spi_bus_handle_subghz);
     // TODO: you can add a buffer overflow flag if needed
     if(status->NUM_RXBYTES > 0) {
         return true;
@@ -338,10 +273,10 @@ bool furi_hal_subghz_rx_pipe_not_empty() {
 }
 
 bool furi_hal_subghz_is_rx_data_crc_valid() {
-    furi_hal_spi_acquire(furi_hal_subghz.spi_bus_handle);
+    furi_hal_spi_acquire(&furi_hal_spi_bus_handle_subghz);
     uint8_t data[1];
-    cc1101_read_reg(furi_hal_subghz.spi_bus_handle, CC1101_STATUS_LQI | CC1101_BURST, data);
-    furi_hal_spi_release(furi_hal_subghz.spi_bus_handle);
+    cc1101_read_reg(&furi_hal_spi_bus_handle_subghz, CC1101_STATUS_LQI | CC1101_BURST, data);
+    furi_hal_spi_release(&furi_hal_spi_bus_handle_subghz);
     if(((data[0] >> 7) & 0x01)) {
         return true;
     } else {
@@ -350,51 +285,51 @@ bool furi_hal_subghz_is_rx_data_crc_valid() {
 }
 
 void furi_hal_subghz_read_packet(uint8_t* data, uint8_t* size) {
-    furi_hal_spi_acquire(furi_hal_subghz.spi_bus_handle);
-    cc1101_read_fifo(furi_hal_subghz.spi_bus_handle, data, size);
-    furi_hal_spi_release(furi_hal_subghz.spi_bus_handle);
+    furi_hal_spi_acquire(&furi_hal_spi_bus_handle_subghz);
+    cc1101_read_fifo(&furi_hal_spi_bus_handle_subghz, data, size);
+    furi_hal_spi_release(&furi_hal_spi_bus_handle_subghz);
 }
 
 void furi_hal_subghz_shutdown() {
-    furi_hal_spi_acquire(furi_hal_subghz.spi_bus_handle);
+    furi_hal_spi_acquire(&furi_hal_spi_bus_handle_subghz);
     // Reset and shutdown
-    cc1101_shutdown(furi_hal_subghz.spi_bus_handle);
-    furi_hal_spi_release(furi_hal_subghz.spi_bus_handle);
+    cc1101_shutdown(&furi_hal_spi_bus_handle_subghz);
+    furi_hal_spi_release(&furi_hal_spi_bus_handle_subghz);
 }
 
 void furi_hal_subghz_reset() {
-    furi_hal_spi_acquire(furi_hal_subghz.spi_bus_handle);
-    furi_hal_gpio_init(furi_hal_subghz.cc1101_g0_pin, GpioModeAnalog, GpioPullNo, GpioSpeedLow);
-    cc1101_switch_to_idle(furi_hal_subghz.spi_bus_handle);
-    cc1101_reset(furi_hal_subghz.spi_bus_handle);
-    cc1101_write_reg(furi_hal_subghz.spi_bus_handle, CC1101_IOCFG0, CC1101IocfgHighImpedance);
-    furi_hal_spi_release(furi_hal_subghz.spi_bus_handle);
+    furi_hal_spi_acquire(&furi_hal_spi_bus_handle_subghz);
+    furi_hal_gpio_init(&gpio_cc1101_g0, GpioModeAnalog, GpioPullNo, GpioSpeedLow);
+    cc1101_switch_to_idle(&furi_hal_spi_bus_handle_subghz);
+    cc1101_reset(&furi_hal_spi_bus_handle_subghz);
+    cc1101_write_reg(&furi_hal_spi_bus_handle_subghz, CC1101_IOCFG0, CC1101IocfgHighImpedance);
+    furi_hal_spi_release(&furi_hal_spi_bus_handle_subghz);
 }
 
 void furi_hal_subghz_idle() {
-    furi_hal_spi_acquire(furi_hal_subghz.spi_bus_handle);
-    cc1101_switch_to_idle(furi_hal_subghz.spi_bus_handle);
-    furi_hal_spi_release(furi_hal_subghz.spi_bus_handle);
+    furi_hal_spi_acquire(&furi_hal_spi_bus_handle_subghz);
+    cc1101_switch_to_idle(&furi_hal_spi_bus_handle_subghz);
+    furi_hal_spi_release(&furi_hal_spi_bus_handle_subghz);
 }
 
 void furi_hal_subghz_rx() {
-    furi_hal_spi_acquire(furi_hal_subghz.spi_bus_handle);
-    cc1101_switch_to_rx(furi_hal_subghz.spi_bus_handle);
-    furi_hal_spi_release(furi_hal_subghz.spi_bus_handle);
+    furi_hal_spi_acquire(&furi_hal_spi_bus_handle_subghz);
+    cc1101_switch_to_rx(&furi_hal_spi_bus_handle_subghz);
+    furi_hal_spi_release(&furi_hal_spi_bus_handle_subghz);
 }
 
 bool furi_hal_subghz_tx() {
     if(furi_hal_subghz.regulation != SubGhzRegulationTxRx) return false;
-    furi_hal_spi_acquire(furi_hal_subghz.spi_bus_handle);
-    cc1101_switch_to_tx(furi_hal_subghz.spi_bus_handle);
-    furi_hal_spi_release(furi_hal_subghz.spi_bus_handle);
+    furi_hal_spi_acquire(&furi_hal_spi_bus_handle_subghz);
+    cc1101_switch_to_tx(&furi_hal_spi_bus_handle_subghz);
+    furi_hal_spi_release(&furi_hal_spi_bus_handle_subghz);
     return true;
 }
 
 float furi_hal_subghz_get_rssi() {
-    furi_hal_spi_acquire(furi_hal_subghz.spi_bus_handle);
-    int32_t rssi_dec = cc1101_get_rssi(furi_hal_subghz.spi_bus_handle);
-    furi_hal_spi_release(furi_hal_subghz.spi_bus_handle);
+    furi_hal_spi_acquire(&furi_hal_spi_bus_handle_subghz);
+    int32_t rssi_dec = cc1101_get_rssi(&furi_hal_spi_bus_handle_subghz);
+    furi_hal_spi_release(&furi_hal_spi_bus_handle_subghz);
 
     float rssi = rssi_dec;
     if(rssi_dec >= 128) {
@@ -407,10 +342,10 @@ float furi_hal_subghz_get_rssi() {
 }
 
 uint8_t furi_hal_subghz_get_lqi() {
-    furi_hal_spi_acquire(furi_hal_subghz.spi_bus_handle);
+    furi_hal_spi_acquire(&furi_hal_spi_bus_handle_subghz);
     uint8_t data[1];
-    cc1101_read_reg(furi_hal_subghz.spi_bus_handle, CC1101_STATUS_LQI | CC1101_BURST, data);
-    furi_hal_spi_release(furi_hal_subghz.spi_bus_handle);
+    cc1101_read_reg(&furi_hal_spi_bus_handle_subghz, CC1101_STATUS_LQI | CC1101_BURST, data);
+    furi_hal_spi_release(&furi_hal_spi_bus_handle_subghz);
     return data[0] & 0x7F;
 }
 
@@ -468,39 +403,39 @@ bool furi_hal_subghz_is_tx_allowed(uint32_t value) {
 uint32_t furi_hal_subghz_set_frequency(uint32_t value) {
     furi_hal_subghz.regulation = SubGhzRegulationTxRx;
 
-    furi_hal_spi_acquire(furi_hal_subghz.spi_bus_handle);
-    uint32_t real_frequency = cc1101_set_frequency(furi_hal_subghz.spi_bus_handle, value);
-    cc1101_calibrate(furi_hal_subghz.spi_bus_handle);
+    furi_hal_spi_acquire(&furi_hal_spi_bus_handle_subghz);
+    uint32_t real_frequency = cc1101_set_frequency(&furi_hal_spi_bus_handle_subghz, value);
+    cc1101_calibrate(&furi_hal_spi_bus_handle_subghz);
 
     while(true) {
-        CC1101Status status = cc1101_get_status(furi_hal_subghz.spi_bus_handle);
+        CC1101Status status = cc1101_get_status(&furi_hal_spi_bus_handle_subghz);
         if(status.STATE == CC1101StateIDLE) break;
     }
 
-    furi_hal_spi_release(furi_hal_subghz.spi_bus_handle);
+    furi_hal_spi_release(&furi_hal_spi_bus_handle_subghz);
     return real_frequency;
 }
 
 void furi_hal_subghz_set_path(FuriHalSubGhzPath path) {
-    furi_hal_spi_acquire(furi_hal_subghz.spi_bus_handle);
+    furi_hal_spi_acquire(&furi_hal_spi_bus_handle_subghz);
     if(path == FuriHalSubGhzPath433) {
         furi_hal_gpio_write(&gpio_rf_sw_0, 0);
         cc1101_write_reg(
-            furi_hal_subghz.spi_bus_handle, CC1101_IOCFG2, CC1101IocfgHW | CC1101_IOCFG_INV);
+            &furi_hal_spi_bus_handle_subghz, CC1101_IOCFG2, CC1101IocfgHW | CC1101_IOCFG_INV);
     } else if(path == FuriHalSubGhzPath315) {
         furi_hal_gpio_write(&gpio_rf_sw_0, 1);
-        cc1101_write_reg(furi_hal_subghz.spi_bus_handle, CC1101_IOCFG2, CC1101IocfgHW);
+        cc1101_write_reg(&furi_hal_spi_bus_handle_subghz, CC1101_IOCFG2, CC1101IocfgHW);
     } else if(path == FuriHalSubGhzPath868) {
         furi_hal_gpio_write(&gpio_rf_sw_0, 1);
         cc1101_write_reg(
-            furi_hal_subghz.spi_bus_handle, CC1101_IOCFG2, CC1101IocfgHW | CC1101_IOCFG_INV);
+            &furi_hal_spi_bus_handle_subghz, CC1101_IOCFG2, CC1101IocfgHW | CC1101_IOCFG_INV);
     } else if(path == FuriHalSubGhzPathIsolate) {
         furi_hal_gpio_write(&gpio_rf_sw_0, 0);
-        cc1101_write_reg(furi_hal_subghz.spi_bus_handle, CC1101_IOCFG2, CC1101IocfgHW);
+        cc1101_write_reg(&furi_hal_spi_bus_handle_subghz, CC1101_IOCFG2, CC1101IocfgHW);
     } else {
         furi_crash("SubGhz: Incorrect path during set.");
     }
-    furi_hal_spi_release(furi_hal_subghz.spi_bus_handle);
+    furi_hal_spi_release(&furi_hal_spi_bus_handle_subghz);
 }
 
 static bool furi_hal_subghz_start_debug() {
@@ -530,7 +465,7 @@ volatile uint32_t furi_hal_subghz_capture_delta_duration = 0;
 volatile FuriHalSubGhzCaptureCallback furi_hal_subghz_capture_callback = NULL;
 volatile void* furi_hal_subghz_capture_callback_context = NULL;
 
-static void furi_hal_subghz_capture_int_ISR() {
+static void furi_hal_subghz_capture_ISR() {
     // Channel 1
     if(LL_TIM_IsActiveFlag_CC1(TIM2)) {
         LL_TIM_ClearFlag_CC1(TIM2);
@@ -560,27 +495,6 @@ static void furi_hal_subghz_capture_int_ISR() {
     }
 }
 
-static void furi_hal_subghz_capture_ext_ISR() {
-    if(!furi_hal_gpio_read(furi_hal_subghz.cc1101_g0_pin)) {
-        if(furi_hal_subghz_capture_callback) {
-            if(furi_hal_subghz.async_mirror_pin != NULL)
-                furi_hal_gpio_write(furi_hal_subghz.async_mirror_pin, false);
-
-            furi_hal_subghz_capture_callback(
-                true, TIM2->CNT, (void*)furi_hal_subghz_capture_callback_context);
-        }
-    } else {
-        if(furi_hal_subghz_capture_callback) {
-            if(furi_hal_subghz.async_mirror_pin != NULL)
-                furi_hal_gpio_write(furi_hal_subghz.async_mirror_pin, true);
-
-            furi_hal_subghz_capture_callback(
-                false, TIM2->CNT, (void*)furi_hal_subghz_capture_callback_context);
-        }
-    }
-    TIM2->CNT = 6;
-}
-
 void furi_hal_subghz_start_async_rx(FuriHalSubGhzCaptureCallback callback, void* context) {
     furi_assert(furi_hal_subghz.state == SubGhzStateIdle);
     furi_hal_subghz.state = SubGhzStateAsyncRx;
@@ -588,6 +502,9 @@ void furi_hal_subghz_start_async_rx(FuriHalSubGhzCaptureCallback callback, void*
     furi_hal_subghz_capture_callback = callback;
     furi_hal_subghz_capture_callback_context = context;
 
+    furi_hal_gpio_init_ex(
+        &gpio_cc1101_g0, GpioModeAltFunctionPushPull, GpioPullNo, GpioSpeedLow, GpioAltFn1TIM2);
+
     furi_hal_bus_enable(FuriHalBusTIM2);
 
     // Timer: base
@@ -595,62 +512,42 @@ void furi_hal_subghz_start_async_rx(FuriHalSubGhzCaptureCallback callback, void*
     TIM_InitStruct.Prescaler = 64 - 1;
     TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP;
     TIM_InitStruct.Autoreload = 0x7FFFFFFE;
-    // Clock division for capture filter (for internal radio)
+    // Clock division for capture filter
     TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV4;
     LL_TIM_Init(TIM2, &TIM_InitStruct);
 
     // Timer: advanced
     LL_TIM_SetClockSource(TIM2, LL_TIM_CLOCKSOURCE_INTERNAL);
     LL_TIM_DisableARRPreload(TIM2);
+    LL_TIM_SetTriggerInput(TIM2, LL_TIM_TS_TI2FP2);
+    LL_TIM_SetSlaveMode(TIM2, LL_TIM_SLAVEMODE_RESET);
+    LL_TIM_SetTriggerOutput(TIM2, LL_TIM_TRGO_RESET);
+    LL_TIM_EnableMasterSlaveMode(TIM2);
     LL_TIM_DisableDMAReq_TRIG(TIM2);
     LL_TIM_DisableIT_TRIG(TIM2);
 
-    if(furi_hal_subghz.radio_type == SubGhzRadioInternal) {
-        LL_TIM_SetTriggerInput(TIM2, LL_TIM_TS_TI2FP2);
-        LL_TIM_SetSlaveMode(TIM2, LL_TIM_SLAVEMODE_RESET);
-        LL_TIM_SetTriggerOutput(TIM2, LL_TIM_TRGO_RESET);
-        LL_TIM_EnableMasterSlaveMode(TIM2);
+    // Timer: channel 1 indirect
+    LL_TIM_IC_SetActiveInput(TIM2, LL_TIM_CHANNEL_CH1, LL_TIM_ACTIVEINPUT_INDIRECTTI);
+    LL_TIM_IC_SetPrescaler(TIM2, LL_TIM_CHANNEL_CH1, LL_TIM_ICPSC_DIV1);
+    LL_TIM_IC_SetPolarity(TIM2, LL_TIM_CHANNEL_CH1, LL_TIM_IC_POLARITY_FALLING);
 
-        // Timer: channel 1 indirect
-        LL_TIM_IC_SetActiveInput(TIM2, LL_TIM_CHANNEL_CH1, LL_TIM_ACTIVEINPUT_INDIRECTTI);
-        LL_TIM_IC_SetPrescaler(TIM2, LL_TIM_CHANNEL_CH1, LL_TIM_ICPSC_DIV1);
-        LL_TIM_IC_SetPolarity(TIM2, LL_TIM_CHANNEL_CH1, LL_TIM_IC_POLARITY_FALLING);
-        LL_TIM_IC_SetFilter(TIM2, LL_TIM_CHANNEL_CH1, LL_TIM_IC_FILTER_FDIV1);
+    // Timer: channel 2 direct
+    LL_TIM_IC_SetActiveInput(TIM2, LL_TIM_CHANNEL_CH2, LL_TIM_ACTIVEINPUT_DIRECTTI);
+    LL_TIM_IC_SetPrescaler(TIM2, LL_TIM_CHANNEL_CH2, LL_TIM_ICPSC_DIV1);
+    LL_TIM_IC_SetPolarity(TIM2, LL_TIM_CHANNEL_CH2, LL_TIM_IC_POLARITY_RISING);
+    LL_TIM_IC_SetFilter(
+        TIM2,
+        LL_TIM_CHANNEL_CH2,
+        LL_TIM_IC_FILTER_FDIV32_N8); // Capture filter: 1/(64000000/64/4/32*8) = 16us
 
-        // Timer: channel 2 direct
-        LL_TIM_IC_SetActiveInput(TIM2, LL_TIM_CHANNEL_CH2, LL_TIM_ACTIVEINPUT_DIRECTTI);
-        LL_TIM_IC_SetPrescaler(TIM2, LL_TIM_CHANNEL_CH2, LL_TIM_ICPSC_DIV1);
-        LL_TIM_IC_SetPolarity(TIM2, LL_TIM_CHANNEL_CH2, LL_TIM_IC_POLARITY_RISING);
-        LL_TIM_IC_SetFilter(TIM2, LL_TIM_CHANNEL_CH2, LL_TIM_IC_FILTER_FDIV32_N8);
+    // ISR setup
+    furi_hal_interrupt_set_isr(FuriHalInterruptIdTIM2, furi_hal_subghz_capture_ISR, NULL);
 
-        // ISR setup
-        furi_hal_interrupt_set_isr(FuriHalInterruptIdTIM2, furi_hal_subghz_capture_int_ISR, NULL);
-
-        // Interrupts and channels
-        LL_TIM_EnableIT_CC1(TIM2);
-        LL_TIM_EnableIT_CC2(TIM2);
-        LL_TIM_CC_EnableChannel(TIM2, LL_TIM_CHANNEL_CH1);
-        LL_TIM_CC_EnableChannel(TIM2, LL_TIM_CHANNEL_CH2);
-
-        furi_hal_gpio_init_ex(
-            furi_hal_subghz.cc1101_g0_pin,
-            GpioModeAltFunctionPushPull,
-            GpioPullNo,
-            GpioSpeedLow,
-            GpioAltFn1TIM2);
-    } else {
-        furi_hal_gpio_init(
-            furi_hal_subghz.cc1101_g0_pin,
-            GpioModeInterruptRiseFall,
-            GpioPullUp,
-            GpioSpeedVeryHigh);
-        furi_hal_gpio_disable_int_callback(furi_hal_subghz.cc1101_g0_pin);
-        furi_hal_gpio_remove_int_callback(furi_hal_subghz.cc1101_g0_pin);
-        furi_hal_gpio_add_int_callback(
-            furi_hal_subghz.cc1101_g0_pin,
-            furi_hal_subghz_capture_ext_ISR,
-            furi_hal_subghz_capture_callback);
-    }
+    // Interrupts and channels
+    LL_TIM_EnableIT_CC1(TIM2);
+    LL_TIM_EnableIT_CC2(TIM2);
+    LL_TIM_CC_EnableChannel(TIM2, LL_TIM_CHANNEL_CH1);
+    LL_TIM_CC_EnableChannel(TIM2, LL_TIM_CHANNEL_CH2);
 
     // Start timer
     LL_TIM_SetCounter(TIM2, 0);
@@ -680,14 +577,9 @@ void furi_hal_subghz_stop_async_rx() {
     furi_hal_subghz_stop_debug();
 
     FURI_CRITICAL_EXIT();
-    if(furi_hal_subghz.radio_type == SubGhzRadioInternal) {
-        furi_hal_interrupt_set_isr(FuriHalInterruptIdTIM2, NULL, NULL);
-    } else {
-        furi_hal_gpio_disable_int_callback(furi_hal_subghz.cc1101_g0_pin);
-        furi_hal_gpio_remove_int_callback(furi_hal_subghz.cc1101_g0_pin);
-    }
+    furi_hal_interrupt_set_isr(FuriHalInterruptIdTIM2, NULL, NULL);
 
-    furi_hal_gpio_init(furi_hal_subghz.cc1101_g0_pin, GpioModeAnalog, GpioPullNo, GpioSpeedLow);
+    furi_hal_gpio_init(&gpio_cc1101_g0, GpioModeAnalog, GpioPullNo, GpioSpeedLow);
 }
 
 typedef struct {
@@ -791,8 +683,7 @@ static void furi_hal_subghz_async_tx_timer_isr() {
             } else if(furi_hal_subghz.state == SubGhzStateAsyncTxLast) {
                 furi_hal_subghz.state = SubGhzStateAsyncTxEnd;
                 //forcibly pulls the pin to the ground so that there is no carrier
-                furi_hal_gpio_init(
-                    furi_hal_subghz.cc1101_g0_pin, GpioModeInput, GpioPullDown, GpioSpeedLow);
+                furi_hal_gpio_init(&gpio_cc1101_g0, GpioModeInput, GpioPullDown, GpioSpeedLow);
                 LL_TIM_DisableCounter(TIM2);
             } else {
                 furi_crash(NULL);
@@ -819,20 +710,9 @@ bool furi_hal_subghz_start_async_tx(FuriHalSubGhzAsyncTxCallback callback, void*
     furi_hal_subghz_async_tx.buffer =
         malloc(API_HAL_SUBGHZ_ASYNC_TX_BUFFER_FULL * sizeof(uint32_t));
 
-    if(furi_hal_subghz.radio_type == SubGhzRadioInternal) {
-        // Connect CC1101_GD0 to TIM2 as output
-        furi_hal_gpio_init_ex(
-            furi_hal_subghz.cc1101_g0_pin,
-            GpioModeAltFunctionPushPull,
-            GpioPullDown,
-            GpioSpeedLow,
-            GpioAltFn1TIM2);
-    } else {
-        //Signal generation with mem-to-mem DMA
-        furi_hal_gpio_write(furi_hal_subghz.cc1101_g0_pin, true);
-        furi_hal_gpio_init(
-            furi_hal_subghz.cc1101_g0_pin, GpioModeOutputPushPull, GpioPullNo, GpioSpeedVeryHigh);
-    }
+    // Connect CC1101_GD0 to TIM2 as output
+    furi_hal_gpio_init_ex(
+        &gpio_cc1101_g0, GpioModeAltFunctionPushPull, GpioPullDown, GpioSpeedLow, GpioAltFn1TIM2);
 
     // Configure DMA
     LL_DMA_InitTypeDef dma_config = {0};
@@ -895,27 +775,15 @@ bool furi_hal_subghz_start_async_tx(FuriHalSubGhzAsyncTxCallback callback, void*
     LL_TIM_EnableCounter(TIM2);
 
     // Start debug
-    if(furi_hal_subghz_start_debug() || furi_hal_subghz.radio_type == SubGhzRadioExternal) {
-        const GpioPin* gpio = furi_hal_subghz.cc1101_g0_pin;
-        //Preparing bit mask
-        //Debug pin is may be only PORTB! (PB0, PB1, .., PB15)
-        furi_hal_subghz_debug_gpio_buff[0] = 0;
-        furi_hal_subghz_debug_gpio_buff[1] = 0;
+    if(furi_hal_subghz_start_debug()) {
+        const GpioPin* gpio = furi_hal_subghz.async_mirror_pin;
+        // //Preparing bit mask
+        // //Debug pin is may be only PORTB! (PB0, PB1, .., PB15)
+        // furi_hal_subghz_debug_gpio_buff[0] = 0;
+        // furi_hal_subghz_debug_gpio_buff[1] = 0;
 
-        //Mirror pin (for example, speaker)
-        if(furi_hal_subghz.async_mirror_pin != NULL) {
-            furi_hal_subghz_debug_gpio_buff[0] |= (uint32_t)furi_hal_subghz.async_mirror_pin->pin
-                                                  << GPIO_NUMBER;
-            furi_hal_subghz_debug_gpio_buff[1] |= furi_hal_subghz.async_mirror_pin->pin;
-            gpio = furi_hal_subghz.async_mirror_pin;
-        }
-
-        //G0 singnal generation for external radio
-        if(furi_hal_subghz.radio_type == SubGhzRadioExternal) {
-            furi_hal_subghz_debug_gpio_buff[0] |= (uint32_t)furi_hal_subghz.cc1101_g0_pin->pin
-                                                  << GPIO_NUMBER;
-            furi_hal_subghz_debug_gpio_buff[1] |= furi_hal_subghz.cc1101_g0_pin->pin;
-        }
+        furi_hal_subghz_debug_gpio_buff[0] = (uint32_t)gpio->pin << GPIO_NUMBER;
+        furi_hal_subghz_debug_gpio_buff[1] = gpio->pin;
 
         dma_config.MemoryOrM2MDstAddress = (uint32_t)furi_hal_subghz_debug_gpio_buff;
         dma_config.PeriphOrM2MSrcAddress = (uint32_t) & (gpio->port->BSRR);
@@ -948,9 +816,9 @@ void furi_hal_subghz_stop_async_tx() {
 
     // Shutdown radio
     furi_hal_subghz_idle();
-    if(furi_hal_subghz.radio_type == SubGhzRadioExternal) {
-        furi_hal_gpio_write(furi_hal_subghz.cc1101_g0_pin, false);
-    }
+#ifdef FURI_HAL_SUBGHZ_TX_GPIO
+    furi_hal_gpio_write(&FURI_HAL_SUBGHZ_TX_GPIO, false);
+#endif
 
     // Deinitialize Timer
     FURI_CRITICAL_ENTER();
@@ -963,14 +831,10 @@ void furi_hal_subghz_stop_async_tx() {
     furi_hal_interrupt_set_isr(SUBGHZ_DMA_CH1_IRQ, NULL, NULL);
 
     // Deinitialize GPIO
-    furi_hal_gpio_init(furi_hal_subghz.cc1101_g0_pin, GpioModeAnalog, GpioPullNo, GpioSpeedLow);
+    furi_hal_gpio_init(&gpio_cc1101_g0, GpioModeAnalog, GpioPullNo, GpioSpeedLow);
 
     // Stop debug
-    furi_hal_subghz_stop_debug();
-
-    if(((furi_hal_subghz.async_mirror_pin != NULL) &&
-        (furi_hal_subghz.radio_type == SubGhzRadioInternal)) ||
-       (furi_hal_subghz.radio_type == SubGhzRadioExternal)) {
+    if(furi_hal_subghz_stop_debug()) {
         LL_DMA_DisableChannel(SUBGHZ_DMA_CH2_DEF);
     }
 

firmware/targets/f7/furi_hal/furi_hal_subghz.h

@@ -5,12 +5,14 @@
 
 #pragma once
 
+#include <lib/subghz/devices/preset.h>
+
 #include <stdbool.h>
 #include <stdint.h>
 #include <stddef.h>
 #include <toolbox/level_duration.h>
 #include <furi_hal_gpio.h>
-#include <furi_hal_spi_types.h>
+// #include <furi_hal_spi_types.h>
 
 #ifdef __cplusplus
 extern "C" {
@@ -21,18 +23,6 @@ extern "C" {
 #define API_HAL_SUBGHZ_ASYNC_TX_BUFFER_HALF (API_HAL_SUBGHZ_ASYNC_TX_BUFFER_FULL / 2)
 #define API_HAL_SUBGHZ_ASYNC_TX_GUARD_TIME 999
 
-/** Radio Presets */
-typedef enum {
-    FuriHalSubGhzPresetIDLE, /**< default configuration */
-    FuriHalSubGhzPresetOok270Async, /**< OOK, bandwidth 270kHz, asynchronous */
-    FuriHalSubGhzPresetOok650Async, /**< OOK, bandwidth 650kHz, asynchronous */
-    FuriHalSubGhzPreset2FSKDev238Async, /**< FM, deviation 2.380371 kHz, asynchronous */
-    FuriHalSubGhzPreset2FSKDev476Async, /**< FM, deviation 47.60742 kHz, asynchronous */
-    FuriHalSubGhzPresetMSK99_97KbAsync, /**< MSK, deviation 47.60742 kHz, 99.97Kb/s, asynchronous */
-    FuriHalSubGhzPresetGFSK9_99KbAsync, /**< GFSK, deviation 19.042969 kHz, 9.996Kb/s, asynchronous */
-    FuriHalSubGhzPresetCustom, /**Custom Preset*/
-} FuriHalSubGhzPreset;
-
 /** Switchable Radio Paths */
 typedef enum {
     FuriHalSubGhzPathIsolate, /**< Isolate Radio from antenna */
@@ -41,50 +31,6 @@ typedef enum {
     FuriHalSubGhzPath868, /**< Center Frequency: 868MHz. Path 3: SW1RF3-SW2RF3, LCLC */
 } FuriHalSubGhzPath;
 
-/** SubGhz state */
-typedef enum {
-    SubGhzStateInit, /**< Init pending */
-
-    SubGhzStateIdle, /**< Idle, energy save mode */
-
-    SubGhzStateAsyncRx, /**< Async RX started */
-
-    SubGhzStateAsyncTx, /**< Async TX started, DMA and timer is on */
-    SubGhzStateAsyncTxLast, /**< Async TX continue, DMA completed and timer got last value to go */
-    SubGhzStateAsyncTxEnd, /**< Async TX complete, cleanup needed */
-
-} SubGhzState;
-
-/** SubGhz regulation, receive transmission on the current frequency for the
- * region */
-typedef enum {
-    SubGhzRegulationOnlyRx, /**only Rx*/
-    SubGhzRegulationTxRx, /**TxRx*/
-} SubGhzRegulation;
-
-/** SubGhz radio types */
-typedef enum {
-    SubGhzRadioInternal,
-    SubGhzRadioExternal,
-} SubGhzRadioType;
-
-/** Structure for accessing SubGhz settings*/
-typedef struct {
-    volatile SubGhzState state;
-    volatile SubGhzRegulation regulation;
-    volatile FuriHalSubGhzPreset preset;
-    const GpioPin* async_mirror_pin;
-    SubGhzRadioType radio_type;
-    FuriHalSpiBusHandle* spi_bus_handle;
-    const GpioPin* cc1101_g0_pin;
-    uint8_t rolling_counter_mult;
-    bool ext_module_power_disabled : 1;
-    bool timestamp_file_names : 1;
-    bool dangerous_frequency_i : 1;
-} FuriHalSubGhz;
-
-extern volatile FuriHalSubGhz furi_hal_subghz;
-
 /* Mirror RX/TX async modulation signal to specified pin
  *
  * @warning    Configures pin to output mode. Make sure it is not connected
@@ -94,19 +40,18 @@ extern volatile FuriHalSubGhz furi_hal_subghz;
  */
 void furi_hal_subghz_set_async_mirror_pin(const GpioPin* pin);
 
+/** Get data GPIO
+ *
+ * @return     pointer to the gpio pin structure
+ */
+const GpioPin* furi_hal_subghz_get_data_gpio();
+
 /** Initialize and switch to power save mode Used by internal API-HAL
  * initialization routine Can be used to reinitialize device to safe state and
  * send it to sleep
  */
 void furi_hal_subghz_init();
 
-/** Initialize and switch to power save mode Used by internal API-HAL
- * initialization routine Can be used to reinitialize device to safe state and
- * send it to sleep
- * @return     true if initialisation is successfully
- */
-bool furi_hal_subghz_init_check(void);
-
 /** Send device to sleep mode
  */
 void furi_hal_subghz_sleep();
@@ -234,6 +179,16 @@ uint32_t furi_hal_subghz_set_frequency_and_path(uint32_t value);
  */
 bool furi_hal_subghz_is_tx_allowed(uint32_t value);
 
+/** Get the current rolling protocols counter ++ value
+ * @return    uint8_t current value
+ */
+uint8_t furi_hal_subghz_get_rolling_counter_mult(void);
+
+/** Set the current rolling protocols counter ++ value
+ * @param      mult uint8_t = 1, 2, 4, 8
+ */
+void furi_hal_subghz_set_rolling_counter_mult(uint8_t mult);
+
 /** Set frequency
  *
  * @param      value  frequency in Hz
@@ -289,52 +244,49 @@ bool furi_hal_subghz_is_async_tx_complete();
  */
 void furi_hal_subghz_stop_async_tx();
 
-/** Switching between internal and external radio
- * @param      state SubGhzRadioInternal or SubGhzRadioExternal
- * @return     true if switching is successful
- */
-bool furi_hal_subghz_init_radio_type(SubGhzRadioType state);
+// /** Initialize and switch to power save mode Used by internal API-HAL
+//  * initialization routine Can be used to reinitialize device to safe state and
+//  * send it to sleep
+//  * @return     true if initialisation is successfully
+//  */
+// bool furi_hal_subghz_init_check(void);
 
-/** Get current radio
- * @return     SubGhzRadioInternal or SubGhzRadioExternal
- */
-SubGhzRadioType furi_hal_subghz_get_radio_type(void);
+// /** Switching between internal and external radio
+//  * @param      state SubGhzRadioInternal or SubGhzRadioExternal
+//  * @return     true if switching is successful
+//  */
+// bool furi_hal_subghz_init_radio_type(SubGhzRadioType state);
 
-/** Check for a radio module
- * @return     true if check is successful
- */
-bool furi_hal_subghz_check_radio(void);
+// /** Get current radio
+//  * @return     SubGhzRadioInternal or SubGhzRadioExternal
+//  */
+// SubGhzRadioType furi_hal_subghz_get_radio_type(void);
 
-/** Turn on the power of the external radio module
- * @return     true if power-up is successful
- */
-bool furi_hal_subghz_enable_ext_power(void);
+// /** Check for a radio module
+//  * @return     true if check is successful
+//  */
+// bool furi_hal_subghz_check_radio(void);
 
-/** Turn off the power of the external radio module
- */
-void furi_hal_subghz_disable_ext_power(void);
+// /** Turn on the power of the external radio module
+//  * @return     true if power-up is successful
+//  */
+// bool furi_hal_subghz_enable_ext_power(void);
 
-/** Get the current rolling protocols counter ++ value
- * @return    uint8_t current value
- */
-uint8_t furi_hal_subghz_get_rolling_counter_mult(void);
+// /** Turn off the power of the external radio module
+//  */
+// void furi_hal_subghz_disable_ext_power(void);
 
-/** Set the current rolling protocols counter ++ value
- * @param      mult uint8_t = 1, 2, 4, 8
- */
-void furi_hal_subghz_set_rolling_counter_mult(uint8_t mult);
+// /** If true - disable 5v power of the external radio module
+//  */
+// void furi_hal_subghz_set_external_power_disable(bool state);
 
-/** If true - disable 5v power of the external radio module
- */
-void furi_hal_subghz_set_external_power_disable(bool state);
+// /** Get the current state of the external power disable flag
+//  */
+// bool furi_hal_subghz_get_external_power_disable(void);
 
-/** Get the current state of the external power disable flag
- */
-bool furi_hal_subghz_get_external_power_disable(void);
-
-/** Set what radio module we will be using
- */
-void furi_hal_subghz_select_radio_type(SubGhzRadioType state);
+// /** Set what radio module we will be using
+//  */
+// void furi_hal_subghz_select_radio_type(SubGhzRadioType state);
 
 #ifdef __cplusplus
 }

firmware/targets/f7/furi_hal/furi_hal_subghz_configs.h

@@ -1,304 +0,0 @@
-#pragma once
-
-#include <cc1101.h>
-
-static const uint8_t furi_hal_subghz_preset_ook_270khz_async_regs[][2] = {
-    // https://e2e.ti.com/support/wireless-connectivity/sub-1-ghz-group/sub-1-ghz/f/sub-1-ghz-forum/382066/cc1101---don-t-know-the-correct-registers-configuration
-
-    /* GPIO GD0 */
-    {CC1101_IOCFG0, 0x0D}, // GD0 as async serial data output/input
-
-    /* FIFO and internals */
-    {CC1101_FIFOTHR, 0x47}, // The only important bit is ADC_RETENTION, FIFO Tx=33 Rx=32
-
-    /* Packet engine */
-    {CC1101_PKTCTRL0, 0x32}, // Async, continious, no whitening
-
-    /* Frequency Synthesizer Control */
-    {CC1101_FSCTRL1, 0x06}, // IF = (26*10^6) / (2^10) * 0x06 = 152343.75Hz
-
-    // Modem Configuration
-    {CC1101_MDMCFG0, 0x00}, // Channel spacing is 25kHz
-    {CC1101_MDMCFG1, 0x00}, // Channel spacing is 25kHz
-    {CC1101_MDMCFG2, 0x30}, // Format ASK/OOK, No preamble/sync
-    {CC1101_MDMCFG3, 0x32}, // Data rate is 3.79372 kBaud
-    {CC1101_MDMCFG4, 0x67}, // Rx BW filter is 270.833333kHz
-
-    /* Main Radio Control State Machine */
-    {CC1101_MCSM0, 0x18}, // Autocalibrate on idle-to-rx/tx, PO_TIMEOUT is 64 cycles(149-155us)
-
-    /* Frequency Offset Compensation Configuration */
-    {CC1101_FOCCFG,
-     0x18}, // no frequency offset compensation, POST_K same as PRE_K, PRE_K is 4K, GATE is off
-
-    /* Automatic Gain Control */
-    {CC1101_AGCCTRL0,
-     0x40}, // 01 - Low hysteresis, small asymmetric dead zone, medium gain; 00 - 8 samples agc; 00 - Normal AGC, 00 - 4dB boundary
-    {CC1101_AGCCTRL1,
-     0x00}, // 0; 0 - LNA 2 gain is decreased to minimum before decreasing LNA gain; 00 - Relative carrier sense threshold disabled; 0000 - RSSI to MAIN_TARGET
-    {CC1101_AGCCTRL2, 0x03}, // 00 - DVGA all; 000 - MAX LNA+LNA2; 011 - MAIN_TARGET 24 dB
-
-    /* Wake on radio and timeouts control */
-    {CC1101_WORCTRL, 0xFB}, // WOR_RES is 2^15 periods (0.91 - 0.94 s) 16.5 - 17.2 hours
-
-    /* Frontend configuration */
-    {CC1101_FREND0, 0x11}, // Adjusts current TX LO buffer + high is PATABLE[1]
-    {CC1101_FREND1, 0xB6}, //
-
-    /* End  */
-    {0, 0},
-};
-
-static const uint8_t furi_hal_subghz_preset_ook_650khz_async_regs[][2] = {
-    // https://e2e.ti.com/support/wireless-connectivity/sub-1-ghz-group/sub-1-ghz/f/sub-1-ghz-forum/382066/cc1101---don-t-know-the-correct-registers-configuration
-
-    /* GPIO GD0 */
-    {CC1101_IOCFG0, 0x0D}, // GD0 as async serial data output/input
-
-    /* FIFO and internals */
-    {CC1101_FIFOTHR, 0x07}, // The only important bit is ADC_RETENTION
-
-    /* Packet engine */
-    {CC1101_PKTCTRL0, 0x32}, // Async, continious, no whitening
-
-    /* Frequency Synthesizer Control */
-    {CC1101_FSCTRL1, 0x06}, // IF = (26*10^6) / (2^10) * 0x06 = 152343.75Hz
-
-    // Modem Configuration
-    {CC1101_MDMCFG0, 0x00}, // Channel spacing is 25kHz
-    {CC1101_MDMCFG1, 0x00}, // Channel spacing is 25kHz
-    {CC1101_MDMCFG2, 0x30}, // Format ASK/OOK, No preamble/sync
-    {CC1101_MDMCFG3, 0x32}, // Data rate is 3.79372 kBaud
-    {CC1101_MDMCFG4, 0x17}, // Rx BW filter is 650.000kHz
-
-    /* Main Radio Control State Machine */
-    {CC1101_MCSM0, 0x18}, // Autocalibrate on idle-to-rx/tx, PO_TIMEOUT is 64 cycles(149-155us)
-
-    /* Frequency Offset Compensation Configuration */
-    {CC1101_FOCCFG,
-     0x18}, // no frequency offset compensation, POST_K same as PRE_K, PRE_K is 4K, GATE is off
-
-    /* Automatic Gain Control */
-    // {CC1101_AGCTRL0,0x40}, // 01 - Low hysteresis, small asymmetric dead zone, medium gain; 00 - 8 samples agc; 00 - Normal AGC, 00 - 4dB boundary
-    // {CC1101_AGCTRL1,0x00}, // 0; 0 - LNA 2 gain is decreased to minimum before decreasing LNA gain; 00 - Relative carrier sense threshold disabled; 0000 - RSSI to MAIN_TARGET
-    // {CC1101_AGCCTRL2, 0x03}, // 00 - DVGA all; 000 - MAX LNA+LNA2; 011 - MAIN_TARGET 24 dB
-    //MAGN_TARGET for RX filter BW =< 100 kHz is 0x3. For higher RX filter BW's MAGN_TARGET is 0x7.
-    {CC1101_AGCCTRL0,
-     0x91}, // 10 - Medium hysteresis, medium asymmetric dead zone, medium gain ; 01 - 16 samples agc; 00 - Normal AGC, 01 - 8dB boundary
-    {CC1101_AGCCTRL1,
-     0x0}, // 0; 0 - LNA 2 gain is decreased to minimum before decreasing LNA gain; 00 - Relative carrier sense threshold disabled; 0000 - RSSI to MAIN_TARGET
-    {CC1101_AGCCTRL2, 0x07}, // 00 - DVGA all; 000 - MAX LNA+LNA2; 111 - MAIN_TARGET 42 dB
-
-    /* Wake on radio and timeouts control */
-    {CC1101_WORCTRL, 0xFB}, // WOR_RES is 2^15 periods (0.91 - 0.94 s) 16.5 - 17.2 hours
-
-    /* Frontend configuration */
-    {CC1101_FREND0, 0x11}, // Adjusts current TX LO buffer + high is PATABLE[1]
-    {CC1101_FREND1, 0xB6}, //
-
-    /* End  */
-    {0, 0},
-};
-
-static const uint8_t furi_hal_subghz_preset_2fsk_dev2_38khz_async_regs[][2] = {
-
-    /* GPIO GD0 */
-    {CC1101_IOCFG0, 0x0D}, // GD0 as async serial data output/input
-
-    /* Frequency Synthesizer Control */
-    {CC1101_FSCTRL1, 0x06}, // IF = (26*10^6) / (2^10) * 0x06 = 152343.75Hz
-
-    /* Packet engine */
-    {CC1101_PKTCTRL0, 0x32}, // Async, continious, no whitening
-    {CC1101_PKTCTRL1, 0x04},
-
-    // // Modem Configuration
-    {CC1101_MDMCFG0, 0x00},
-    {CC1101_MDMCFG1, 0x02},
-    {CC1101_MDMCFG2, 0x04}, // Format 2-FSK/FM, No preamble/sync, Disable (current optimized)
-    {CC1101_MDMCFG3, 0x83}, // Data rate is 4.79794 kBaud
-    {CC1101_MDMCFG4, 0x67}, //Rx BW filter is 270.833333 kHz
-    {CC1101_DEVIATN, 0x04}, //Deviation 2.380371 kHz
-
-    /* Main Radio Control State Machine */
-    {CC1101_MCSM0, 0x18}, // Autocalibrate on idle-to-rx/tx, PO_TIMEOUT is 64 cycles(149-155us)
-
-    /* Frequency Offset Compensation Configuration */
-    {CC1101_FOCCFG,
-     0x16}, // no frequency offset compensation, POST_K same as PRE_K, PRE_K is 4K, GATE is off
-
-    /* Automatic Gain Control */
-    {CC1101_AGCCTRL0,
-     0x91}, //10 - Medium hysteresis, medium asymmetric dead zone, medium gain ; 01 - 16 samples agc; 00 - Normal AGC, 01 - 8dB boundary
-    {CC1101_AGCCTRL1,
-     0x00}, // 0; 0 - LNA 2 gain is decreased to minimum before decreasing LNA gain; 00 - Relative carrier sense threshold disabled; 0000 - RSSI to MAIN_TARGET
-    {CC1101_AGCCTRL2, 0x07}, // 00 - DVGA all; 000 - MAX LNA+LNA2; 111 - MAIN_TARGET 42 dB
-
-    /* Wake on radio and timeouts control */
-    {CC1101_WORCTRL, 0xFB}, // WOR_RES is 2^15 periods (0.91 - 0.94 s) 16.5 - 17.2 hours
-
-    /* Frontend configuration */
-    {CC1101_FREND0, 0x10}, // Adjusts current TX LO buffer
-    {CC1101_FREND1, 0x56},
-
-    /* End  */
-    {0, 0},
-};
-
-static const uint8_t furi_hal_subghz_preset_2fsk_dev47_6khz_async_regs[][2] = {
-
-    /* GPIO GD0 */
-    {CC1101_IOCFG0, 0x0D}, // GD0 as async serial data output/input
-
-    /* Frequency Synthesizer Control */
-    {CC1101_FSCTRL1, 0x06}, // IF = (26*10^6) / (2^10) * 0x06 = 152343.75Hz
-
-    /* Packet engine */
-    {CC1101_PKTCTRL0, 0x32}, // Async, continious, no whitening
-    {CC1101_PKTCTRL1, 0x04},
-
-    // // Modem Configuration
-    {CC1101_MDMCFG0, 0x00},
-    {CC1101_MDMCFG1, 0x02},
-    {CC1101_MDMCFG2, 0x04}, // Format 2-FSK/FM, No preamble/sync, Disable (current optimized)
-    {CC1101_MDMCFG3, 0x83}, // Data rate is 4.79794 kBaud
-    {CC1101_MDMCFG4, 0x67}, //Rx BW filter is 270.833333 kHz
-    {CC1101_DEVIATN, 0x47}, //Deviation 47.60742 kHz
-
-    /* Main Radio Control State Machine */
-    {CC1101_MCSM0, 0x18}, // Autocalibrate on idle-to-rx/tx, PO_TIMEOUT is 64 cycles(149-155us)
-
-    /* Frequency Offset Compensation Configuration */
-    {CC1101_FOCCFG,
-     0x16}, // no frequency offset compensation, POST_K same as PRE_K, PRE_K is 4K, GATE is off
-
-    /* Automatic Gain Control */
-    {CC1101_AGCCTRL0,
-     0x91}, //10 - Medium hysteresis, medium asymmetric dead zone, medium gain ; 01 - 16 samples agc; 00 - Normal AGC, 01 - 8dB boundary
-    {CC1101_AGCCTRL1,
-     0x00}, // 0; 0 - LNA 2 gain is decreased to minimum before decreasing LNA gain; 00 - Relative carrier sense threshold disabled; 0000 - RSSI to MAIN_TARGET
-    {CC1101_AGCCTRL2, 0x07}, // 00 - DVGA all; 000 - MAX LNA+LNA2; 111 - MAIN_TARGET 42 dB
-
-    /* Wake on radio and timeouts control */
-    {CC1101_WORCTRL, 0xFB}, // WOR_RES is 2^15 periods (0.91 - 0.94 s) 16.5 - 17.2 hours
-
-    /* Frontend configuration */
-    {CC1101_FREND0, 0x10}, // Adjusts current TX LO buffer
-    {CC1101_FREND1, 0x56},
-
-    /* End  */
-    {0, 0},
-};
-
-static const uint8_t furi_hal_subghz_preset_msk_99_97kb_async_regs[][2] = {
-    /* GPIO GD0 */
-    {CC1101_IOCFG0, 0x06},
-
-    {CC1101_FIFOTHR, 0x07}, // The only important bit is ADC_RETENTION
-    {CC1101_SYNC1, 0x46},
-    {CC1101_SYNC0, 0x4C},
-    {CC1101_ADDR, 0x00},
-    {CC1101_PKTLEN, 0x00},
-    {CC1101_CHANNR, 0x00},
-
-    {CC1101_PKTCTRL0, 0x05},
-
-    {CC1101_FSCTRL0, 0x23},
-    {CC1101_FSCTRL1, 0x06},
-
-    {CC1101_MDMCFG0, 0xF8},
-    {CC1101_MDMCFG1, 0x22},
-    {CC1101_MDMCFG2, 0x72},
-    {CC1101_MDMCFG3, 0xF8},
-    {CC1101_MDMCFG4, 0x5B},
-    {CC1101_DEVIATN, 0x47},
-
-    {CC1101_MCSM0, 0x18},
-    {CC1101_FOCCFG, 0x16},
-
-    {CC1101_AGCCTRL0, 0xB2},
-    {CC1101_AGCCTRL1, 0x00},
-    {CC1101_AGCCTRL2, 0xC7},
-
-    {CC1101_FREND0, 0x10},
-    {CC1101_FREND1, 0x56},
-
-    {CC1101_BSCFG, 0x1C},
-    {CC1101_FSTEST, 0x59},
-
-    /* End  */
-    {0, 0},
-};
-
-static const uint8_t furi_hal_subghz_preset_gfsk_9_99kb_async_regs[][2] = {
-
-    {CC1101_IOCFG0, 0x06}, //GDO0 Output Pin Configuration
-    {CC1101_FIFOTHR, 0x47}, //RX FIFO and TX FIFO Thresholds
-
-    //1 : CRC calculation in TX and CRC check in RX enabled,
-    //1 : Variable packet length mode. Packet length configured by the first byte after sync word
-    {CC1101_PKTCTRL0, 0x05},
-
-    {CC1101_FSCTRL1, 0x06}, //Frequency Synthesizer Control
-
-    {CC1101_SYNC1, 0x46},
-    {CC1101_SYNC0, 0x4C},
-    {CC1101_ADDR, 0x00},
-    {CC1101_PKTLEN, 0x00},
-
-    {CC1101_MDMCFG4, 0xC8}, //Modem Configuration 9.99
-    {CC1101_MDMCFG3, 0x93}, //Modem Configuration
-    {CC1101_MDMCFG2, 0x12}, // 2: 16/16 sync word bits detected
-
-    {CC1101_DEVIATN, 0x34}, //Deviation = 19.042969
-    {CC1101_MCSM0, 0x18}, //Main Radio Control State Machine Configuration
-    {CC1101_FOCCFG, 0x16}, //Frequency Offset Compensation Configuration
-
-    {CC1101_AGCCTRL2, 0x43}, //AGC Control
-    {CC1101_AGCCTRL1, 0x40},
-    {CC1101_AGCCTRL0, 0x91},
-
-    {CC1101_WORCTRL, 0xFB}, //Wake On Radio Control
-    /* End  */
-    {0, 0},
-};
-
-static const uint8_t furi_hal_subghz_preset_ook_async_patable[8] = {
-    0x00,
-    0xC0, // 12dBm 0xC0, 10dBm 0xC5, 7dBm 0xCD, 5dBm 0x86, 0dBm 0x50, -6dBm 0x37, -10dBm 0x26, -15dBm 0x1D, -20dBm 0x17, -30dBm 0x03
-    0x00,
-    0x00,
-    0x00,
-    0x00,
-    0x00,
-    0x00};
-
-static const uint8_t furi_hal_subghz_preset_2fsk_async_patable[8] = {
-    0xC0, // 10dBm 0xC0, 7dBm 0xC8, 5dBm 0x84, 0dBm 0x60, -10dBm 0x34, -15dBm 0x1D, -20dBm 0x0E, -30dBm 0x12
-    0x00,
-    0x00,
-    0x00,
-    0x00,
-    0x00,
-    0x00,
-    0x00};
-
-static const uint8_t furi_hal_subghz_preset_msk_async_patable[8] = {
-    0xC0, // 10dBm 0xC0, 7dBm 0xC8, 5dBm 0x84, 0dBm 0x60, -10dBm 0x34, -15dBm 0x1D, -20dBm 0x0E, -30dBm 0x12
-    0x00,
-    0x00,
-    0x00,
-    0x00,
-    0x00,
-    0x00,
-    0x00};
-
-static const uint8_t furi_hal_subghz_preset_gfsk_async_patable[8] = {
-    0xC0, // 10dBm 0xC0, 7dBm 0xC8, 5dBm 0x84, 0dBm 0x60, -10dBm 0x34, -15dBm 0x1D, -20dBm 0x0E, -30dBm 0x12
-    0x00,
-    0x00,
-    0x00,
-    0x00,
-    0x00,
-    0x00,
-    0x00};