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Added FIXED AM_Q mod

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This commit is contained in:
47LeCoste
2023-12-01 16:10:50 +01:00
committed by GitHub
parent 655ec52d69
commit a188d8ecda
7 changed files with 19 additions and 2 deletions
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2
lib/subghz/blocks/generic.c
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@@ -10,6 +10,8 @@ void subghz_block_generic_get_preset_name(const char* preset_name, FuriString* p
preset_name_temp = "FuriHalSubGhzPresetOok270Async";
} else if(!strcmp(preset_name, "AM650")) {
preset_name_temp = "FuriHalSubGhzPresetOok650Async";
} else if(!strcmp(preset_name, "AM_Q")) {
preset_name_temp = "FuriHalSubGhzPresetOok650Async_q";
} else if(!strcmp(preset_name, "FM238")) {
preset_name_temp = "FuriHalSubGhzPreset2FSKDev238Async";
} else if(!strcmp(preset_name, "FM476")) {

7
lib/subghz/devices/cc1101_configs.c
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@@ -149,6 +149,13 @@ const uint8_t subghz_device_cc1101_preset_ook_650khz_async_regs[] = {
0x00,
};
const uint8_t subghz_device_cc1101_preset_ook_650khz_async_regs_better_q[] = {
// https://www.youtube.com/@MrDerekJamison
//0x02, 0x0D, 0x03, 0x07, 0x08, 0x32, 0x0B, 0x06, 0x14, 0x00, 0x13, 0x00, 0x12, 0x30, 0x11, 0x22, 0x10, 0x1C, 0x18, 0x18, 0x19, 0x18, 0x1D, 0x91, 0x1C, 0x00, 0x1B, 0x07, 0x20, 0xFB, 0x22, 0x11, 0x21, 0xB6, 0x00, 0x00, 0x00, 0xC0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
// correzione e ulteriore implementazione da HAISENTECK
CC1101_IOCFG0, 0x0D, CC1101_FIFOTHR, 0x07, CC1101_PKTCTRL0, 0x32, 0x0B, 0x06, 0x14, 0x00, 0x13, 0x00, 0x12, 0x30, 0x11, 0x32, 0x10, 0x17, 0x18, 0x18, 0x19, 0x18, 0x1D, 0x91, 0x1C, 0x00, 0x1B, 0x07, 0x20, 0xFB, 0x22, 0x11, 0x21, 0xB6, 0x00, 0x00, 0x00, 0x00, 0xC0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
};
const uint8_t subghz_device_cc1101_preset_2fsk_dev2_38khz_async_regs[] = {
/* GPIO GD0 */

1
lib/subghz/devices/cc1101_configs.h
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@@ -7,6 +7,7 @@ extern "C" {
extern const uint8_t subghz_device_cc1101_preset_ook_270khz_async_regs[];
extern const uint8_t subghz_device_cc1101_preset_ook_650khz_async_regs[];
extern const uint8_t subghz_device_cc1101_preset_ook_650khz_async_regs_better_q[];
extern const uint8_t subghz_device_cc1101_preset_2fsk_dev2_38khz_async_regs[];
extern const uint8_t subghz_device_cc1101_preset_2fsk_dev47_6khz_async_regs[];
extern const uint8_t subghz_device_cc1101_preset_msk_99_97kb_async_regs[];

5
lib/subghz/devices/cc1101_int/cc1101_int_interconnect.c
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@@ -35,6 +35,9 @@ static void subghz_device_cc1101_int_interconnect_load_preset(
case FuriHalSubGhzPresetOok270Async:
furi_hal_subghz_load_custom_preset(subghz_device_cc1101_preset_ook_270khz_async_regs);
break;
case FuriHalSubGhzPresetOok650Async_q:
furi_hal_subghz_load_custom_preset(subghz_device_cc1101_preset_ook_650khz_async_regs_better_q);
break;
case FuriHalSubGhzPreset2FSKDev238Async:
furi_hal_subghz_load_custom_preset(subghz_device_cc1101_preset_2fsk_dev2_38khz_async_regs);
break;
@@ -93,4 +96,4 @@ const SubGhzDeviceInterconnect subghz_device_cc1101_int_interconnect = {
const SubGhzDevice subghz_device_cc1101_int = {
.name = SUBGHZ_DEVICE_CC1101_INT_NAME,
.interconnect = &subghz_device_cc1101_int_interconnect,
};
};

3
lib/subghz/devices/preset.h
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@@ -5,9 +5,10 @@ typedef enum {
FuriHalSubGhzPresetIDLE, /**< default configuration */
FuriHalSubGhzPresetOok270Async, /**< OOK, bandwidth 270kHz, asynchronous */
FuriHalSubGhzPresetOok650Async, /**< OOK, bandwidth 650kHz, asynchronous */
FuriHalSubGhzPresetOok650Async_q, /** AM_Q*/
FuriHalSubGhzPreset2FSKDev238Async, /**< FM, deviation 2.380371 kHz, asynchronous */
FuriHalSubGhzPreset2FSKDev476Async, /**< FM, deviation 47.60742 kHz, asynchronous */
FuriHalSubGhzPresetMSK99_97KbAsync, /**< MSK, deviation 47.60742 kHz, 99.97Kb/s, asynchronous */
FuriHalSubGhzPresetGFSK9_99KbAsync, /**< GFSK, deviation 19.042969 kHz, 9.996Kb/s, asynchronous */
FuriHalSubGhzPresetCustom, /**Custom Preset*/
} FuriHalSubGhzPreset;
} FuriHalSubGhzPreset;

2
lib/subghz/subghz_setting.c
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@@ -185,6 +185,8 @@ static void subghz_setting_load_default_region(
instance, "AM270", subghz_device_cc1101_preset_ook_270khz_async_regs);
subghz_setting_load_default_preset(
instance, "AM650", subghz_device_cc1101_preset_ook_650khz_async_regs);
subghz_setting_load_default_preset(
instance, "AM_Q", subghz_device_cc1101_preset_ook_650khz_async_regs_better_q);
subghz_setting_load_default_preset(
instance, "FM238", subghz_device_cc1101_preset_2fsk_dev2_38khz_async_regs);
subghz_setting_load_default_preset(

1
targets/f7/api_symbols.csv
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@@ -3903,6 +3903,7 @@ Variable,+,subghz_device_cc1101_preset_gfsk_9_99kb_async_regs,const uint8_t[],
Variable,+,subghz_device_cc1101_preset_msk_99_97kb_async_regs,const uint8_t[],
Variable,+,subghz_device_cc1101_preset_ook_270khz_async_regs,const uint8_t[],
Variable,+,subghz_device_cc1101_preset_ook_650khz_async_regs,const uint8_t[],
Variable,+,subghz_device_cc1101_preset_ook_650khz_async_regs_better_q,const uint8_t[],
Variable,+,subghz_protocol_raw,const SubGhzProtocol,
Variable,+,subghz_protocol_raw_decoder,const SubGhzProtocolDecoder,
Variable,+,subghz_protocol_raw_encoder,const SubGhzProtocolEncoder,
1 entry status name type params
3903 Variable + subghz_device_cc1101_preset_msk_99_97kb_async_regs const uint8_t[]
3904 Variable + subghz_device_cc1101_preset_ook_270khz_async_regs const uint8_t[]
3905 Variable + subghz_device_cc1101_preset_ook_650khz_async_regs const uint8_t[]
3906 Variable + subghz_device_cc1101_preset_ook_650khz_async_regs_better_q const uint8_t[]
3907 Variable + subghz_protocol_raw const SubGhzProtocol
3908 Variable + subghz_protocol_raw_decoder const SubGhzProtocolDecoder
3909 Variable + subghz_protocol_raw_encoder const SubGhzProtocolEncoder